Commit Graph

299 Commits

Author SHA1 Message Date
Daniel Sanders 066ebbfd46 [globalisel] Decouple src pattern operands from dst pattern operands.
Summary:
This isn't testable for AArch64 by itself so this patch also adds
support for constant immediates in the pattern and physical
register uses in the result.

The new IntOperandMatcher matches the constant in patterns such as
'(set $rd:GPR32, (G_XOR $rs:GPR32, -1))'. It's always safe to fold
immediates into an instruction so this is the first rule that will match
across multiple BB's.

The Renderer hierarchy is responsible for adding operands to the result
instruction. Renderers can copy operands (CopyRenderer) or add physical
registers (in particular %wzr and %xzr) to the result instruction
in any order (OperandMatchers now import the operand names from
SelectionDAG to allow renderers to access any operand). This allows us to
emit the result instruction for:
  %1 = G_XOR %0, -1 --> %1 = ORNWrr %wzr, %0
  %1 = G_XOR -1, %0 --> %1 = ORNWrr %wzr, %0
although the latter is untested since the matcher/importer has not been
taught about commutativity yet.

Added BuildMIAction which can build new instructions and mutate them where
possible. W.r.t the mutation aspect, MatchActions are now told the name of
an instruction they can recycle and BuildMIAction will emit mutation code
when the renderers are appropriate. They are appropriate when all operands
are rendered using CopyRenderer and the indices are the same as the matcher.
This currently assumes that all operands have at least one matcher.

Finally, this change also fixes a crash in
AArch64InstructionSelector::select() caused by an immediate operand
passing isImm() rather than isCImm(). This was uncovered by the other
changes and was detected by existing tests.

Depends on D29711

Reviewers: t.p.northover, ab, qcolombet, rovka, aditya_nandakumar, javed.absar

Reviewed By: rovka

Subscribers: aemerson, dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D29712

llvm-svn: 296131
2017-02-24 15:43:30 +00:00
Daniel Sanders e604ef5f55 [globalisel] OperandPredicateMatcher's shouldn't need to generate the MachineOperand expr. NFC
Summary:
Each OperandPredicateMatcher shouldn't need to know how to generate the expression
to reference a MachineOperand. The OperandMatcher should provide it.

In addition to separating responsibilities, this also lays some groundwork for
decoupling source patterns from destination patterns to allow invented operands
or operands provided by GlobalISel's equivalent to the ComplexPattern<> class.

Depends on D29709

Reviewers: t.p.northover, ab, rovka, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: dberris, kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D29710

llvm-svn: 295668
2017-02-20 15:30:43 +00:00
Ahmed Bougacha 9aa4c10836 [GlobalISel] Print the matched patterns using an action.
This lets us split out PatternToMatch from the top-level RuleMatcher,
where it doesn't really belong.  That, in turn, lets us eventually
generate RuleMatchers from non-SelectionDAG sources.

llvm-svn: 294076
2017-02-04 00:47:08 +00:00
Ahmed Bougacha 10b9ff56d4 [GlobalISel] Add a test for the tablegen selector emitter backend.
llvm-svn: 294075
2017-02-04 00:47:05 +00:00
Tom Stellard 5b56f2d6cb TableGen: Fix infinite recursion in RegisterBankEmitter
Summary:
AMDGPU has two register classes with the same set of registers, and this
was causing this tablegen backend would get stuck in infinite recursion.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: tpr, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D29049

llvm-svn: 293483
2017-01-30 15:07:01 +00:00
Vedant Kumar 47de8391c0 [tablegen] Delete duplicates from a vector without skipping elements
Tablegen's -gen-instr-info pass has a bug in its emitEnums() routine.
The function intends for values in a vector to be deduplicated, but it
accidentally skips over elements after performing a deletion.

I think there are smarter ways of doing this deduplication, but we can
do that in a follow-up commit if there's interest. See the thread:
[PATCH] TableGen InstrMapping Bug fix.

Patch by Tyler Kenney!

llvm-svn: 288408
2016-12-01 19:38:50 +00:00
Matt Arsenault 1c8d933881 TableGen: Add operator !or
llvm-svn: 286936
2016-11-15 06:49:28 +00:00
Sam Kolton 1b746d1b9d [TableGen] AsmMatcher: Add AsmVariantName to Instruction class.
Summary:
This allows specifying instructions that are available only in specific assembler variant. If AsmVariantName is specified then instruction will be presented only in MatchTable for this variant. If not specified then assembler variants will be determined based on AsmString.
Also this allows splitting assembler match tables in same way as it is done in dissasembler.

Reviewers: ab, tstellarAMD, craig.topper, vpykhtin

Subscribers: wdng

Differential Revision: https://reviews.llvm.org/D24249

llvm-svn: 280952
2016-09-08 15:50:52 +00:00
Tim Northover 1d106c5fc2 tests: accept different TargetOpcode values.
These tests don't actually care about the internal opcode number, but have to
be updated whenever we add a new one for GlobalISel. That's bad.

llvm-svn: 274774
2016-07-07 17:51:42 +00:00
Quentin Colombet ea4d848be3 [Target] Introduce a generic opcode for bitwise OR: G_OR.
This G_OR is used in GlobalISel to represent bitwise OR.

llvm-svn: 272160
2016-06-08 16:12:19 +00:00
Sanjoy Das c0441c29df Introduce a "patchable-function" function attribute
Summary:
The `"patchable-function"` attribute can be used by an LLVM client to
influence LLVM's code generation in ways that makes the generated code
easily patchable at runtime (for instance, to redirect control).
Right now only one patchability scheme is supported,
`"prologue-short-redirect"`, but this can be expanded in the future.

Reviewers: joker.eph, rnk, echristo, dberris

Subscribers: joker.eph, echristo, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19046

llvm-svn: 266715
2016-04-19 05:24:47 +00:00
Craig Topper 6ff46266d1 Declare MVT::SimpleValueType as an int8_t sized enum. This removes 400 bytes from TargetLoweringBase and probably other places.
This required changing several places to print VT enums as strings instead of raw ints since the proper method to use to print became ambiguous. This is probably an improvement anyway.

This also appears to save ~8K from an x86 self host build of llc.

llvm-svn: 266562
2016-04-17 17:37:33 +00:00
Quentin Colombet 68c1061049 [GlobalISel][Target] Add an opcode for unconditional branch.
llvm-svn: 263259
2016-03-11 17:27:38 +00:00
Matt Arsenault f6d32496c5 SelectionDAG: Make Properties a field of SDPatternOperator
Currently you can't specify node properties like commutativity on
a PatFrag. If you want to create a PatFrag on a commutative node
with a hasOneUse predicate, this enables you to specify that the
PatFrag is also commutable.

llvm-svn: 260404
2016-02-10 18:40:04 +00:00
Reid Kleckner 1c93b4cd7b [llvm-tblgen] Stop emitting the intrinsic name matching code
The AMDGPU backend was the last user of the old StringMatcher
recognition code. Move it over to the new lookupLLVMIntrinsicName
funciton, which is now improved to handle all of the interesting edge
cases exposed by AMDGPU intrinsic names.

llvm-svn: 258875
2016-01-26 23:01:21 +00:00
Quentin Colombet 2d7fa7065f [GlobalISel] Add a generic machine opcode for ADD.
The selection process being split into separate passes, we need generic opcodes
to translate the LLVM IR to target independent code.

This patch adds an opcode for addition: G_ADD.

Differential Revision: http://reviews.llvm.org/D15472

llvm-svn: 258333
2016-01-20 19:14:55 +00:00
Craig Topper aee5073532 Add test cases that will show the bug that was fixed in r256725.
llvm-svn: 257584
2016-01-13 07:53:11 +00:00
Krzysztof Parzyszek d4b566d50b Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.

llvm-svn: 253978
2015-11-24 13:07:35 +00:00
Krzysztof Parzyszek d5d083ccd4 Revert r253923.
Per Eric's request.

llvm-svn: 253928
2015-11-23 22:19:57 +00:00
Krzysztof Parzyszek f358bfff17 Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.

llvm-svn: 253923
2015-11-23 22:00:17 +00:00
Joseph Tremoulet 917c7382c1 [TableGen] Allow TokenTy in intrinsic signatures
Summary:
Add the necessary plumbing so that llvm_token_ty can be used as an
argument/return type in intrinsic definitions and correspondingly require
TokenTy in function types.  TokenTy is an opaque type that has no target
lowering, but can be used in machine-independent intrinsics.  It is
required for the upcoming llvm.eh.padparam intrinsic.

Reviewers: majnemer, rnk

Subscribers: stoklund, llvm-commits

Differential Revision: http://reviews.llvm.org/D12532

llvm-svn: 246651
2015-09-02 13:36:25 +00:00
Matt Arsenault a7bc7db53c TableGen: Support folding casts from bits to int
This is to fix an incorrect error when trying to initialize
DwarfNumbers with a !cast<int> of a bits initializer.
getValuesAsListOfInts("DwarfNumbers") would not see an IntInit
and instead the cast, so would give up.

It seems likely that this could be generalized to attempt
the convertInitializerTo for any type. I'm not really sure
why the existing code seems to special case the string cast cases
when convertInitializerTo seems like it should generally handle this
sort of thing.

llvm-svn: 243722
2015-07-31 01:12:06 +00:00
Petr Pavlu 182b05784a [TableGen] Improve decoding options for non-orthogonal instructions
When FixedLenDecoder matches an input bitpattern of form [01]+ with an
instruction bitpattern of form [01?]+ (where 0/1 are static bits and ? are
mixed/variable bits) it passes the input bitpattern to a specific instruction
decoder method which then makes a final decision whether the bitpattern is a
valid instruction or not. This means the decoder must handle all possible
values of the variable bits which sometimes leads to opcode rewrites in the
decoder method when the instructions are not fully orthogonal.

The patch provides a way for the decoder method to say that when it returns
Fail it does not necessarily mean the bitpattern is invalid, but rather that
the bitpattern is definitely not an instruction that is recognized by the
decoder method. The decoder can then try to match the input bitpattern with
other possible instruction bitpatterns.

For example, this allows to solve a situation on AArch64 where the `MSR
(immediate)` instruction has form:
1101 0101 0000 0??? 0100 ???? ???1 1111
but not all values of the ? bits are allowed. The rejected values should be
handled by the `extended MSR (register)` instruction:
1101 0101 000? ???? ???? ???? ???? ????

The decoder will first try to decode an input bitpattern that matches both
bitpatterns as `MSR (immediate)` but currently this puts the decoder method of
`MSR (immediate)` into a situation when it must be able to decode all possible
values of the ? bits, i.e. it would need to rewrite the instruction to `MSR
(register)` when it is not `MSR (immediate)`.

The patch allows to specify that the decoder method cannot determine if the
instruction is valid for all variable values. The decoder method can simply
return Fail when it knows it is definitely not `MSR (immediate)`. The decoder
will then backtrack the decoding and find that it can match the input
bitpattern with the more generic `MSR (register)` bitpattern too.

Differential Revision: http://reviews.llvm.org/D7174

llvm-svn: 242274
2015-07-15 08:04:27 +00:00
Michael Kuperstein db0712f986 Use std::bitset for SubtargetFeatures.
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures.
Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. 
This should now be fixed.

llvm-svn: 238192
2015-05-26 10:47:10 +00:00
Hal Finkel d249736572 [TableGen] Resolve complex def names inside multiclasses
We had not been trying hard enough to resolve def names inside multiclasses
that had complex concatenations, etc. Now we'll try harder.

Patch by Amaury Sechet!

llvm-svn: 237877
2015-05-21 04:32:56 +00:00
Michael Kuperstein c3434b390d Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).

llvm-svn: 237245
2015-05-13 10:28:46 +00:00
Michael Kuperstein aba4a34ef2 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first two times this was committed (r229831, r233055), it caused several buildbot failures. 
At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed.

llvm-svn: 237234
2015-05-13 08:27:08 +00:00
Kit Barton f4669f5905 Add support for v1i128 type.
The v1i128 type is needed for the quadword add/substract instructions introduced
in POWER8. Futhermore, the PowerPC ABI specifies that parameters of type v1i128
are to be passed in a single vector register, while parameters of type i128 are
passed in pairs of GPRs. Thus, it is necessary to be able to differentiate
between v1i128 and i128 in LLVM.

http://reviews.llvm.org/D8564

llvm-svn: 235198
2015-04-17 16:11:05 +00:00
Toma Tabacu 3d5ce49ce5 [TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions.
Summary:
The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'.
If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate.
This generated code looks like "( && Cond2)" and is invalid.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D8294

llvm-svn: 234312
2015-04-07 12:10:11 +00:00
Robert Khasanov b25e562d14 [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW.
Added new operand type for intrinsics (IIT_V64)

llvm-svn: 218668
2014-09-30 11:32:22 +00:00
Craig Topper 5ed88de99b Update test case to match minor formatting change introduced in r218563.
llvm-svn: 218564
2014-09-27 05:36:53 +00:00
Craig Topper 5996da2032 Fix TableGen -gen-disassembler output for bit fields with an offset.
This fixes bit assignments like this
Inst{7-0} = Foo{9-2}

Patch by Steve King.

llvm-svn: 218560
2014-09-27 04:38:02 +00:00
Adam Nemet e5a07167f5 [TableGen] Fully resolve class-instance values before defs in multiclasses
By class-instance values I mean 'Class<Arg>' in 'Class<Arg>.Field' or in
'Other<Class<Arg>>' (syntactically s SimpleValue).  This is to differentiate
from unnamed/anonymous record definitions (syntactically an ObjectBody) which
are not affected by this change.

Consider the testcase:

    class Struct<int i> {
      int I = !shl(i, 1);
      int J = !shl(I, 1);
    }

    class Class<Struct s> {
        int Class_J = s.J;
    }

    multiclass MultiClass<int i> {
      def Def : Class<Struct<i>>;
    }

    defm Defm : MultiClass<2>;

Before this fix, DefmDef.Class_J yields !shl(I, 1) instead of 8.

This is the sequence of events.  We start with this:

    multiclass MultiClass<int i> {
      def Def : Class<Struct<i>>;
    }

During ParseDef the anonymous object for the class-instance value is created:

    multiclass Multiclass<int i> {
      def anonymous_0 : Struct<i>;

      def Def : Class<NAME#anonymous_0>;
    }

Then class Struct<i> is added to anonymous_0.  Also Class<NAME#anonymous_0> is
added to Def:

    multiclass Multiclass<int i> {
      def anonymous_0 {
        int I = !shl(i, 1);
        int J = !shl(I, 1);
      }

      def Def {
        int Class_J = NAME#anonymous_0.J;
      }
    }

So far so good but then we move on to instantiating this in the defm
by substituting the template arg 'i'.

This is how the anonymous prototype looks after fully instantiating.

    defm Defm = {
      def Defmanonymous_0 {
         int I = 4;
         int J = !shl(I, 1);
      }

Note that we only resolved the reference to the template arg.  The
non-template-arg reference in 'J' has not been resolved yet.

Then we go on to instantiating the Def prototype:

      def DefmDef {
         int Class_J = NAME#anonymous_0.J;
      }

Which is resolved to Defmanonymous_0.J and then to !shl(I, 1).

When we fully resolve each record in a defm, Defmanonymous_0.J does get set
to 8 but that's too late for its use.

The patch adds a new attribute to the Record class that indicates that this
def is actually a class-instance value that may be *used* by other defs in a
multiclass.  (This is unlike regular defs which don't reference each other and
thus can be resolved indepedently.)  They are then fully resolved before the
other defs while the multiclass is instantiated.

I added vg_leak to the new test.  I am not sure if this is necessary but I
don't think I have a way to test it.  I can also check in without the XFAIL
and let the bots test this part.

Also tested that X86.td.expanded and AAarch64.td.expanded were unchange before
and after this change.  (This issue triggering this problem is a WIP patch.)

Part of <rdar://problem/17688758>

llvm-svn: 217886
2014-09-16 17:14:13 +00:00
Jean-Luc Duprat 6d7b456184 Tablegen fixes for new syntax when initializing bits from variables.
Followup to r215086.

llvm-svn: 216757
2014-08-29 19:41:04 +00:00
NAKAMURA Takumi 01d9e24f70 llvm/test/TableGen/*Foreach*.td: Remove XFAIL:vg_leak. They have not been failing since r215176.
llvm-svn: 215445
2014-08-12 14:06:21 +00:00
Pete Cooper 94891ddf0d Update BitRecTy::convertValue to allow if expressions with bit values on both sides of the if
llvm-svn: 215087
2014-08-07 05:47:10 +00:00
Pete Cooper 0bf1ea72ee Change the { } expression in tablegen to accept sized binary literals which are not just 0 and 1.
It also allows nested { } expressions, as now that they are sized, we can merge pull bits from the nested value.

In the current behaviour, everything in { } must have been convertible to a single bit.
However, now that binary literals are sized, its useful to be able to initialize a range of bits.

So, for example, its now possible to do

bits<8> x = { 0, 1, { 0b1001 }, 0, 0b0 }

llvm-svn: 215086
2014-08-07 05:47:07 +00:00
Pete Cooper 2cfdfe5882 Change BitsInit to inherit from TypedInit.
This is useful in a later patch where binary literals such as 0b000 will become BitsInit values instead of IntInit values.

llvm-svn: 215085
2014-08-07 05:47:04 +00:00
Pete Cooper 2597764ad9 Change TableGen so that binary literals such as 0b001 are now sized.
Instead of these becoming an integer literal internally, they now become bits<n> values.

Prior to this change, 0b001 was 1 bit long.  This is confusing as clearly the user gave 3 bits.
This new type holds both the literal value and the size, and so can ensure sizes match on initializers.

For example, this used to be legal

bits<1> x = 0b00;

but now it must be written as

bits<2> x = 0b00;

llvm-svn: 215084
2014-08-07 05:47:00 +00:00
Pete Cooper 99ad2a3b67 TableGen: Change { } to only accept bits<n> entries when n == 1.
Prior to this change, it was legal to do something like

  bits<2> opc = { 0, 1 };
  bits<2> opc2 = { 1, 0 };
  bits<2> a = { opc, opc2 };

This involved silently dropping bits from opc and opc2 which is very hard to debug.

Now the above test would be an error.  Having tested with an assert, none of LLVM/clang was relying on this behaviour.

Thanks to Adam Nemet for the above test.

llvm-svn: 215083
2014-08-07 05:46:57 +00:00
Joerg Sonnenberger 6b41a9900a Allow binary and for tblgen math.
llvm-svn: 214851
2014-08-05 09:43:25 +00:00
Richard Smith a0cc1654ce Revert of r213521. This change introduced a non-hermetic test (depending on a
file not in the test/ area). Backing out now so that this test isn't part of
the 3.5 branch.

Original commit message: "TableGen: Allow AddedComplexity values to be negative
[...]"

llvm-svn: 213596
2014-07-22 02:32:12 +00:00
Tom Stellard edf1570d4e TableGen: Allow AddedComplexity values to be negative
This is useful for cases when stand-alone patterns are preferred to the
patterns included in the instruction definitions.  Instead of requiring
that stand-alone patterns set a larger AddedComplexity value, which
can be confusing to new developers, the allows us to reduce the
complexity of the included patterns to achieve the same result.

llvm-svn: 213521
2014-07-21 13:28:54 +00:00
Adam Nemet 017fca0272 [TableGen] Allow shift operators to take bits<n>
Convert the operand to int if possible, i.e. if the value is properly
initialized.  (I suppose there is further room for improvement here to also
peform the shift if the uninitialized bits are shifted out.)

With this little change we can now compute the scaling factor for compressed
displacement with pure tablegen code in the X86 backend.  This is useful
because both the X86-disassembler-specific part of tablegen and the assembler
need this and TD is the natural sharing place.

The patch also adds the missing documentation for the shift and add operator.

llvm-svn: 213277
2014-07-17 17:04:27 +00:00
Justin Holewinski 8a5bf7fab7 [TABLEGEN] Do not crash on intrinsics with names longer than 40 characters
Differential Revision: http://reviews.llvm.org/D4537

llvm-svn: 213253
2014-07-17 11:23:29 +00:00
Matt Arsenault a73fd935d8 Fix error in tablegen when either operand of !if is an empty list.
!if([Something], []) would error with "No type for list".

llvm-svn: 210572
2014-06-10 20:10:08 +00:00
Artyom Skrobov 8b98532af9 Anonymous definitions in foreach blocks triggered a 'def already exists'
llvm-svn: 210526
2014-06-10 12:41:14 +00:00
NAKAMURA Takumi 370d5f808a test/TableGen: Remove XFAIL:vg_leak out of 3 tests corresponding to r208293.
llvm-svn: 208393
2014-05-09 08:18:33 +00:00
NAKAMURA Takumi cc648f75eb Mark test/TableGen/listconcat.td as XFAIL:vg_leak. llvm-tblgen is ignorant of vg_leak.
llvm-svn: 208337
2014-05-08 17:06:10 +00:00
Daniel Sanders 314e80e5f8 [tablegen] Add !listconcat operator with the similar semantics as !strconcat
Summary:
It concatenates two or more lists. In addition to the !strconcat semantics
the lists must have the same element type.

My overall aim is to make it easy to append to Instruction.Predicates
rather than override it. This can be done by concatenating lists passed as
arguments, or by concatenating lists passed in additional fields.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D3506

llvm-svn: 208183
2014-05-07 10:13:19 +00:00
Daniel Sanders 6ef0a2f1be [tablegen] !strconcat accepts more than two arguments but this wasn't documented or tested.
Summary:
* Updated the documentation
* Added a test for >2 arguments
* Added a check for the lexical concatenation
* Made the existing test a bit stricter.

Reviewers: t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, llvm-commits

Differential Revision: http://reviews.llvm.org/D3485

llvm-svn: 207865
2014-05-02 19:25:52 +00:00
Hal Finkel a8c1f46767 [TableGen] Correctly generate implicit anonymous prototype defs in multiclasses
Even within a multiclass, we had been generating concrete implicit anonymous
defs when parsing values (generally in value lists). This behavior was
incorrect, and led to errors when multiclass parameters were used in the
parameter list of the implicit anonymous def.

If we had some multiclass:

multiclass mc<string n> {

 ... : SomeClass<SomeOtherClass<n> >

The capture of the multiclass parameter 'n' would not work correctly, and
depending on how the implicit SomeOtherClass was used, either TableGen would
ignore something it shouldn't, or would crash.

To fix this problem, when inside a multiclass, we generate prototype anonymous
defs for implicit anonymous defs (just as we do for explicit anonymous defs).
Within the multiclass, the current record prototype is populated with a node
that is essentially: !cast<SomeOtherClass>(!strconcat(NAME, anon_value_name)).
This is then resolved to the correct concrete anonymous def, in the usual way,
when NAME is resolved during multiclass instantiation.

llvm-svn: 198348
2014-01-02 20:47:09 +00:00
Hal Finkel f2a0b2b340 [TableGen] Use the same anonymous name as the prefix on all multiclass defs
TableGen had been generating a different name for an anonymous multiclass's
NAME for every def in the multiclass. This had an unfortunate side effect: it
was impossible to reference one def within the multiclass from another (in the
parameter list, for example). By making sure we only generate an anonymous name
once per multiclass (which, as it turns out, requires only changing the name
parameter to reference type), we can now concatenate NAME within the multiclass
with a def name in order to generate a reference to that def.

This does not matter so much, in and of itself, but is necessary for a
follow-up commit that will fix variable capturing in implicit anonymous
multiclass defs (and that is important).

llvm-svn: 198340
2014-01-02 19:35:33 +00:00
Alp Toker 387350353f FileCheckize r197869
llvm-svn: 197872
2013-12-22 03:43:58 +00:00
Alp Toker 597942f8ae Relax tab check into a whitespace check to fix the test in r197869
llvm-svn: 197870
2013-12-21 19:11:31 +00:00
Alp Toker ce91fe5569 TableGen: Generate valid identifiers for anonymous records
Backends like OptParserEmitter assume that record names can be used as valid
identifiers.

The period '.' in generated anonymous names broke that assumption, causing a
build-time error and in practice forcing all records to be named.

llvm-svn: 197869
2013-12-21 18:51:00 +00:00
NAKAMURA Takumi 5c0be2f67a Mark 36 tests as XFAIL:vg_leak in llvm/test/TableGen.
In historical reason, tblgen is not strictly required to be free from memory leaks.
For now, I mark them as XFAIL, they could be fixed, though.

llvm-svn: 194353
2013-11-10 14:26:08 +00:00
NAKAMURA Takumi cae86ce38b Remove 6 of XFAIL(s) in llvm/test/TableGen, since r193736. They have been XPASSing.
llvm-svn: 194352
2013-11-10 14:25:44 +00:00
Andrew Trick a2efd99bdf Enable variable arguments support for intrinsics.
llvm-svn: 193766
2013-10-31 17:18:11 +00:00
Bill Wendling 7c20aab621 FileCheckize some tests.
llvm-svn: 189060
2013-08-22 20:46:05 +00:00
Justin Holewinski b3d630ca21 Fix a bug in TableGen where the intrinsic function name recognizer could mis-identify names if one was a prefix substring of the other
For two intrinsics 'llvm.nvvm.texsurf.handle' and 'llvm.nvvm.texsurf.handle.internal',
TableGen was emitting matching code like:

  if (Name.startswith("llvm.nvvm.texsurf.handle")) ...
  if (Name.startswith("llvm.nvvm.texsurf.handle.internal")) ...

We can never match "llvm.nvvm.texsurf.handle.internal" here because it will
always be erroneously matched by the first condition.

The fix is to sort the intrinsic names and emit them in reverse order.

llvm-svn: 187119
2013-07-25 12:32:00 +00:00
Jakob Stoklund Olesen 91a5848cab Allow TableGen DAG arguments to be just a name.
DAG arguments can optionally be named:

  (dag node, node:$name)

With this change, the node is also optional:

  (dag node, node:$name, $name)

The missing node is treated as an UnsetInit, so the above is equivalent
to:

  (dag node, node:$name, ?:$name)

This syntax is useful in output patterns where we currently require the
types of variables to be repeated:

  def : Pat<(subc i32:$b, i32:$c), (SUBCCrr i32:$b, i32:$c)>;

This is preferable:

  def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>;

llvm-svn: 177843
2013-03-24 19:36:51 +00:00
Reid Kleckner ab083f727b FileCheck-ify some grep tests
These tests in particular try to use escaped square brackets as an
argument to grep, which is failing for me with native win32 python.  It
appears the backslash is being lost near the CreateProcess*() call.

llvm-svn: 173506
2013-01-25 22:11:46 +00:00
Hal Finkel 1a57ba57a2 Improve the !add TableGen test case.
Suggested by Sean Silva.

llvm-svn: 173481
2013-01-25 20:29:25 +00:00
Hal Finkel c7d4dc13a4 Add an addition operator to TableGen
This adds an !add(a, b) operator to tablegen; this will be used
to cleanup the PPC register definitions.

llvm-svn: 173445
2013-01-25 14:49:08 +00:00
Jakub Staszak c6ecd7deba Fix typo, which prevent test from being check.
llvm-svn: 170025
2012-12-12 21:10:56 +00:00
NAKAMURA Takumi e55382ea55 llvm/test/TableGen: Remove XFAIL:vg_leak in dozen of tests, according to llvm-x86_64-linux-vg_leak.
llvm-svn: 169862
2012-12-11 13:14:16 +00:00
Michael Liao 026f833368 Re-work bit/bits value resolving in tblgen
- This patch is inspired by the failure of the following code snippet
  which is used to convert enumerable values into encoding bits to
  improve the readability of td files.

  class S<int s> {
    bits<2> V = !if(!eq(s, 8),  {0, 0},
                !if(!eq(s, 16), {0, 1},
                !if(!eq(s, 32), {1, 0},
                !if(!eq(s, 64), {1, 1}, {?, ?}))));
  }

  Later, PR8330 is found to report not exactly the same bug relevant
  issue to bit/bits values.

- Instead of resolving bit/bits values separately through
  resolveBitReference(), this patch adds getBit() for all Inits and
  resolves bit value by resolving plus getting the specified bit. This
  unifies the resolving of bit with other values and removes redundant
  logic for resolving bit only. In addition,
  BitsInit::resolveReferences() is optimized to take advantage of this
  origanization by resolving VarBitInit's variable reference first and
  then getting bits from it.

- The type interference in '!if' operator is revised to support possible
  combinations of int and bits/bit in MHS and RHS.

- As there may be illegal assignments from integer value to bit, says
  assign 2 to a bit, but we only check this during instantiation in some
  cases, e.g.

  bit V = !if(!eq(x, 17), 0, 2);

  Verbose diagnostic message is generated when invalid value is
  resolveed to help locating the error.

- PR8330 is fixed as well.

llvm-svn: 163360
2012-09-06 23:32:48 +00:00
Chandler Carruth a5a29f970e Convert all tests using TCL-style quoting to use shell-style quoting.
This was done through the aid of a terrible Perl creation. I will not
paste any of the horrors here. Suffice to say, it require multiple
staged rounds of replacements, state carried between, and a few
nested-construct-parsing hacks that I'm not proud of. It happens, by
luck, to be able to deal with all the TCL-quoting patterns in evidence
in the LLVM test suite.

If anyone is maintaining large out-of-tree test trees, feel free to poke
me and I'll send you the steps I used to convert things, as well as
answer any painful questions etc. IRC works best for this type of thing
I find.

Once converted, switch the LLVM lit config to use ShTests the same as
Clang. In addition to being able to delete large amounts of Python code
from 'lit', this will also simplify the entire test suite and some of
lit's architecture.

Finally, the test suite runs 33% faster on Linux now. ;]
For my 16-hardware-thread (2x 4-core xeon e5520): 36s -> 24s

llvm-svn: 159525
2012-07-02 12:47:22 +00:00
Jakob Stoklund Olesen 36a5c8e550 Add support for range expressions in TableGen foreach loops.
Like this:

  foreach i = 0-127 in ...

Use braces for composite ranges:

  foreach i = {0-3,9-7} in ...

llvm-svn: 157432
2012-05-24 22:17:39 +00:00
Jakob Stoklund Olesen 74fd80e8fc Don't put TGParser scratch results in the output.
Only fully expanded Records should go into RecordKeeper.

llvm-svn: 157431
2012-05-24 22:17:36 +00:00
Owen Anderson 921082b883 Teach tblgen's set theory "sequence" operator to support an optional stride operand.
llvm-svn: 157416
2012-05-24 21:37:08 +00:00
Jakob Stoklund Olesen aa0f752fc8 Fix infinite loop in nested multiclasses.
Patch by Michael Liao!

llvm-svn: 152232
2012-03-07 16:39:35 +00:00
David Greene fb927af24f Add Foreach Loop
Add some data structures to represent for loops.  These will be
referenced during object processing to do any needed iteration and
instantiation.

Add foreach keyword support to the lexer.

Add a mode to indicate that we're parsing a foreach loop.  This allows
the value parser to early-out when processing the foreach value list.

Add a routine to parse foreach iteration declarations.  This is
separate from ParseDeclaration because the type of the named value
(the iterator) doesn't match the type of the initializer value (the
value list).  It also needs to add two values to the foreach record:
the iterator and the value list.

Add parsing support for foreach.

Add the code to process foreach loops and create defs based
on iterator values.

Allow foreach loops to be matched at the top level.

When parsing an IDValue check if it is a foreach loop iterator for one
of the active loops.  If so, return a VarInit for it.

Add Emacs keyword support for foreach.

Add VIM keyword support for foreach.

Add tests to check foreach operation.

Add TableGen documentation for foreach.

Support foreach with multiple objects.

Support non-braced foreach body with one object.

Do not require types for the foreach declaration.  Assume the iterator
type from the iteration list element type.

llvm-svn: 151164
2012-02-22 16:09:41 +00:00
Eli Bendersky 924f9a671d Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed.
Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches.

llvm-svn: 150664
2012-02-16 06:28:33 +00:00
Jakob Stoklund Olesen 60e70e8fcf Add an (interleave A, B, ...) SetTheory operator.
This will interleave the elements from two or more lists.

llvm-svn: 148824
2012-01-24 18:06:05 +00:00
Benjamin Kramer d48d52e7b2 XFAIL test on leak checkers.
llvm-svn: 142804
2011-10-24 17:24:05 +00:00
David Greene 13c8360c26 Add Paste Test
This tests TableGen's paste functionality.

llvm-svn: 142526
2011-10-19 13:04:50 +00:00
David Greene d699161a99 Add NAME Member
Add a Value named "NAME" to each Record.  This will be set to the def or defm
name when instantiating multiclasses.  This will replace the #NAME# processing
hack once paste functionality is in place.

llvm-svn: 142518
2011-10-19 13:04:13 +00:00
Benjamin Kramer e7ae31cc25 XFAIL tblgen tests on leak checkers.
llvm-svn: 141533
2011-10-10 13:09:59 +00:00
David Greene 33f619971f Remove Multidefs
Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

llvm-svn: 141378
2011-10-07 18:25:05 +00:00
David Greene 74842740c0 Make Test More Thorough
Check that all ADD patters are processed.

Add a SUB test.

llvm-svn: 141314
2011-10-06 21:20:44 +00:00
Peter Collingbourne 7f7f2e9b76 s/tblgen/llvm-tblgen/g in a few missed places, including the tests
llvm-svn: 141294
2011-10-06 13:39:59 +00:00
David Greene 9bc27ec40f Update Test for Multidefs
Update the MultiPat.td test to create some defs via multidefs.

llvm-svn: 141235
2011-10-05 22:42:48 +00:00
David Greene 52a9cb8063 Add a Multidef Test
Add a simple test for multidefs.

llvm-svn: 141234
2011-10-05 22:42:47 +00:00
David Greene 979697b630 Test Operand Arguments
Add a test to do list manipulation and pass the result as arguments.
This tests the new list element operator resolve code and provides an
example of using list manipulation to do instruction pattern
substitution.

llvm-svn: 141102
2011-10-04 18:55:40 +00:00
David Greene dc221dd649 Test More Complicated Lists
Test of indexing lists of lists of lists works.  This also exercises
some operators.

llvm-svn: 140884
2011-09-30 20:59:52 +00:00
David Greene 0c3a2b48e7 Test VarListElementInit:: resolveListElementReference
Add a TableGen test to check if indexing lists of lists works.

llvm-svn: 140883
2011-09-30 20:59:51 +00:00
Andrew Trick d22f9b395b Reverted r138652, valgrind doesn't understand obj:*/tblgen.
llvm-svn: 138703
2011-08-27 06:17:30 +00:00
Andrew Trick 28dc5abd05 valgrind: Always suppress tblgen leaks.
I'll clean up the rest of the XFAIL: vg_leak lines if this works.

llvm-svn: 138652
2011-08-26 20:41:20 +00:00
Benjamin Kramer 6eb9666bb8 We don't care if TableGen leaks memory.
llvm-svn: 138634
2011-08-26 17:00:30 +00:00
Jakob Stoklund Olesen fc205a5694 Teach TableGen to evaluate DAG expressions as set operations.
A TableGen backend can define how certain classes can be expanded into
ordered sets of defs, typically by evaluating a specific field in the
record. The SetTheory class can then evaluate DAG expressions that refer
to these named sets.

A number of standard set and list operations are predefined, and the
backend can add more specialized operators if needed. The -print-sets
backend is used by SetTheory.td to provide examples.

This is intended to simplify how register classes are defined:

  def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;

llvm-svn: 132621
2011-06-04 04:11:37 +00:00
Chris Lattner 0ab5e2cded Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!

llvm-svn: 129558
2011-04-15 05:18:47 +00:00
David Greene 2f7cf7fcb4 Rename lisp-like functions as suggested by Gabor Greif as loooong time
ago.  This is both easier to learn and easier to read.

llvm-svn: 123001
2011-01-07 17:05:37 +00:00
Bill Wendling 73ce4a6fd8 Add support for using the `!if' operator when initializing variables:
class A<bit a, bits<3> x, bits<3> y> {
    bits<3> z;
    let z = !if(a, x, y);
  }

The variable z will get the value of x when 'a' is 1 and 'y' when a is '0'.

llvm-svn: 121666
2010-12-13 01:46:19 +00:00
Chris Lattner 28f034c21a Generalize tblgen's dag parsing logic to handle arbitrary expressions
as the operator of the dag.  Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).

Unfortunately, this runs afoul of an idiom being used by llvmc.  It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo.  With this change, this is parsed as a [1,2,3] 
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.

llvm-svn: 115742
2010-10-06 04:55:48 +00:00
Chris Lattner 805b74d650 rename add some comments.
llvm-svn: 115741
2010-10-06 04:37:17 +00:00
Chris Lattner 7d5bb96723 filecheckize
llvm-svn: 115740
2010-10-06 04:36:30 +00:00
Chris Lattner 9402633637 remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places
where !cast is just as short.

llvm-svn: 115722
2010-10-06 00:19:21 +00:00
Chris Lattner 7538ed80a9 enhance tblgen to support anonymous defm's, use this to
simplify the X86 CMOVmr's.

llvm-svn: 115702
2010-10-05 22:51:56 +00:00
Daniel Dunbar db0ddaa50b tests: XFAIL a handful of tests on the vg_leak builder, so we can get back to
green.

llvm-svn: 113491
2010-09-09 15:50:19 +00:00
David Greene 2a9de4d828 Generalize getFieldType to work on all TypedInits. Add a couple of testcases from
Amaury Pouly.

llvm-svn: 113010
2010-09-03 21:00:49 +00:00
Jakob Stoklund Olesen c4227f1362 Remove TargetInstrInfo::copyRegToReg entirely.
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.

llvm-svn: 108095
2010-07-11 17:01:17 +00:00
Bruno Cardoso Lopes 30a28d6588 Fix a tblgen bug.
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
                            (mem_frag addr:$src2))))];

The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
                            (mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
                            (mem_frag addr:$src2))))];

Fix this by passing the right name when creating a new DagInit node.

llvm-svn: 106670
2010-06-23 19:50:39 +00:00
Bruno Cardoso Lopes dc883cf45a Fix a subtle multiclass bug: when using class inheritance on
a toplevel 'defm', make sure to properly resolve references.

llvm-svn: 106570
2010-06-22 20:30:50 +00:00
Bruno Cardoso Lopes 23f8321cbc Teach tablegen how to inherit from classes in 'defm' definitions.
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.

llvm-svn: 106305
2010-06-18 19:53:41 +00:00
Bruno Cardoso Lopes 4d1d798736 For a tablegen expression such as !if(a,b,c), let 'a'
be evaluated for 'bit' operators

llvm-svn: 106185
2010-06-17 00:31:36 +00:00
Bruno Cardoso Lopes 77a4a56251 let the '!eq' expression support 'int' and 'bit' types
llvm-svn: 106171
2010-06-16 23:24:12 +00:00
Bruno Cardoso Lopes 5f2adccc1b Teach tablegen to allow "let" expressions inside multiclasses,
providing more ways to factor out commonality from the records.

llvm-svn: 105776
2010-06-10 02:42:59 +00:00
Bruno Cardoso Lopes c4f614870f Teach tablegen to support 'defm' inside multiclasses.
llvm-svn: 105519
2010-06-05 02:11:52 +00:00
Jeffrey Yasskin b832e3276a XFAIL a new tblgen test for memory leak checking.
llvm-svn: 99707
2010-03-27 04:59:47 +00:00
Jakob Stoklund Olesen 0e45762250 Fix evil TableGen bug in template parameters with defaults.
If a TableGen class has an initializer expression containing an X.Y subexpression,
AND X depends on template parameters,
AND those template parameters have defaults,
AND some parameters with defaults are beyond position 1,
THEN parts of the initializer expression are evaluated prematurely with the default values when the first explicit template parameter is substituted, before the remaining explicit template parameters have been substituted.

llvm-svn: 99492
2010-03-25 06:23:34 +00:00
Jeffrey Yasskin 2f87b54f1a Add support for XFAILing valgrind runs with memory leak checking independently
of runs without leak checking.  We add -vg to the triple for non-checked runs,
or -vg_leak for checked runs.  Also use this to XFAIL the TableGen tests, since
tablegen leaks like a sieve.  This includes some valgrindArgs refactoring.

llvm-svn: 99103
2010-03-20 23:08:45 +00:00
David Greene 297bfe6d71 Add an !eq() operator to TableGen. It operates on strings only.
Use !cast<string>() to compare other types of objects.

llvm-svn: 92754
2010-01-05 19:11:42 +00:00
David Greene dbf7074296 Fix a bug in !subst where TableGen would go and resubstitute text it had
just substituted.  This could cause infinite looping in certain
pathological cases.

llvm-svn: 91843
2009-12-21 21:21:34 +00:00
Bob Wilson 67e6cab49f Fix pr5470. Tablegen handles template arguments by temporarily setting their
values, resolving references to them, and then removing the definitions.
If a template argument is set to an undefined value, we need to resolve
references to that argument to an explicit undefined value.  The current code
leaves the reference to the template argument as it is, which causes an
assertion failure later when the definition of the template argument is
removed.

llvm-svn: 89581
2009-11-22 03:58:57 +00:00
David Greene f71ee01c81 Add some tests of advanced TableGen list functionality.
llvm-svn: 74445
2009-06-29 20:07:17 +00:00
Daniel Dunbar 92c10927f7 Remove empty test (my DejaGNU doesn't like this)
llvm-svn: 73148
2009-06-09 21:24:39 +00:00
Bill Wendling cb61314f0f Remove empty file.
llvm-svn: 73140
2009-06-09 18:55:39 +00:00
David Greene 58a6b76cfd Revert 73074 and 73099 because Windows doesn't have POSIX
regular expressions.  We will add an OpenBSD implementation
and re-apply ASAP.

llvm-svn: 73138
2009-06-09 18:31:17 +00:00
David Greene 67c05bff31 Add a !patsubst operator. Use on string types.
llvm-svn: 73099
2009-06-08 23:05:37 +00:00
David Greene 0574ff5639 Add a more robust !if test.
llvm-svn: 73091
2009-06-08 22:34:57 +00:00
David Greene bf02c8869a Fix DejaGNU run line to escape special characters.
llvm-svn: 73090
2009-06-08 22:20:58 +00:00
David Greene 8618f95caf Make IntInits and ListInits typed. This helps deduce types of !if and
other operators.  For the rare cases where a list type cannot be
deduced, provide a []<type> syntax, where <type> is the list element
type.

llvm-svn: 73078
2009-06-08 20:23:18 +00:00
David Greene 07eba05a61 Add a !regmatch operator to do pattern matching in TableGen.
llvm-svn: 73074
2009-06-08 17:00:34 +00:00
David Greene 3587eed2c4 Implement !if, analogous to $(if) in GNU make.
llvm-svn: 71815
2009-05-14 23:26:46 +00:00
David Greene 9bb2de17c2 Fix tests to not upset DejaGNU.
llvm-svn: 71811
2009-05-14 23:21:40 +00:00
David Greene d571b3c94b Graduate LLVM to the big leagues by embedding a LISP processor into TableGen.
Ok, not really, but do support some common LISP functions:

* car
* cdr
* null

llvm-svn: 71805
2009-05-14 22:38:31 +00:00
David Greene e917fff30f Implement a !foreach operator analogous to GNU make's $(foreach).
Use it on dags and lists like this:

class decls {
  string name;
}

def Decls : decls;

class B<list<string> names> : A<!foreach(Decls.name, names, !strconcat(Decls.name, ", Sr."))>;

llvm-svn: 71803
2009-05-14 22:23:47 +00:00
David Greene 98ed3c7273 Implement a !subst operation simmilar to $(subst) in GNU make to do
def/var/string substitution on generic pattern templates.  For example:

def Type;
def v4f32 : Type;
def TYPE : Type;

class GenType<Type t> {
  let type = !(subst TYPE, v4f32, t);
}

def TheType : GenType<TYPE>;

llvm-svn: 71801
2009-05-14 21:54:42 +00:00
David Greene e8f3b27e65 Implement !cast.
llvm-svn: 71794
2009-05-14 21:22:49 +00:00
Dan Gohman 18f026afa6 Use .td for tablegen files, not .ll.
llvm-svn: 71277
2009-05-08 23:01:28 +00:00
David Greene 44f9d7a8f0 Allow multiclass def names to contain "#NAME"" where TableGen replaces
#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in 

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD

llvm-svn: 70979
2009-05-05 16:28:25 +00:00
David Greene 7049e79e45 Fix multiclass inheritance to limit value resolution to new defs added
by base multiclasses.  Do not attempt to alter defs from previous base
multiclasses.  This fixes multiple multiclass inheritance.

llvm-svn: 69974
2009-04-24 16:55:41 +00:00
David Greene 196ac3c69a Make BinOps typed and require a type specifier for !nameconcat. This
allows binops to be used in typed contexts such as when passing
arguments to classes.

llvm-svn: 69921
2009-04-23 21:25:15 +00:00
David Greene f00919a040 Allow defm to inherit from multiple multiclasses.
llvm-svn: 69832
2009-04-22 22:17:51 +00:00
David Greene a9c6c5d39b Implement !nameconcat to concatenate strings and look up the resulting
name in the symbol table, returning an object.

llvm-svn: 69822
2009-04-22 20:18:10 +00:00
David Greene 753ed8fd9c Implement multiclass inheritance.
llvm-svn: 69810
2009-04-22 16:42:54 +00:00
Chris Lattner 1bd3674306 add support for a few simple escape characters in tblgen strings.
llvm-svn: 66949
2009-03-13 21:03:27 +00:00
Chris Lattner be0d672ac4 implement support for C-style string literal concatenation in td files.
llvm-svn: 66663
2009-03-11 17:08:13 +00:00
Dan Gohman ca0546facc Fun x86 encoding tricks: when adding an immediate value of 128,
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.

llvm-svn: 57663
2008-10-17 01:33:43 +00:00
Matthijs Kooijman 30a07a5504 For all RUN lines starting with "not", redirect stderr to /dev/null so tests
don't fail when (expected) error output is produced. This fixes 17 tests.

While I was there, I also made all RUN lines of the form "not llvm-as..." a bit
more consistent, they now all redirect stderr and stdout to /dev/null and use
input redirect to read their input.

llvm-svn: 52174
2008-06-10 12:57:32 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Dan Gohman f9dd170e36 Convert tests using "| wc -l | grep ..." to use the count script.
llvm-svn: 41097
2007-08-15 13:36:28 +00:00
John Criswell 2660cef6d7 Convert .cvsignore files
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
Reid Spencer 4dcf8bff4b For PR1319:
Fix syntax of tests to ensure grep pattern is properly quoted.

llvm-svn: 36134
2007-04-16 15:31:49 +00:00
Reid Spencer c943f8ff34 For PR1319: Upgrade to new test harness
llvm-svn: 36070
2007-04-15 10:26:05 +00:00
Reid Spencer d029c7e666 Make the llvm-runtest function much more amenable by eliminating all the
global variables that needed to be passed in. This makes it possible to
add new global variables with only a couple changes (Makefile and llvm-dg.exp)
instead of touching every single dg.exp file.

llvm-svn: 35918
2007-04-11 19:56:59 +00:00
Reid Spencer 83b3d82672 Regression is gone, don't try to find it on clean target.
llvm-svn: 33296
2007-01-17 07:59:14 +00:00