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3 Commits

Author SHA1 Message Date
Craig Topper 410d252f5b [AVX-512] Add unmasked subvector inserts and extract to the execution domain tables. 
llvm-svn: 309632
 2017-07-31 22:07:29 +00:00
Zvi Rackover 092f199188 DAGCombiner: Extend reduceBuildVecToTrunc to handle non-zero offset 
Summary:
Adding support for combining power2-strided build_vector's where the
first build_vectori's operand is extracted from a non-zero index.

Example:

 v4i32 build_vector((extract_elt V, 1),
                    (extract_elt V, 3),
                    (extract_elt V, 5),
                    (extract_elt V, 7))
 -->
 v4i32 truncate (bitcast (shuffle<1,u,3,u,5,u,7,u> V, u) to v4i64)

Reviewers: delena, RKSimon, guyblank

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35700

llvm-svn: 309108
 2017-07-26 12:57:03 +00:00
Zvi Rackover eac8e7c08a [X86] Adding ISel tests for strided-shuffles with non-zero offset. NFC. 
llvm-svn: 308672
 2017-07-20 21:03:36 +00:00