maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
270,249 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

6 Commits

Author SHA1 Message Date
Simon Pilgrim 879ce046ad [X86][BMI2] Added scheduling test for RORX/SARX/SHLX/SHRX instructions 
llvm-svn: 311171
 2017-08-18 16:26:39 +00:00
Simon Pilgrim 320f89782a [X86][BMI2] Added scheduling test for MULX instructions 
llvm-svn: 311159
 2017-08-18 13:22:18 +00:00
Simon Pilgrim 8484698321 [X86] Added missing cpu to fix generic scheduling model tests 
llvm-svn: 309691
 2017-08-01 15:14:35 +00:00
Andrew V. Tischenko d1fefa3d7c This patch returns proper value to indicate the case when instruction throughput can't be calculated. 
Differential revision https://reviews.llvm.org/D35831

llvm-svn: 309156
 2017-07-26 18:55:14 +00:00
Craig Topper 106b5b6856 AMD znver1 Initial Scheduler model 
Summary:
This patch adds the following
1. Adds a skeleton scheduler model for AMD Znver1.
2. Introduces the znver1 execution units and pipes.
3. Caters the instructions based on the generic scheduler classes.
4. Further additions to the scheduler model with instruction itineraries will be carried out incrementally based on
        a. Instructions types
        b. Registers used
5. Since itineraries are not added based on instructions, throughput information are bound to change when incremental changes are added.
6. Scheduler testcases are modified accordingly to suit the new model.

Patch by Ganesh Gopalasubramanian. With minor formatting tweaks from me.

Reviewers: craig.topper, RKSimon

Subscribers: javed.absar, shivaram, ddibyend, vprasad

Differential Revision: https://reviews.llvm.org/D35293

llvm-svn: 308411
 2017-07-19 02:45:14 +00:00
Simon Pilgrim b884b208ee [X86] Add BMI2 scheduling tests 
llvm-svn: 308136
 2017-07-16 14:09:15 +00:00