Commit Graph

1673 Commits

Author SHA1 Message Date
Eric Christopher f8019408dc Replace the MCSubtargetInfo parameter with a Triple when creating
an MCInstPrinter. Update all callers and use where we wanted a Triple
previously.

llvm-svn: 233648
2015-03-31 00:10:04 +00:00
Eric Christopher c7c5592b7e Remove unused Target argument from MCInstPrinter ctor functions.
llvm-svn: 233607
2015-03-30 21:52:21 +00:00
Duncan P. N. Exon Smith 9dffcd04f7 CodeGen: Use the new DebugLoc API, NFC
Update lib/CodeGen (and lib/Target) to use the new `DebugLoc` API.

llvm-svn: 233582
2015-03-30 19:14:47 +00:00
Yaron Keren 075759aadd Remove more superfluous .str() and replace std::string concatenation with Twine.
Following r233392, http://llvm.org/viewvc/llvm-project?rev=233392&view=rev.

llvm-svn: 233555
2015-03-30 15:42:36 +00:00
Akira Hatanaka b46d0234a6 [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.

llvm-svn: 233411
2015-03-27 20:36:02 +00:00
Marek Olsak 2a1c9d00b9 R600/SI: Fix VOP2 VI encoding
Broken by "R600/SI: Refactor VOP2 instruction defs".

llvm-svn: 233399
2015-03-27 19:10:06 +00:00
Yaron Keren 75e0c4b060 Remove superfluous .str() and replace std::string concatenation with Twine.
llvm-svn: 233392
2015-03-27 17:51:30 +00:00
Nico Weber cf07c65be3 Fix typo in comment.
llvm-svn: 233226
2015-03-25 22:34:16 +00:00
David Blaikie 156d46eda0 Opaque Pointer Types: GEP API migrations to specify the gep type explicitly
The changes to InstCombine (& SCEV) do seem a bit silly - it doesn't make
anything obviously better to have the caller access the pointers element
type (the thing I'm trying to remove) than the GEP itself, but it's a
helpful migration step. This will allow me to more obviously lock down
GEP (& Load, etc) API usage, then fix all the code that accesses pointer
element types except the places that need to be removed (most of the
InstCombines) anyway - at which point I'll need to just remove all that
code because it won't be meaningful anymore (there will be no pointer
types, so no bitcasts to combine)

SCEV looks like it'll need some restructuring - we'll have to do a bit
more work for GEP canonicalization, since it'll depend on how it's used
if we can even manage to canonicalize it to a non-ugly GEP. I guess we
can do some fun stuff like voting (do 2 out of 3 load from the GEP with
a certain type that gives a pretty GEP? Does every typed use of the GEP
use either a specific type or a generic type (i8*, etc)?)

llvm-svn: 233131
2015-03-24 23:34:31 +00:00
Marek Olsak aab1a8daee R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI
This is a candidate for stable.

llvm-svn: 233080
2015-03-24 13:40:38 +00:00
Marek Olsak 949f5dab95 R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset
llvm-svn: 233079
2015-03-24 13:40:34 +00:00
Marek Olsak 9b72868d17 R600/SI: Custom-select 32-bit S_BFE from bitwise opcodes
llvm-svn: 233078
2015-03-24 13:40:27 +00:00
Marek Olsak 63a7b084eb R600/SI: Improve BFM support
llvm-svn: 233077
2015-03-24 13:40:21 +00:00
Marek Olsak 7d77728c97 R600/SI: Use V_FRACT_F64 for faster 64-bit floor on SI
Other f64 opcodes not supported on SI can be lowered in a similar way.

v2: use complex VOP3 patterns
llvm-svn: 233076
2015-03-24 13:40:15 +00:00
Marek Olsak 43650e45c3 R600/SI: Expand fract to floor, then only select V_FRACT on CI
V_FRACT is buggy on SI.

R600-specific code is left intact.

v2: drop the multiclass, use complex VOP3 patterns
llvm-svn: 233075
2015-03-24 13:40:08 +00:00
Michael Kuperstein 29704e7fb4 Revert "Use std::bitset for SubtargetFeatures"
This reverts commit r233055.

It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time.

llvm-svn: 233068
2015-03-24 12:56:59 +00:00
Michael Kuperstein 774b441b5e Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first time this was committed (r229831), it caused several buildbot failures. 
At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed.

Differential Revision: http://reviews.llvm.org/D8542

llvm-svn: 233055
2015-03-24 09:17:25 +00:00
David Blaikie 4eaa79c8d9 Refactor: Simplify boolean expressions in R600 target
Simplify boolean expressions with `true` and `false` using `clang-tidy`

Patch by Richard Thomson.

Differential Revision: http://reviews.llvm.org/D8520

llvm-svn: 233020
2015-03-23 20:56:44 +00:00
Benjamin Kramer 799003bf8c Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
llvm-svn: 232998
2015-03-23 19:32:43 +00:00
Matt Arsenault 88a13c6c8d R600/SI: Merge tables for commuting
Don't use a separate table for compares anymore,
and use the same VOP2_REV class.

llvm-svn: 232992
2015-03-23 18:45:41 +00:00
Matt Arsenault 0943b0e30f R600/SI: Only use one range of isCommutable for compares
Also don't count the class instructions as isCompare anymore.

llvm-svn: 232991
2015-03-23 18:45:38 +00:00
Matt Arsenault 448dac05cd R600/SI: Remove redundant unsetting of hasSideEffects
These are already set in the base class for the instruction.

llvm-svn: 232990
2015-03-23 18:45:36 +00:00
Matt Arsenault 42f39e1a3f R600/SI: Move hasSideEffects setting into VOPCX classes
llvm-svn: 232989
2015-03-23 18:45:35 +00:00
Matt Arsenault f5b2cd891a R600/SI: Allow commuting compares
This enables very common cases to switch to the
smaller encoding.

All of the standard LLVM canonicalizations of comparisons
are the opposite of what we want. Compares with constants
are moved to the RHS, but the first operand can be an inline
immediate, literal constant, or SGPR using the 32-bit VOPC
encoding.

There are additional bad canonicalizations that should
also be fixed, such as canonicalizing ge x, k to gt x, (k + 1)
if this makes k no longer an inline immediate value.

llvm-svn: 232988
2015-03-23 18:45:30 +00:00
Matt Arsenault 05b617fed5 R600/SI: Use right class for cmpsx f64 instructions
Use VOPCX_F64 to not need the let Defs = [EXEC]

llvm-svn: 232987
2015-03-23 18:45:23 +00:00
Matt Arsenault a2dd76f41c R600/SI: Remove cond operand to VOPCX classes
It isn't used, and these will probably never be directly selected.

llvm-svn: 232986
2015-03-23 18:45:20 +00:00
Benjamin Kramer 16132e6faa Purge unused includes throughout libSupport.
NFC.

llvm-svn: 232976
2015-03-23 18:07:13 +00:00
Tom Stellard f0a575f6be R600/SI: Fix crash in SIInstrInfo::areLoadsFromSameBasePtr()
This function assumed that SMRD instructions always have immediate
offsets, which is not always the case.

llvm-svn: 232957
2015-03-23 16:06:01 +00:00
Eric Christopher 4d0f35a901 Remove the target independent TargetMachine::getSubtarget and
TargetMachine::getSubtargetImpl routines.

This keeps the target independent code free of bare subtarget
calls while the remainder of the backends are migrated, or not
if they don't wish to support per-function subtargets as would
be needed for function multiversioning or LTO of disparate
cpu subarchitecture types, e.g.

clang -msse4.2 -c foo.c -emit-llvm -o foo.bc
clang -c bar.c -emit-llvm -o bar.bc
llvm-link foo.bc bar.bc -o baz.bc
llc baz.bc

and get appropriate code for what the command lines requested.

llvm-svn: 232885
2015-03-21 04:22:23 +00:00
Eric Christopher 8024d030fb Grab a subtarget off of an AMDGPUTargetMachine rather than a
bare target machine in preparation for the TargetMachine bare
getSubtarget/getSubtargetImpl calls going away.

llvm-svn: 232880
2015-03-21 03:17:25 +00:00
Tom Stellard 3b0dab9f3f R600/SI: Refactor VOP2 instruction defs
llvm-svn: 232817
2015-03-20 15:14:23 +00:00
Tom Stellard 23c2c3d0f4 R600/SI: Refactor VOP1 instruction defs
llvm-svn: 232816
2015-03-20 15:14:21 +00:00
Craig Topper 3a8eb896c9 [Tablegen] Attempt to add support for patterns containing nodes with multiple results.
This is needed for AVX512 masked scatter/gather support.

The R600 change is necessary to remove a hack that was working around the lack of multiple results.

llvm-svn: 232798
2015-03-20 05:09:06 +00:00
Rafael Espindola 69244c3e78 two or more, use a for.
llvm-svn: 232688
2015-03-18 23:15:49 +00:00
Rafael Espindola 105270f68c Add a default implementation of createObjectStreamer.
This removes duplicated code from backends that don't need to do anything
fancy.

llvm-svn: 232658
2015-03-18 19:08:20 +00:00
Rafael Espindola 8dc4e1007a Make EmitFunctionHeader a private helper.
llvm-svn: 232481
2015-03-17 14:38:30 +00:00
Rafael Espindola ec8da3de01 Call EmitFunctionHeader just before EmitFunctionBody.
This avoids switching to .AMDGPU.config and back and hardcoding the
section it switches back to.

llvm-svn: 232479
2015-03-17 14:34:42 +00:00
Rafael Espindola f696df1148 Pass in a "const Triple &T" instead of a raw StringRef.
llvm-svn: 232429
2015-03-16 22:29:29 +00:00
Rafael Espindola 9bcf2fcb89 Remove unused argument. NFC.
llvm-svn: 232428
2015-03-16 22:06:15 +00:00
David Blaikie 9f380a3ca0 Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter
This covers essentially all of llvm's headers and libs. One or two weird
cases I wasn't sure were worth/appropriate to fix.

llvm-svn: 232394
2015-03-16 18:06:57 +00:00
Tom Stellard 7c840bcbf3 R600/SI: don't try min3/max3/med3 with f64
There are no opcodes for this. This also adds a test case.

v2: make test more robust

Patch by: Grigori Goronzy

llvm-svn: 232386
2015-03-16 15:53:55 +00:00
Jan Vesely 7a9cca9e7d r600: Clear visited structure before running.
Fixes random crashes in for-loop piglit.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>
llvm-svn: 232181
2015-03-13 17:32:46 +00:00
Jan Vesely 18b289f590 r600: Use deque and simplify loops in AMDGPUCFGStructurizer
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>
llvm-svn: 232180
2015-03-13 17:32:43 +00:00
Tom Stellard e2f5b41055 R600/SI: Don't print scc reg in sopc assembly string
This is how the proprietary driver prints sopc instructions.

llvm-svn: 232106
2015-03-12 21:34:28 +00:00
Tom Stellard c0503926f5 R600/SI: Remove _e32 and _e64 suffixes from mnemonics
Instead print them as part of the $dst operand.  The AsmMatcher
requires the 32-bit and 64-bit encodings have the same mnemonic in
order to parse them correctly.

llvm-svn: 232105
2015-03-12 21:34:22 +00:00
Mehdi Amini 93e1ea167e Move the DataLayout to the generic TargetMachine, making it mandatory.
Summary:
I don't know why every singled backend had to redeclare its own DataLayout.
There was a virtual getDataLayout() on the common base TargetMachine, the
default implementation returned nullptr. It was not clear from this that
we could assume at call site that a DataLayout will be available with
each Target.

Now getDataLayout() is no longer virtual and return a pointer to the
DataLayout member of the common base TargetMachine. I plan to turn it into
a reference in a future patch.

The only backend that didn't have a DataLayout previsouly was the CPPBackend.
It now initializes the default DataLayout. This commit is NFC for all the
other backends.

Test Plan: clang+llvm ninja check-all

Reviewers: echristo

Subscribers: jfb, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8243

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 231987
2015-03-12 00:07:24 +00:00
Eric Christopher 6c5b511b4d Remove the need to cache the subtarget in the R600 TargetRegisterInfo
classes.

llvm-svn: 231954
2015-03-11 18:43:21 +00:00
Eric Christopher 4320495319 Have getRegPressureSetLimit take a MachineFunction so that a
we can inspect the subtarget and function when computing values.

llvm-svn: 231951
2015-03-11 18:34:58 +00:00
Eric Christopher 0169e42c3b Remove the use of the subtarget in MCCodeEmitter creation and
update all ports accordingly. Required a couple of small rewrites
in handling subtarget features during creation in PPC.

llvm-svn: 231861
2015-03-10 22:03:14 +00:00
Eric Christopher 501d5e9f66 Remove createAMDGPUMCCodeEmitter and instead just register the correct
MCCodeEmitter creation routine based on TargetMachine since the only
64-bit R600 gpus are part of the GCN target.

llvm-svn: 231856
2015-03-10 21:57:34 +00:00