Commit Graph

8 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 7725e497d1 [TableGen] Replace InfoByHwMode::getAsString with writeToStream
Also add operator<< for use with raw_ostream to InfoByHwMode and its
derived classes.

Recommitting r313989 with the fix for unresolved references: explicitly
define the operator<< in namespace llvm.

llvm-svn: 314004
2017-09-22 18:29:37 +00:00
Krzysztof Parzyszek 9b64c51739 Revert "[TableGen] Replace InfoByHwMode::getAsString with writeToStream"
This reverts commit r313989: it breaks Windows bots.

llvm-svn: 313990
2017-09-22 16:18:35 +00:00
Krzysztof Parzyszek d55727e873 [TableGen] Replace InfoByHwMode::getAsString with writeToStream
Also add operator<< for use with raw_ostream to InfoByHwMode and its
derived classes.

llvm-svn: 313989
2017-09-22 16:06:35 +00:00
Simon Pilgrim 6f05a743f7 [TableGen] Return StringRef from ValueTypeByHwMode::getMVTName
Avoid unnecessary std::string creations during TypeSetByHwMode::writeToStream.

Found during investigations into PR28222

Differential Revision: https://reviews.llvm.org/D38174

llvm-svn: 313983
2017-09-22 13:32:26 +00:00
Krzysztof Parzyszek affd201967 Recommit r313647 now that GCC seems to accept the offering
Add some member types to MachineValueTypeSet::const_iterator so that
iterator_traits can work with it.

Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)

The introduction of parameterized register classes in r313271 caused the
matcher generation code in TableGen to run much slower, particularly so
in the unoptimized (debug) build. This patch recovers some of the lost
performance.

Summary of changes:
- Cache the set of legal types in TypeInfer::getLegalTypes. The contents
  of this set do not change.
- Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally
  this would not be necessary, but in the debug build TableGen is not
  optimized, so this helps a little bit.
- Add an early exit from TypeSetByHwMode::operator== for the case when
  one or both arguments are "simple", i.e. only have one mode. This
  saves some time in GenerateVariants.
- Finally, replace the underlying storage type in TypeSetByHwMode::SetType
  with MachineValueTypeSet based on std::array instead of std::set.
  This significantly reduces the number of memory allocation calls.

I've done a number of experiments with the underlying type of InfoByHwMode.
The type is a map, and for targets that do not use the parameterization,
this map has only one entry. The best (unoptimized) performance, somewhat
surprisingly came from std::map, followed closely by std::unordered_map.
DenseMap was the slowest by a large margin.
Various hand-crafted solutions (emulating enough of the map interface
not to make sweeping changes to the users) did not yield any observable
improvements.

llvm-svn: 313660
2017-09-19 18:42:34 +00:00
Krzysztof Parzyszek 16441a9831 Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)"
It breaks a lot of bots due to missing "__iterator_category".

llvm-svn: 313651
2017-09-19 17:55:07 +00:00
Krzysztof Parzyszek 02fa88e748 Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)
The introduction of parameterized register classes in r313271 caused the
matcher generation code in TableGen to run much slower, particularly so
in the unoptimized (debug) build. This patch recovers some of the lost
performance.

Summary of changes:
- Cache the set of legal types in TypeInfer::getLegalTypes. The contents
  of this set do not change.
- Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally
  this would not be necessary, but in the debug build TableGen is not
  optimized, so this helps a little bit.
- Add an early exit from TypeSetByHwMode::operator== for the case when
  one or both arguments are "simple", i.e. only have one mode. This
  saves some time in GenerateVariants.
- Finally, replace the underlying storage type in TypeSetByHwMode::SetType
  with MachineValueTypeSet based on std::array instead of std::set.
  This significantly reduces the number of memory allocation calls.

I've done a number of experiments with the underlying type of InfoByHwMode.
The type is a map, and for targets that do not use the parameterization,
this map has only one entry. The best (unoptimized) performance, somewhat
surprisingly came from std::map, followed closely by std::unordered_map.
DenseMap was the slowest by a large margin.
Various hand-crafted solutions (emulating enough of the map interface
not to make sweeping changes to the users) did not yield any observable
improvements.

llvm-svn: 313647
2017-09-19 17:32:35 +00:00
Krzysztof Parzyszek 779d98e1c0 TableGen support for parameterized register class information
This replaces TableGen's type inference to operate on parameterized
types instead of MVTs, and as a consequence, some interfaces have
changed:
- Uses of MVTs are replaced by ValueTypeByHwMode.
- EEVT::TypeSet is replaced by TypeSetByHwMode.

This affects the way that types and type sets are printed, and the
tests relying on that have been updated.

There are certain users of the inferred types outside of TableGen
itself, namely FastISel and GlobalISel. For those users, the way
that the types are accessed have changed. For typical scenarios,
these replacements can be used:
- TreePatternNode::getType(ResNo) -> getSimpleType(ResNo)
- TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo)
- TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false)

For more information, please refer to the review page.

Differential Revision: https://reviews.llvm.org/D31951

llvm-svn: 313271
2017-09-14 16:56:21 +00:00