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13034 Commits

Author SHA1 Message Date
Evan Cheng a1ef3ec5b5 Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc 
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).

llvm-svn: 26094
 2006-02-09 22:11:03 +00:00
Chris Lattner 8976219850 Make the threshold a parameter 
llvm-svn: 26093
 2006-02-09 20:15:48 +00:00
Chris Lattner 4c0bd5bcdf Done 
llvm-svn: 26091
 2006-02-09 20:00:19 +00:00
Chris Lattner 5259aa1c86 Enable LSR by default for SPARC: it is a clear win. 
llvm-svn: 26090
 2006-02-09 19:59:55 +00:00
Chris Lattner 2826e0511b Simplify the loop-unswitch pass, by not even trying to unswitch loops with 
uses of loop values outside the loop.  We need loop-closed SSA form to do
this right, or to use SSA rewriting if we really care.

llvm-svn: 26089
 2006-02-09 19:14:52 +00:00
Chris Lattner 24cd2fa269 Fix 80-column violations 
llvm-svn: 26088
 2006-02-09 07:41:14 +00:00
Chris Lattner 4534dd59a3 Enhance MVIZ in three ways: 
1. Teach it new tricks: in particular how to propagate through signed shr and sexts.
2. Teach it to return a bitset of known-1 and known-0 bits, instead of just zero.
3. Teach instcombine (AND X, C) to fold when we know all C bits of X.

This implements Regression/Transforms/InstCombine/bittest.ll, and allows
future things to be simplified.

llvm-svn: 26087
 2006-02-09 07:38:58 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Evan Cheng d3f1db93c1 More changes to reduce frame size. 
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.

llvm-svn: 26083
 2006-02-09 07:15:23 +00:00
Chris Lattner c75d5b093d add an option to turn on LSR. 
llvm-svn: 26080
 2006-02-09 05:06:36 +00:00
Chris Lattner 729ffe95c4 simplify this code now that each constant pool entry is not separately allocated 
llvm-svn: 26079
 2006-02-09 04:49:59 +00:00
Chris Lattner f6190821da Adjust to MachineConstantPool interface change: instead of keeping a 
value/alignment pair for each constant, keep a value/offset pair.

llvm-svn: 26078
 2006-02-09 04:46:04 +00:00
Chris Lattner ba97264e72 rename fields of constant pool entries 
llvm-svn: 26076
 2006-02-09 04:22:52 +00:00
Chris Lattner 47f7319f00 Simplify code, alignment must be specified now. 
llvm-svn: 26074
 2006-02-09 02:26:04 +00:00
Chris Lattner 4576bb74d5 Make MachineConstantPool entries alignments explicit 
llvm-svn: 26071
 2006-02-09 02:23:13 +00:00
Chris Lattner 832d78d981 Always pass in an alignment. 
llvm-svn: 26070
 2006-02-09 02:19:16 +00:00
Chris Lattner d94a3d2c8a provide an explicit alignment for cp entries 
llvm-svn: 26069
 2006-02-09 02:15:30 +00:00
Evan Cheng 6dc90ca172 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Chris Lattner 2e07d6370a Darwin doesn't support #APP/#NO_APP 
llvm-svn: 26066
 2006-02-08 23:42:22 +00:00
Chris Lattner ed87dcd45f Add support for assembler directives that wrap inline asm 
llvm-svn: 26065
 2006-02-08 23:41:56 +00:00
Chris Lattner 26e385a623 Rename BSel -> PPCBSel for the benefit of doxygen users. 
Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.

llvm-svn: 26064
 2006-02-08 19:33:26 +00:00
Chris Lattner b4fc050f0f add a simple optimization 
llvm-svn: 26062
 2006-02-08 17:47:22 +00:00
Chris Lattner ab2dc4d70d Simplify some code, reducing calls to MaskedValueIsZero. Implement a minor 
optimization where we reduce the number of bits in AND masks when possible.

llvm-svn: 26056
 2006-02-08 07:34:50 +00:00
Chris Lattner b7e074ab9b more email -> README moving 
llvm-svn: 26054
 2006-02-08 07:12:07 +00:00
Chris Lattner f7b962d7d7 Emit the 'mr' pseudoop for easier reading. 
llvm-svn: 26053
 2006-02-08 06:56:40 +00:00
Chris Lattner 45bb34b715 Add some random notes, not high-prio 
llvm-svn: 26052
 2006-02-08 06:52:06 +00:00
Chris Lattner b97142eec0 Move emails from nate into public places 
llvm-svn: 26051
 2006-02-08 06:43:51 +00:00
Chris Lattner 5997cf9381 Use EraseInstFromFunction in a few cases to put the uses of the removed 
instruction onto the worklist (in case they are now dead).

Add a really trivial local DSE implementation to help out bitfield code.
We now fold this:

struct S {
    unsigned char a : 1, b : 1, c : 1, d : 2, e : 3;
    S();
};

S::S() : a(0), b(0), c(1), d(0), e(6) {}

to this:

void %_ZN1SC1Ev(%struct.S* %this) {
entry:
        %tmp.1 = getelementptr %struct.S* %this, int 0, uint 0
        store ubyte 38, ubyte* %tmp.1
        ret void
}

much earlier (in gccas instead of only in gccld after DSE runs).

llvm-svn: 26050
 2006-02-08 03:25:32 +00:00
Chris Lattner 06a0ed1ee0 Implement some more interesting select sccp cases. This implements: 
test/Regression/Transforms/SCCP/select.ll

llvm-svn: 26049
 2006-02-08 02:38:11 +00:00
Chris Lattner a10e23c19f Compile this: 
xori r6, r2, 1
        rlwinm r6, r6, 0, 31, 31
        cmpwi cr0, r6, 0
        bne cr0, LBB1_3 ; endif

to this:

        rlwinm r6, r2, 0, 31, 31
        cmpwi cr0, r6, 0
        beq cr0, LBB1_3 ; endif

llvm-svn: 26047
 2006-02-08 02:13:15 +00:00
Chris Lattner ddba3289b5 Fix a problem in my patch yesterday, causing a miscompilation of 176.gcc 
llvm-svn: 26045
 2006-02-08 01:20:23 +00:00
Evan Cheng adeb8fb5a2 Fixed a local common symbol bug. 
llvm-svn: 26044
 2006-02-07 23:32:58 +00:00
Evan Cheng ec212fb66d For ELF, .comm takes alignment value as the optional 3rd argument. It must be 
specified in bytes.

llvm-svn: 26043
 2006-02-07 21:54:08 +00:00
Chris Lattner 203b2f1288 Implement getConstraintType for PPC. 
llvm-svn: 26042
 2006-02-07 20:16:30 +00:00
Chris Lattner 44314827d6 Fix Transforms/InstCombine/2006-02-07-SextZextCrash.ll 
llvm-svn: 26040
 2006-02-07 19:07:40 +00:00
Evan Cheng 5a76680de1 Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete. 
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.

llvm-svn: 26038
 2006-02-07 08:38:37 +00:00
Evan Cheng 227e469c25 Remind myself to add PIC and static asm printer support. 
llvm-svn: 26037
 2006-02-07 08:35:44 +00:00
Chris Lattner 92a6865321 Generalize MaskedValueIsZero into a ComputeMaskedNonZeroBits function, which 
is just as efficient as MVIZ and is also more general.

Fix a few minor bugs introduced in recent patches

llvm-svn: 26036
 2006-02-07 08:05:22 +00:00
Chris Lattner c3ebf40031 Make MaskedValueIsZero take a uint64_t instead of a ConstantIntegral as a 
mask.  This allows the code to be simpler and more efficient.

Also, generalize some of the cases in MVIZ a bit, making it slightly more aggressive.

llvm-svn: 26035
 2006-02-07 07:27:52 +00:00
Chris Lattner 77defbae0a Use Type::getIntegralTypeMask() to simplify some code 
llvm-svn: 26034
 2006-02-07 07:00:41 +00:00
Chris Lattner 2590e511d8 Implement the beginnings of a facility for simplifying expressions based on 
'demanded bits', inspired by Nate's work in the dag combiner.  This isn't
complete, but needs to unrelated instcombiner changes to continue.

llvm-svn: 26033
 2006-02-07 06:56:34 +00:00
Jeff Cohen 2439669c6f The interpreter assumes that the caller of runFunction() must be lli, and 
therefore the function being called must be a main() returning an int.  The
consequences when these assumptions are false are not good, so don't assume
them.

llvm-svn: 26031
 2006-02-07 05:29:44 +00:00
Jeff Cohen 69e849014c Teach the interpreter to handle global variables that are added to a module after 
interpretation has begun.  The JIT already handles this situation correctly, and
the interpreter can already handle new functions being added.

llvm-svn: 26030
 2006-02-07 05:11:57 +00:00
Chris Lattner 15a6c4c444 Add the simple PPC integer constraints 
llvm-svn: 26027
 2006-02-07 00:47:13 +00:00
Chris Lattner d62a3bfa66 Eliminate the printCallOperand method, using a 'call' modifier on 
printOperand instead.

llvm-svn: 26025
 2006-02-06 23:41:19 +00:00
Chris Lattner 2bf2c8d7e7 Change prototype 
llvm-svn: 26022
 2006-02-06 22:18:19 +00:00
Chris Lattner 34f74c180a Add support for modifier characters to operand printers 
llvm-svn: 26021
 2006-02-06 22:17:23 +00:00
Jim Laskey 0458fb76fd Goodbye nasty macro. 
llvm-svn: 26019
 2006-02-06 21:54:05 +00:00
Jim Laskey b643ff5546 Edit requests from Sabre. 
llvm-svn: 26018
 2006-02-06 19:12:02 +00:00
Andrew Lenharth f5b7f16259 see what this allignment thing will do 
llvm-svn: 26017
 2006-02-06 17:15:17 +00:00
Jim Laskey 85263234a8 Changing model for the construction of debug information. 
llvm-svn: 26016
 2006-02-06 15:33:21 +00:00
Jim Laskey 58d48c8118 We seem to have settled to __DWARF for section name. 
llvm-svn: 26015
 2006-02-06 14:16:15 +00:00
Evan Cheng d5f2ba0d6f - Update load folding checks to match those auto-generated by tblgen. 
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
 2006-02-06 06:02:33 +00:00
Evan Cheng bfa4b7cc75 Complex pattern isel code shouldn't select nodes. 
llvm-svn: 26010
 2006-02-05 08:45:01 +00:00
Chris Lattner 463fa70eaa Fix the Sparc backend with Evan's recent tblgen changes 
llvm-svn: 26009
 2006-02-05 08:35:50 +00:00
Chris Lattner 8467e5d6af This xform isn't safe 
llvm-svn: 26007
 2006-02-05 08:26:16 +00:00
Nate Begeman 8c9cd461df Back out previous commit, it isn't safe. 
llvm-svn: 26006
 2006-02-05 08:23:00 +00:00
Nate Begeman 3dc8b89493 fold c1 << (x + c2) into (c1 << c2) << x. fix a warning. 
llvm-svn: 26005
 2006-02-05 08:07:24 +00:00
Chris Lattner 4b8fcc229f some stuff is done 
llvm-svn: 26004
 2006-02-05 07:54:37 +00:00
Chris Lattner 2e90b732fa Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) [urem only]. 
Turn A / (C1 << N), where C1 is "1<<C2" into A >> (N+C2) [udiv only].

Tested with: rem.ll:test5, div.ll:test10

llvm-svn: 26003
 2006-02-05 07:54:04 +00:00
Nate Begeman c89fdf1eb3 Handle urem by shifted powers of 2. 
llvm-svn: 26001
 2006-02-05 07:36:48 +00:00
Nate Begeman 25d178bece handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2 
llvm-svn: 26000
 2006-02-05 07:20:23 +00:00
Evan Cheng a28b764886 Use SelectRoot() as the entry to any tblgen based isel. 
llvm-svn: 25998
 2006-02-05 06:51:51 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Chris Lattner 25777c8c25 Remove the SparcV8 backend. It has been renamed to be the Sparc backend. 
llvm-svn: 25992
 2006-02-05 06:33:29 +00:00
Chris Lattner a3e5b2c61c remove V8 reference 
llvm-svn: 25991
 2006-02-05 06:32:59 +00:00
Evan Cheng d37645c07d * Added SDNode::isOnlyUse(). 
* Fix hasNUsesOfValue(), it should be const.

llvm-svn: 25990
 2006-02-05 06:29:23 +00:00
Chris Lattner 158e1f519c Rename SPARC V8 target to be the LLVM SPARC target. 
llvm-svn: 25985
 2006-02-05 05:50:24 +00:00
Chris Lattner c0e48c6c58 add a note 
llvm-svn: 25984
 2006-02-05 05:27:35 +00:00
Evan Cheng d19d51f414 Re-commit the last bit of change that was backed out. 
llvm-svn: 25983
 2006-02-05 05:25:07 +00:00
Chris Lattner cbab28414e make sure that global doubles are aligned to 8 bytes 
llvm-svn: 25981
 2006-02-05 01:46:49 +00:00
Chris Lattner c070cb685d Use getPreferredAlignmentLog. 
llvm-svn: 25980
 2006-02-05 01:45:04 +00:00
Chris Lattner 1b1a8731c0 Use the asmprinter to find out what the preferred alignment of a global is. 
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.

llvm-svn: 25979
 2006-02-05 01:30:45 +00:00
Chris Lattner a9b2525d3e Implement the AsmPrinter::getPreferredAlignmentLog method. 
llvm-svn: 25978
 2006-02-05 01:29:18 +00:00
Andrew Lenharth 1fcff15f86 linkage fix for weak functions 
llvm-svn: 25976
 2006-02-04 19:13:09 +00:00
Jeff Cohen 95ae171d5b Fix VC++ warning. 
llvm-svn: 25975
 2006-02-04 16:20:31 +00:00
Chris Lattner d30c4991a1 Use SCEVExpander::InsertCastOfTo instead of our own code. This reduces 
#LLVM LOC, and auto-cse's cast instructions.

llvm-svn: 25974
 2006-02-04 09:52:43 +00:00
Chris Lattner a6da69cab0 Pull the InsertCastOfTo out of the header, implement CSE'ing of arguments. 
llvm-svn: 25973
 2006-02-04 09:51:53 +00:00
Chris Lattner 22b4edfb42 Temporarily revert this patch, which probably breaks with the 
tblgen patch reverted.

llvm-svn: 25971
 2006-02-04 09:24:16 +00:00
Chris Lattner b6a1865bca Value# select instructions, allowing -gcse to remove duplicates 
llvm-svn: 25969
 2006-02-04 09:15:29 +00:00
Evan Cheng ce87cac555 Complex pattern's custom matcher should not call Select() on any operands. 
Select them afterwards if it returns true.

llvm-svn: 25968
 2006-02-04 08:50:49 +00:00
Chris Lattner ab146eae38 Custom lower VAARG for the case when we are doing vaarg(double). In this 
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.

llvm-svn: 25967
 2006-02-04 08:31:30 +00:00
Chris Lattner a1fa8b1c88 Fix a nasty typo that broke functions with big stack frames. 
llvm-svn: 25966
 2006-02-04 08:04:21 +00:00
Chris Lattner d096b2f3e0 fix a bug in my last checkin 
llvm-svn: 25965
 2006-02-04 07:48:46 +00:00
Chris Lattner 2959f0003e Fix two significant bugs in LSR: 
1. When rewriting code in outer loops, sometimes we would insert code into
   inner loops that is invariant in that loop.
2. Notice that 4*(2+x) is 8+4*x and use that to simplify expressions.

This is a performance neutral change.

llvm-svn: 25964
 2006-02-04 07:36:50 +00:00
Nate Begeman a1e895cf97 Remove some stuff that now works 
llvm-svn: 25963
 2006-02-04 07:29:35 +00:00
Chris Lattner 32ed2b45c7 add a note 
llvm-svn: 25962
 2006-02-04 07:07:31 +00:00
Chris Lattner 2c0956bcea Two changes: 
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
   ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
   up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.

llvm-svn: 25961
 2006-02-04 06:58:46 +00:00
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Chris Lattner 2d2e2e3c0e Let bugpoint work on sparc with v9 instructions enabled. 
llvm-svn: 25958
 2006-02-04 05:02:27 +00:00
Jeff Cohen 57a004abfe Fix VC++ warning. 
llvm-svn: 25957
 2006-02-04 03:27:39 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Evan Cheng 0a977c95aa Remove an unnecessary predicate. 
llvm-svn: 25954
 2006-02-04 02:23:01 +00:00
Evan Cheng 11613a5219 Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a 
flag so it can be flagged to a FST.

llvm-svn: 25953
 2006-02-04 02:20:30 +00:00
Chris Lattner 65ad53feb3 Initial early support for non-register operands, like immediates 
llvm-svn: 25952
 2006-02-04 02:16:44 +00:00
Chris Lattner ee1dadbccf implementation of some methods for inlineasm 
llvm-svn: 25951
 2006-02-04 02:13:02 +00:00
Chris Lattner c93403a7fb Handle another case exposed on X86. 
llvm-svn: 25949
 2006-02-03 23:50:46 +00:00
Chris Lattner 71d20c4e18 Fix a nasty problem on two-address machines in the following situation: 
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
 2006-02-03 23:28:46 +00:00
Chris Lattner 507a3a7bd1 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable 
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
 2006-02-03 23:13:58 +00:00
Nate Begeman 20a894282d Implement some feedback from sabre 
llvm-svn: 25946
 2006-02-03 22:38:07 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits. 
llvm-svn: 25945
 2006-02-03 22:24:05 +00:00
Chris Lattner 81e66abd1e add a note 
llvm-svn: 25944
 2006-02-03 22:06:45 +00:00
Chris Lattner d079dbb9b0 another case Nate came up with 
llvm-svn: 25943
 2006-02-03 22:05:41 +00:00
Chris Lattner 277462e20f add a note 
llvm-svn: 25942
 2006-02-03 21:25:23 +00:00
Chris Lattner f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
llvm-svn: 25941
 2006-02-03 20:13:59 +00:00
Chris Lattner a1d312c6ea remove an old comment 
llvm-svn: 25940
 2006-02-03 18:59:39 +00:00
Chris Lattner 23d55f2547 Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now 
obsolete.  yaay :)

llvm-svn: 25939
 2006-02-03 18:54:24 +00:00
Chris Lattner c408558638 When rewriting frame instructions, emit the appropriate small-immediate 
instruction when possible.

llvm-svn: 25938
 2006-02-03 18:20:04 +00:00
Chris Lattner ca76917388 Teach sparc to fold loads/stores into copies. 
Remove the dead getRegClassForType method
minor formating changes.

llvm-svn: 25936
 2006-02-03 07:06:25 +00:00
Chris Lattner 6091407783 remove dead fn 
llvm-svn: 25935
 2006-02-03 06:51:34 +00:00
Nate Begeman 22e251abf1 Add common code for reassociating ops in the dag combiner 
llvm-svn: 25934
 2006-02-03 06:46:56 +00:00
Chris Lattner d7d98611ca Implement isLoadFromStackSlot and isStoreToStackSlot 
llvm-svn: 25932
 2006-02-03 06:44:54 +00:00
Chris Lattner a23b04acdb remove some target-indep and implemented notes 
llvm-svn: 25930
 2006-02-03 06:22:11 +00:00
Chris Lattner d1aaee03ce target independent notes 
llvm-svn: 25929
 2006-02-03 06:21:43 +00:00
Nate Begeman fc567d85d5 Flesh out a couple of the items in the README 
llvm-svn: 25928
 2006-02-03 05:17:06 +00:00
Jeff Cohen 3276ff7ac6 Fix VC++ compilation error caused by using a std::map iterator variable to receive 
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
 2006-02-03 03:48:54 +00:00
Chris Lattner e18ef0d4a6 Remove move copies and dead stuff by not clobbering the result reg of a noop copy. 
llvm-svn: 25926
 2006-02-03 03:16:14 +00:00
Andrew Lenharth 1318240fd0 isStoreToStackSlot 
llvm-svn: 25925
 2006-02-03 03:07:37 +00:00
Chris Lattner 774d4a190b Simplify some code 
llvm-svn: 25924
 2006-02-03 03:06:49 +00:00
Chris Lattner a1eac9b978 the X86 backend no longer needs to delete its own noop copies 
llvm-svn: 25923
 2006-02-03 02:59:58 +00:00
Chris Lattner 1ef239afb4 Add code that checks for noop copies, which triggers when either: 
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
 2006-02-03 02:02:59 +00:00
Chris Lattner f0a2d66d1c Add a note 
llvm-svn: 25921
 2006-02-03 01:49:49 +00:00
Evan Cheng 02b5b9cdd6 Added case HANDLENODE to getOperationName(). 
llvm-svn: 25920
 2006-02-03 01:33:01 +00:00
Chris Lattner b7f24de4c8 Physregs may hold multiple stack slot values at the same time. Keep track 
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
 2006-02-03 00:36:31 +00:00
Chris Lattner 9b178ce225 update a note 
llvm-svn: 25918
 2006-02-02 23:50:22 +00:00
Chris Lattner f3aef1b004 Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
 2006-02-02 23:29:36 +00:00
Nate Begeman 4efb328926 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. 
llvm-svn: 25916
 2006-02-02 21:07:50 +00:00
Chris Lattner 5123346708 fix operand numbers 
llvm-svn: 25915
 2006-02-02 20:38:12 +00:00
Chris Lattner c327d71e06 implement isStoreToStackSlot for PPC 
llvm-svn: 25914
 2006-02-02 20:16:12 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner 246ee44c8f implement isStoreToStackSlot 
llvm-svn: 25911
 2006-02-02 20:00:41 +00:00
Chris Lattner 0acc90c67e add a method 
llvm-svn: 25910
 2006-02-02 19:57:16 +00:00
Chris Lattner d8208c3665 more notes 
llvm-svn: 25908
 2006-02-02 19:43:28 +00:00
Chris Lattner d3f033e8e0 add a note, I have no idea how important this is. 
llvm-svn: 25907
 2006-02-02 19:16:34 +00:00
Chris Lattner e10e1024bc %fcc is not an alias for %fcc0 
llvm-svn: 25906
 2006-02-02 08:02:20 +00:00
Chris Lattner cb34968d19 correct an opcode 
llvm-svn: 25905
 2006-02-02 07:56:15 +00:00
Chris Lattner 9dd7df7ee7 new example 
llvm-svn: 25903
 2006-02-02 07:37:11 +00:00
Nate Begeman cd018525f8 Update the README 
llvm-svn: 25902
 2006-02-02 07:27:56 +00:00
Chris Lattner 49beaf40fc Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
 2006-02-02 07:17:31 +00:00
Chris Lattner e0c60d63b1 Implement MaskedValueIsZero for ANY_EXTEND nodes 
llvm-svn: 25900
 2006-02-02 06:43:15 +00:00
Chris Lattner 4b2ec8af23 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll 
llvm-svn: 25899
 2006-02-02 06:36:48 +00:00
Chris Lattner 49ce35542f add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
 2006-02-02 06:36:13 +00:00
Evan Cheng d3908f79cb Update. 
llvm-svn: 25896
 2006-02-02 02:40:17 +00:00
Chris Lattner 0bd74558ae make -debug output less newliney 
llvm-svn: 25895
 2006-02-02 00:38:08 +00:00
Evan Cheng d8fba3a1ee Fix a erroneous comment. 
llvm-svn: 25894
 2006-02-02 00:28:23 +00:00
Chris Lattner 7f5880b1c7 Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
 2006-02-02 00:25:23 +00:00
Chris Lattner 2f34a9e332 validate matching constraints and remember when we see them. 
llvm-svn: 25892
 2006-02-02 00:23:53 +00:00
Chris Lattner 6132a87cf4 more notes 
llvm-svn: 25890
 2006-02-01 23:38:08 +00:00
Evan Cheng b3ea2677a4 Tell codegen MOVAPSrr and MOVAPDrr are copies. 
llvm-svn: 25889
 2006-02-01 23:03:16 +00:00
Evan Cheng f1ed826c2a Added SSE entries to foldMemoryOperand(). 
llvm-svn: 25888
 2006-02-01 23:02:25 +00:00
Evan Cheng 8b40cde148 Rearrange code to my liking. :) 
llvm-svn: 25887
 2006-02-01 23:01:57 +00:00
Chris Lattner aa23fa9f43 Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886
 2006-02-01 22:41:11 +00:00
Chris Lattner f7f056751c add a method 
llvm-svn: 25884
 2006-02-01 22:38:46 +00:00
Chris Lattner 2f7650f9dc another note 
llvm-svn: 25883
 2006-02-01 21:44:48 +00:00
Andrew Lenharth 4b1c726fbb Add immediate forms of cmov and remove some cruft 
llvm-svn: 25882
 2006-02-01 19:37:33 +00:00
Nate Begeman 01bd9d9911 *** empty log message *** 
llvm-svn: 25879
 2006-02-01 19:05:15 +00:00
Chris Lattner 1558fc64f9 Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
 2006-02-01 18:59:47 +00:00
Chris Lattner ba56b5dc35 Finegrainify namespacification 
llvm-svn: 25877
 2006-02-01 18:10:56 +00:00
Chris Lattner a983beab37 add a note 
llvm-svn: 25876
 2006-02-01 17:54:23 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner 3da1bb520e add a note, I'll take care of this after nate commits his big patch 
llvm-svn: 25873
 2006-02-01 06:40:32 +00:00
Evan Cheng 9e350cd6ad - Use xor to clear integer registers (set R, 0). 
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872
 2006-02-01 06:13:50 +00:00
Evan Cheng c404b5748c Remove another entry. 
llvm-svn: 25871
 2006-02-01 06:08:48 +00:00
Jeff Cohen b24b66f209 Fix VC++ compilation error. 
llvm-svn: 25869
 2006-02-01 04:37:04 +00:00
Chris Lattner b0a76b0981 Another regression from the pattern isel 
llvm-svn: 25867
 2006-02-01 01:44:25 +00:00
Chris Lattner 7ed3101d14 Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. 
llvm-svn: 25866
 2006-02-01 01:29:47 +00:00
Chris Lattner 3a5ed55187 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
llvm-svn: 25865
 2006-02-01 01:28:23 +00:00
Evan Cheng a24617f5d4 Return's chain should be matching either the chain produced by the 
value or the chain going into the load.

llvm-svn: 25863
 2006-02-01 01:19:32 +00:00
Chris Lattner a0527473ac another testcase. 
llvm-svn: 25862
 2006-02-01 00:28:12 +00:00
Evan Cheng e1ce4d7115 When folding a load into a return of SSE value, check the chain to 
ensure the memory location has not been clobbered.

llvm-svn: 25861
 2006-02-01 00:20:21 +00:00
Evan Cheng bc1fcd074e Remove an item. It's done. 
llvm-svn: 25860
 2006-02-01 00:15:53 +00:00
Evan Cheng 5659ca8f47 Be smarter about whether to store the SSE return value in memory. If 
it is already available in memory, do a fld directly from there.

llvm-svn: 25859
 2006-01-31 23:19:54 +00:00
Chris Lattner 64387c3e9c turning these into 'adds' would require extra copies 
llvm-svn: 25858
 2006-01-31 22:59:46 +00:00
Evan Cheng 72d5c256c9 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. 
- Use XORP* to implement fneg.

llvm-svn: 25857
 2006-01-31 22:28:30 +00:00
Evan Cheng a91eb48547 Remove entries on fabs and fneg. These are done. 
llvm-svn: 25856
 2006-01-31 22:26:21 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner c642aa5e1c * Fix 80-column violations 
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854
 2006-01-31 19:43:35 +00:00
Chris Lattner 0151361d21 add info about the inline asm register constraints for PPC 
llvm-svn: 25853
 2006-01-31 19:20:21 +00:00
Evan Cheng 2443ab932d Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.

llvm-svn: 25852
 2006-01-31 18:14:25 +00:00
Chris Lattner 0962ffc4a6 add a missing break that caused a lot of failures last night :( 
llvm-svn: 25851
 2006-01-31 17:20:06 +00:00
Nate Begeman a162f208ee Codegen 
bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%

llvm-svn: 25848
 2006-01-31 08:17:29 +00:00
Chris Lattner ac9892ccaf okay, one more 
llvm-svn: 25847
 2006-01-31 07:45:45 +00:00
Chris Lattner 882611dc25 another note 
llvm-svn: 25846
 2006-01-31 07:45:08 +00:00
Chris Lattner 24b0742476 More notes 
llvm-svn: 25845
 2006-01-31 07:43:33 +00:00
Chris Lattner 57480d0634 another one 
llvm-svn: 25844
 2006-01-31 07:38:32 +00:00
Chris Lattner 17cd988419 add a note 
llvm-svn: 25843
 2006-01-31 07:37:20 +00:00
Chris Lattner 799716141b add conditional moves of float and double values on int/fp condition codes. 
llvm-svn: 25842
 2006-01-31 07:26:55 +00:00
Chris Lattner b0fe138b65 example nate pointed out 
llvm-svn: 25841
 2006-01-31 07:16:34 +00:00
Chris Lattner 6f9bf658a7 treat conditional branches the same way as conditional moves (giving them 
an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840
 2006-01-31 06:56:30 +00:00
Chris Lattner 21ec192419 compactify all of the integer conditional moves into one instruction that takes 
a CC as an operand.  Much smaller, much happier.

llvm-svn: 25839
 2006-01-31 06:49:09 +00:00
Chris Lattner 196d58373c Add immediate forms of integer cmovs 
llvm-svn: 25838
 2006-01-31 06:24:29 +00:00
Chris Lattner 283492b4fe Shrinkify 
llvm-svn: 25837
 2006-01-31 06:18:16 +00:00
Chris Lattner 70c9e42593 Add the full complement of conditional moves of integer registers. 
llvm-svn: 25834
 2006-01-31 05:26:36 +00:00
Chris Lattner b6493b3165 Compile this: 
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop

llvm-svn: 25833
 2006-01-31 05:05:52 +00:00
Chris Lattner e9721b2984 Only insert an AND when converting from BR_COND to BRCC if needed. 
llvm-svn: 25832
 2006-01-31 05:04:52 +00:00
Evan Cheng 2dd217b88f Added custom lowering of fabs 
llvm-svn: 25831
 2006-01-31 03:14:29 +00:00
Chris Lattner a9bfca8d1e add the 'lucas' optimization 
llvm-svn: 25830
 2006-01-31 02:55:28 +00:00
Chris Lattner 0e70729e83 I don't see why this optimization isn't safe, but it isn't, so disable it 
llvm-svn: 25829
 2006-01-31 02:45:52 +00:00
Chris Lattner d916e78b0a Another high-prio selection performance bug 
llvm-svn: 25828
 2006-01-31 02:10:06 +00:00
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner 2b70a6f853 more mumbling 
llvm-svn: 25826
 2006-01-31 00:45:37 +00:00
Chris Lattner b521361fb9 add some notes 
llvm-svn: 25825
 2006-01-31 00:20:38 +00:00
Evan Cheng 45df7f84ff Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip 
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.

llvm-svn: 25824
 2006-01-30 23:41:35 +00:00
Chris Lattner 57ecb561c6 Print the most trivial inline asms. 
llvm-svn: 25822
 2006-01-30 23:00:08 +00:00
Chris Lattner f263a23735 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
 2006-01-30 22:43:50 +00:00
Chris Lattner 9a90572374 Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night 
llvm-svn: 25819
 2006-01-30 22:20:49 +00:00
Evan Cheng 08390f6a21 i64 -> f32, f32 -> i64 and some clean up. 
llvm-svn: 25818
 2006-01-30 22:13:22 +00:00
Evan Cheng 5b97fcf0f5 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64 
conversions. SSE does not have instructions to handle these tasks.

llvm-svn: 25817
 2006-01-30 08:02:57 +00:00
Chris Lattner 37faeb2b02 Revamp the ICC/FCC reading instructions to be parameterized in terms of the 
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.

llvm-svn: 25815
 2006-01-30 07:43:04 +00:00
Chris Lattner 33a79cae7c Compile: 
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll

llvm-svn: 25814
 2006-01-30 06:14:02 +00:00
Chris Lattner 321e337d95 If the target has V9 instructions, this pass is a noop, don't bother 
running it.

llvm-svn: 25811
 2006-01-30 05:51:14 +00:00
Chris Lattner 90d3fd9e7c When in v9 mode, emit fabsd/fnegd/fmovd 
llvm-svn: 25810
 2006-01-30 05:48:37 +00:00
Chris Lattner 99dcb95e14 First step towards V9 instructions in the V8 backend, two conditional move 
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}

llvm-svn: 25809
 2006-01-30 05:35:57 +00:00
Chris Lattner 238fe93242 Two changes: 
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)

llvm-svn: 25807
 2006-01-30 04:57:43 +00:00
Chris Lattner af209b8b13 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold 
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 25806
 2006-01-30 04:34:44 +00:00
Jeff Cohen baeb39c969 Add AddSymbol() method to DynamicLibrary to work around Windows limitation 
of being unable to search for symbols in an EXE.  It will also allow other
existing hacks to be improved.

llvm-svn: 25805
 2006-01-30 04:33:51 +00:00
Chris Lattner d6f5ae4455 don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.

llvm-svn: 25804
 2006-01-30 04:22:28 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner 4ac0fa2aa5 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, 
allowing redundant and's to be eliminated by the dag combiner.

llvm-svn: 25800
 2006-01-30 03:51:45 +00:00
Chris Lattner 3b40e64aa3 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, 
to permit recursion

llvm-svn: 25799
 2006-01-30 03:49:37 +00:00
Chris Lattner c6fa0282d2 adjust prototype 
llvm-svn: 25798
 2006-01-30 03:49:07 +00:00
Jeff Cohen 8ee89c774b Fix indentation. 
llvm-svn: 25795
 2006-01-29 22:02:52 +00:00
Chris Lattner 4d1ea71a31 Fix RET of promoted values on targets that custom expand RET to a target node. 
llvm-svn: 25794
 2006-01-29 21:02:23 +00:00
Chris Lattner 32058cfb7b Functions that are lazily streamed in from the .bc file are *not* external. 
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704

llvm-svn: 25793
 2006-01-29 20:49:17 +00:00
Chris Lattner 3c6a950653 add another note 
llvm-svn: 25789
 2006-01-29 09:46:06 +00:00
Chris Lattner dabee1f655 add some performance notes from looking at sgefa 
llvm-svn: 25788
 2006-01-29 09:42:20 +00:00
Chris Lattner 7c7cbde0e5 add a high-priority SSE issue from sgefa 
llvm-svn: 25787
 2006-01-29 09:14:47 +00:00
Chris Lattner 5a7a22c9dd add a missed optimization 
llvm-svn: 25786
 2006-01-29 09:08:15 +00:00
Chris Lattner 2c748afd6c cleanups to the ValueTypeActions interface 
llvm-svn: 25785
 2006-01-29 08:42:06 +00:00
Chris Lattner 3072af4d4f Now that OpActions is big enough, we can specify actions for vector types 
llvm-svn: 25784
 2006-01-29 08:41:37 +00:00
Chris Lattner 8a4a3deaf9 clean up interface to ValueTypeActions 
llvm-svn: 25783
 2006-01-29 08:41:12 +00:00
Chris Lattner ccb4476c87 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands 
instead.

llvm-svn: 25780
 2006-01-29 07:58:15 +00:00
Chris Lattner d7738e6b32 disable this for now 
llvm-svn: 25778
 2006-01-29 07:31:33 +00:00
Reid Spencer 0c05a2c99c Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a 
few stores under certain conditions.

llvm-svn: 25777
 2006-01-29 06:48:25 +00:00
Chris Lattner 35d20a4c00 remove now-dead code, the legalizer takes care of this for us 
llvm-svn: 25776
 2006-01-29 06:45:31 +00:00
Chris Lattner 132177e103 The FP stack doesn't support UNDEF, ask the legalizer to legalize it 
instead of lying and saying we have it.

llvm-svn: 25775
 2006-01-29 06:44:22 +00:00
Chris Lattner 2f292789dc Allow custom expansion of ConstantVec nodes. PPC will use this in the future. 
llvm-svn: 25774
 2006-01-29 06:34:16 +00:00
Chris Lattner d33c60b52b Request expansion of ConstantVec nodes. 
llvm-svn: 25773
 2006-01-29 06:32:58 +00:00
Chris Lattner 758b0ac54b Legalize ConstantFP into TargetConstantFP when the target allows. Implement 
custom expansion of ConstantFP nodes.

llvm-svn: 25772
 2006-01-29 06:26:56 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Chris Lattner b5f0ba6051 Update alpha to reflect recent constantfp legalize changes. It's not clear 
why all this code isn't autogenerated. :(

llvm-svn: 25770
 2006-01-29 06:25:22 +00:00
Chris Lattner 678da98835 eliminate uses of SelectionDAG::getBR2Way_CC 
llvm-svn: 25767
 2006-01-29 06:00:45 +00:00
Chris Lattner 1b09c6ba87 cmovle != cmovlt 
llvm-svn: 25761
 2006-01-29 03:47:30 +00:00
Jeff Cohen 4ab39e43e8 Fix typo. 
llvm-svn: 25760
 2006-01-29 03:45:35 +00:00
Jeff Cohen 8643ea67b1 Flesh out AMD family/models. 
llvm-svn: 25755
 2006-01-28 20:30:18 +00:00
Jeff Cohen 58ca0be9af Correctly determine CPU vendor. 
llvm-svn: 25754
 2006-01-28 19:48:34 +00:00
Jeff Cohen 71287085a1 Use union instead of reinterpret_cast. 
llvm-svn: 25751
 2006-01-28 18:47:32 +00:00
Jeff Cohen b5de47cd9a Fix recognition of Intel CPUs. 
llvm-svn: 25750
 2006-01-28 18:38:20 +00:00
Chris Lattner b3ab2d3a42 Is64Bit reflects the capability of the chip, not an aspect of the target os 
llvm-svn: 25749
 2006-01-28 18:23:48 +00:00
Chris Lattner be08957dc5 Fix a bunch of JIT failures with the new isel 
llvm-svn: 25748
 2006-01-28 18:19:37 +00:00
Jeff Cohen e128d5f724 Improve X86 subtarget support for Windows and AMD. 
llvm-svn: 25747
 2006-01-28 18:09:06 +00:00
Chris Lattner d02b05473c Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it 
faster.  This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).

It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change.  Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.

This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.

llvm-svn: 25746
 2006-01-28 10:58:55 +00:00
Chris Lattner ccd2a20c4b silence a warning 
llvm-svn: 25745
 2006-01-28 10:34:47 +00:00
Chris Lattner 580b12ad34 add another method variant 
llvm-svn: 25744
 2006-01-28 10:09:25 +00:00
Chris Lattner f34156e8cb add some methods for updating nodes 
llvm-svn: 25742
 2006-01-28 09:32:45 +00:00
Chris Lattner eb63751499 minor tweaks 
llvm-svn: 25740
 2006-01-28 08:31:04 +00:00
Chris Lattner 689bdcc9cf move a bunch of code, no other change. 
llvm-svn: 25739
 2006-01-28 08:25:58 +00:00
Chris Lattner fcfda5a174 remove a couple more now-extraneous legalizeop's 
llvm-svn: 25738
 2006-01-28 08:22:56 +00:00
Chris Lattner 364b89a784 fix a bug 
llvm-svn: 25737
 2006-01-28 07:42:08 +00:00
Chris Lattner 9dcce6da8e Several major changes: 
1. Pull out the expand cases for BSWAP and CT* into a separate function,
   reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
   iterative.  It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.

llvm-svn: 25736
 2006-01-28 07:39:30 +00:00
Chris Lattner 30432e07f0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to 
provide the expansion for i64 calls itself

llvm-svn: 25735
 2006-01-28 07:33:03 +00:00
Chris Lattner dc8bbb6527 make this work on non-native hosts 
llvm-svn: 25734
 2006-01-28 06:05:41 +00:00
Chris Lattner 0c7b4666a3 add a note about how we should implement this FIXME from the legalizer: 
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
 2006-01-28 05:40:47 +00:00
Chris Lattner fd4a7f76a9 Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already 
relegalizes the stuff it returns.

Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.

Fix some obscure potential bugs and simplify code.

llvm-svn: 25732
 2006-01-28 05:07:51 +00:00
Chris Lattner 10f677508f Instead of making callers of ExpandLibCall legalize the result, make 
ExpandLibCall do it itself.

llvm-svn: 25731
 2006-01-28 04:28:26 +00:00
Chris Lattner a593acfe66 Eliminate the need to do another iteration of the legalizer after inserting 
a libcall.

llvm-svn: 25730
 2006-01-28 04:23:12 +00:00
Chris Lattner 98ed05c81d remove method I just added 
llvm-svn: 25728
 2006-01-28 03:43:09 +00:00
Chris Lattner 43b867dd3b add a new callback 
llvm-svn: 25727
 2006-01-28 03:37:03 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Nate Begeman 6c82262289 Add a couple more things to the readme. 
llvm-svn: 25724
 2006-01-28 01:22:10 +00:00
Nate Begeman af397cec0b Add a missing case to the dag combiner. 
llvm-svn: 25723
 2006-01-28 01:06:30 +00:00
Chris Lattner fb16a62fba Remove the ISD::CALL and ISD::TAILCALL nodes 
llvm-svn: 25721
 2006-01-28 00:18:58 +00:00
Chris Lattner b292de6703 Remove some dead code 
llvm-svn: 25719
 2006-01-28 00:02:51 +00:00
Chris Lattner 2c00db82bd Switch to AlphaISD::CALL instead of ISD::CALL 
llvm-svn: 25718
 2006-01-27 23:39:00 +00:00
Chris Lattner f424a66524 Use PPCISD::CALL instead of ISD::CALL 
llvm-svn: 25717
 2006-01-27 23:34:02 +00:00
Chris Lattner a9382ca59e Use V8ISD::CALL instead of ISD::CALL 
llvm-svn: 25716
 2006-01-27 23:30:03 +00:00
Evan Cheng 18243826fd A bit of wisdom from Chris on the last entry. 
llvm-svn: 25715
 2006-01-27 22:54:32 +00:00
Evan Cheng 63045d221b AT&T assembly convention: registers are in lower case. 
llvm-svn: 25714
 2006-01-27 22:53:29 +00:00
Chris Lattner a502b93fae initialize member vars 
llvm-svn: 25712
 2006-01-27 22:38:36 +00:00
Chris Lattner dbfc299915 initialize all instance vars 
llvm-svn: 25711
 2006-01-27 22:37:09 +00:00
Chris Lattner 4d967a4cbb Make llvm.frame/returnaddr not crash on ppc 
llvm-svn: 25710
 2006-01-27 22:25:06 +00:00
Evan Cheng 9857d075b5 Added notes about a x86 isel deficiency. 
llvm-svn: 25706
 2006-01-27 22:11:01 +00:00
Evan Cheng 1073ae07b0 Added a temporary option -enable-x86-sse to enable sse support. It is used by 
llc-beta.

llvm-svn: 25701
 2006-01-27 21:49:34 +00:00
Evan Cheng a814f0b31c Bye bye Pattern ISel, hello DAG ISel. 
llvm-svn: 25700
 2006-01-27 21:26:54 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Jim Laskey 0cda006a69 Using bit size of integers instead of ambiguous "long" et all. 
llvm-svn: 25694
 2006-01-27 20:31:25 +00:00
Evan Cheng afab7aa8f2 A better workaround 
llvm-svn: 25692
 2006-01-27 19:30:30 +00:00
Jim Laskey 4a84e97421 Sorry - really folowing convention. 
llvm-svn: 25691
 2006-01-27 18:32:41 +00:00
Chris Lattner 4be147f456 force sse/3dnow off until they work. This fixes all the x86 failures last night 
llvm-svn: 25690
 2006-01-27 18:30:50 +00:00
Jim Laskey 116bb15473 Following convention. 
llvm-svn: 25689
 2006-01-27 18:28:31 +00:00
Chris Lattner ed2bb8562f Unbreak the JIT with SSE 
llvm-svn: 25688
 2006-01-27 18:27:18 +00:00
Andrew Lenharth fc3eca9023 fix build 
llvm-svn: 25687
 2006-01-27 18:16:17 +00:00
Chris Lattner ecd7e61a1f Fix build error that is apparently only a warning with some compilers. 
llvm-svn: 25686
 2006-01-27 17:31:30 +00:00
Jim Laskey 2b6efa9d41 Forgot the version number. 
llvm-svn: 25685
 2006-01-27 15:46:54 +00:00
Jim Laskey f98fc8441c Improve visibility/correctness of operand indices in "llvm.db" objects. 
Handle 64 in DIEs.

llvm-svn: 25684
 2006-01-27 15:20:54 +00:00
Reid Spencer 76a8d45e32 Fix auto-upgrade of intrinsics to work properly with both assembly and 
bytecode reading. This code is crufty, the result of much hacking to get things
working correctly. Cleanup patches will follow.

llvm-svn: 25682
 2006-01-27 11:49:27 +00:00
Evan Cheng cde9e30bc6 x86 CPU detection and proper subtarget support 
llvm-svn: 25679
 2006-01-27 08:10:46 +00:00
Evan Cheng d98701c639 Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Chris Lattner 061d9e2cf0 Stub out a method 
llvm-svn: 25676
 2006-01-27 02:10:10 +00:00
Chris Lattner 1240574609 PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Chris Lattner 1c341ac1fe Add a default NoItinerary class for targets to use. 
llvm-svn: 25670
 2006-01-27 01:41:38 +00:00
Chris Lattner 4df279cfda Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an 
ISD::INLINEASM node.

llvm-svn: 25668
 2006-01-26 23:28:04 +00:00
Chris Lattner 476e67be14 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)

llvm-svn: 25664
 2006-01-26 22:24:51 +00:00
Jim Laskey 0689dfad23 Use global information to fill out Dwarf compile units. 
llvm-svn: 25662
 2006-01-26 21:22:49 +00:00
Jeff Cohen 15a8c15a1f Improve compatibility with VC2005, patch by Morten Ofstad! 
llvm-svn: 25661
 2006-01-26 20:41:32 +00:00
Chris Lattner 32fef53f5c Implement a method for inline asm support 
llvm-svn: 25660
 2006-01-26 20:37:03 +00:00
Jim Laskey 0bbdc55333 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
 2006-01-26 20:21:46 +00:00
Chris Lattner ebbfb386a5 Improve compatibility with VC2005, patch by Morten Ofstad! 
llvm-svn: 25653
 2006-01-26 19:55:20 +00:00
Andrew Lenharth 4558e4ae10 dynamically allocate plugin space as needed 
llvm-svn: 25652
 2006-01-26 19:38:58 +00:00
Andrew Lenharth bb4c9c0bd7 Remember plugins should someone like bugpoint want to know them. 
llvm-svn: 25649
 2006-01-26 18:36:50 +00:00
Evan Cheng 54c13da29c Added preliminary x86 subtarget support. 
llvm-svn: 25645
 2006-01-26 09:53:06 +00:00
Duraid Madina 0ebb0b1c5c fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.

llvm-svn: 25644
 2006-01-26 09:45:03 +00:00
Duraid Madina c090ac13bd some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Chris Lattner dbc2aac1e7 Rest of subtarget support, remove references to ppc 
llvm-svn: 25642
 2006-01-26 07:22:22 +00:00
Chris Lattner e6842a9da6 Add trivial subtarget support 
llvm-svn: 25641
 2006-01-26 06:51:21 +00:00
Andrew Lenharth 0a01374299 minor renaming 
llvm-svn: 25640
 2006-01-26 03:24:15 +00:00
Andrew Lenharth 153f808f53 allow R28 to be used for frame calculations without entirely removing it from circulation 
llvm-svn: 25639
 2006-01-26 03:22:07 +00:00
Evan Cheng fcdce6d26f Work around some x86 Darwin assembler bugs 
llvm-svn: 25638
 2006-01-26 02:27:43 +00:00
Chris Lattner c981b8e35a add method for constraint parsing 
llvm-svn: 25637
 2006-01-26 02:21:59 +00:00
Evan Cheng 944d1e91ea When trying to fold X86::SETCC into a Select, make a copy if it has more than 
one use. This allows more CMOV instructions.

llvm-svn: 25634
 2006-01-26 02:13:10 +00:00
Chris Lattner 120f31b1fd teach the cloner to handle inline asms 
llvm-svn: 25633
 2006-01-26 01:55:22 +00:00
Chris Lattner 8547e3ab16 parse and verify the constraint string. 
llvm-svn: 25631
 2006-01-26 00:48:33 +00:00
Evan Cheng c4c339c3d0 Clean up some code; improve efficiency; and fixed a potential bug involving 
chain successors.

llvm-svn: 25630
 2006-01-26 00:30:29 +00:00
Evan Cheng 97c68f0f5c Remove the uses of STATUS flag register. Rely on node property SDNPInFlag, 
SDNPOutFlag, and SDNPOptInFlag instead.

llvm-svn: 25629
 2006-01-26 00:29:36 +00:00
Chris Lattner 41eb5cd9c3 Make sure the only user of InlineAsm's are direct calls. 
llvm-svn: 25626
 2006-01-26 00:08:45 +00:00
Andrew Lenharth 5c3dd5fafd oops 
llvm-svn: 25623
 2006-01-25 23:33:32 +00:00
Chris Lattner 4470691999 add bc reader/writer support for inline asm 
llvm-svn: 25621
 2006-01-25 23:08:15 +00:00
Andrew Lenharth a852660e74 forgot one 
llvm-svn: 25620
 2006-01-25 22:28:07 +00:00
Chris Lattner e0a4ee9db7 regenerate 
llvm-svn: 25619
 2006-01-25 22:27:16 +00:00
Chris Lattner a02d603c18 Parse inline asm objects 
llvm-svn: 25618
 2006-01-25 22:26:43 +00:00
Chris Lattner a2d810d935 Print InlineAsm objects 
llvm-svn: 25617
 2006-01-25 22:26:05 +00:00
Andrew Lenharth 93fd315292 make things compile again 
llvm-svn: 25614
 2006-01-25 21:54:38 +00:00
Reid Spencer 5edde66863 Don't break the optimized build (by incorrect placement of #endif) 
llvm-svn: 25613
 2006-01-25 21:49:13 +00:00
Chris Lattner 8bbcda2fda Change inline asms to be uniqued like constants, not embedded in a Module. 
llvm-svn: 25610
 2006-01-25 18:57:27 +00:00
Chris Lattner d07c86465d initialize an instance var, apparently I forgot to commit this long ago 
llvm-svn: 25609
 2006-01-25 18:57:15 +00:00
Evan Cheng 1880f8db02 No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
 2006-01-25 18:54:24 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Jeff Cohen c3cafb8a67 Make it even more portable. 
llvm-svn: 25605
 2006-01-25 17:18:50 +00:00
Jeff Cohen fb20616aa6 Fix VC++ compilation error. 
llvm-svn: 25604
 2006-01-25 17:17:49 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Evan Cheng 83eeefbbd1 X86 prefer scheduling for reduced register pressure. 
llvm-svn: 25602
 2006-01-25 09:15:17 +00:00
Evan Cheng ab49556cf4 Bottom up register usage reducing list scheduler. 
llvm-svn: 25601
 2006-01-25 09:14:32 +00:00
Evan Cheng fbc88a624a Keep track of bottom / top element of a set of flagged nodes. 
llvm-svn: 25600
 2006-01-25 09:13:41 +00:00
Evan Cheng a6eff8a432 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
 2006-01-25 09:12:57 +00:00
Evan Cheng aff0800fd1 Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it. 
llvm-svn: 25596
 2006-01-25 09:05:09 +00:00
Chris Lattner bc7226a7cc Loosen up these checks to allow direct uses of ESP 
llvm-svn: 25595
 2006-01-25 08:00:36 +00:00
Jeff Cohen a292744ecc Portably cast a pointer to an integer. 
llvm-svn: 25594
 2006-01-25 02:40:10 +00:00
Duraid Madina 5ea06a9f13 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Andrew Lenharth 94150f0666 maintaining stackpointer alignment. Perhaps it doesn't matter 
llvm-svn: 25592
 2006-01-25 01:51:08 +00:00