Commit Graph

13034 Commits

Author SHA1 Message Date
Nate Begeman 7e5496d5fe Kill the x86 pattern isel. boom.
llvm-svn: 26246
2006-02-17 00:03:04 +00:00
Evan Cheng db1dbbe8d6 Remove the entry about using movapd for SSE reg-reg moves.
llvm-svn: 26245
2006-02-17 00:00:58 +00:00
Evan Cheng eb7b3380fd pxor (for FLD0SS) encoding was missing the OpSize prefix.
llvm-svn: 26244
2006-02-16 23:59:30 +00:00
Chris Lattner 936cc9fe53 Remove the skeleton target, it doesn't produce useful code and there are
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
2006-02-16 23:14:50 +00:00
Evan Cheng c3dcf5a4d7 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
2006-02-16 23:11:42 +00:00
Evan Cheng 24c461b51e 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
2006-02-16 22:45:17 +00:00
Evan Cheng 3f99628939 Use movaps / movapd to spill / restore V4F4 / V2F8 registers.
llvm-svn: 26240
2006-02-16 21:20:26 +00:00
Nate Begeman 8a77efe4f7 Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
2006-02-16 21:11:51 +00:00
Chris Lattner fa335f6083 Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :)
This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235
2006-02-16 19:36:22 +00:00
Evan Cheng 01afec2adb MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.
llvm-svn: 26234
2006-02-16 19:34:41 +00:00
Duraid Madina 36a2ee299e distinguish between objects and register names, now we can have stuff
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
2006-02-16 13:12:57 +00:00
Evan Cheng 42c01c8d39 If the false case is the current basic block, then this is a self loop.
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
2006-02-16 08:27:56 +00:00
Chris Lattner 471627c49d Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
by Nate, I'm just committing it for him.

llvm-svn: 26230
2006-02-16 08:02:36 +00:00
Jeff Cohen 55f63f1b53 Fix VC++ warning.
llvm-svn: 26228
2006-02-16 04:07:37 +00:00
Evan Cheng ae82498e81 Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
2006-02-16 01:50:02 +00:00
Chris Lattner ff42e81028 fix a bug where we unswitched the wrong way
llvm-svn: 26225
2006-02-16 01:24:41 +00:00
Evan Cheng 03c1e6f48e A bit more memset / memcpy optimization.
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
2006-02-16 00:21:07 +00:00
Chris Lattner fdff0bb43e Implement trivial unswitching for switch stmts. This allows us to trivial
unswitch this loop on 2 before sweating to unswitch on 1/3.

void test4(int N, int i, int C, int*P, int*Q) {
  int j;
  for (j = 0; j < N; ++j) {
    switch (C) {                // general unswitching.
    default: P[i+j] = 0; break;
    case 1: Q[i+j] = 0; break;
    case 3: P[i+j] = Q[i+j]; break;
    case 2: break;              //  TRIVIAL UNSWITCH on C==2
    }
  }
}

llvm-svn: 26223
2006-02-15 22:52:05 +00:00
Evan Cheng 76a7775ce1 Remove an entry.
llvm-svn: 26222
2006-02-15 22:14:34 +00:00
Evan Cheng 93e4865d4b Remove an unused function parameter.
llvm-svn: 26221
2006-02-15 22:12:35 +00:00
Chris Lattner e5cb76d744 make "trivial" unswitching significantly more general. It can now handle
this for example:

  for (j = 0; j < N; ++j) {     // trivial unswitch
    if (C)
      P[i+j] = 0;
  }

turning it into the obvious code without bothering to duplicate an empty loop.

llvm-svn: 26220
2006-02-15 22:03:36 +00:00
Evan Cheng 6781b6e62e Turn a memcpy from string constant into a series of stores of constant values.
llvm-svn: 26219
2006-02-15 21:59:04 +00:00
Andrew Lenharth 47da60130a fix a bunch of alpha regressions. see bug 709
llvm-svn: 26218
2006-02-15 21:13:37 +00:00
Chris Lattner 6afb5587da new test
llvm-svn: 26217
2006-02-15 19:52:06 +00:00
Jim Laskey 2eea436192 Should not combine ISD::LOCATIONs until we have scheme to remove from
MachineDebugInfo tables.

llvm-svn: 26216
2006-02-15 19:34:44 +00:00
Chris Lattner 65152d80ec Checking the wrong value. This caused us to emit silly code like
Y = seteq bool X, true
instead of just using X :)

llvm-svn: 26215
2006-02-15 19:05:52 +00:00
Chris Lattner f20e61f003 Convert this over to work with the new makefiles
llvm-svn: 26206
2006-02-15 07:22:58 +00:00
Chris Lattner 6db414e8de Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires
it, because this:

.bss
X:
.byte 0

results in the assembler warning: "initialization in bss segment".  Annoying.

llvm-svn: 26204
2006-02-15 07:07:14 +00:00
Chris Lattner 7edc87279c random lexer change to test the makefile updating stuff
llvm-svn: 26203
2006-02-15 07:02:59 +00:00
Chris Lattner a9d0b5800a Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.

llvm-svn: 26202
2006-02-15 06:41:34 +00:00
Evan Cheng 7a6c21ac26 Remove an entry.
llvm-svn: 26197
2006-02-15 01:56:48 +00:00
Evan Cheng 2d23c9f1ab Use .zerofill on x86/darwin.
llvm-svn: 26196
2006-02-15 01:56:23 +00:00
Evan Cheng e2038bdeee Lower memcpy with small constant size operand into a series of load / store
ops.

llvm-svn: 26195
2006-02-15 01:54:51 +00:00
Chris Lattner 01db04efb0 more refactoring, no functionality change.
llvm-svn: 26194
2006-02-15 01:44:42 +00:00
Evan Cheng aacc4c3b4c cvtsd2ss / cvtss2sd encoding bug.
llvm-svn: 26193
2006-02-15 00:31:03 +00:00
Evan Cheng 665c26ab40 movaps, movapd encoding bug.
llvm-svn: 26192
2006-02-15 00:11:37 +00:00
Chris Lattner b0cbe7106e pull some code out into a function
llvm-svn: 26191
2006-02-15 00:07:43 +00:00
Chris Lattner 9c5693fb2a Canonicalize inner loops before outer loops. Inner loop canonicalization
can provide work for the outer loop to canonicalize.

This fixes a case that breaks unswitching.

llvm-svn: 26189
2006-02-14 23:06:02 +00:00
Evan Cheng 0451499b3c Doh again!
llvm-svn: 26188
2006-02-14 23:05:54 +00:00
Chris Lattner cffbbee8d1 When splitting exit edges to canonicalize loops, make sure to put the new
block in the appropriate loop nest.

Third time is the charm, right?

llvm-svn: 26187
2006-02-14 22:34:08 +00:00
Chris Lattner e3c793a71a new note
llvm-svn: 26186
2006-02-14 22:19:54 +00:00
Chris Lattner b134520b86 If we have zero initialized data with external linkage, use .zerofill to
emit it (instead of .space), saving a bit of space in the .o file.

For example:
int foo[100];
int bar[100] = {};

when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space.  The X86 backend can also do this on darwin.

llvm-svn: 26185
2006-02-14 22:18:23 +00:00
Jim Laskey ebb50a61d2 Using wrong DW_FORM.
llvm-svn: 26184
2006-02-14 22:01:57 +00:00
Evan Cheng f84774ed46 Don't special case XS, XD prefixes.
llvm-svn: 26183
2006-02-14 21:52:51 +00:00
Evan Cheng fb7b5ef74b Bug fix: XS, XD prefixes were being emitted twice.
XMM registers were not being handled.

llvm-svn: 26182
2006-02-14 21:45:24 +00:00
Chris Lattner 84fb09eba4 Make sure that weak functions are aligned properly
llvm-svn: 26181
2006-02-14 20:42:33 +00:00
Evan Cheng 43b72f4421 Duh
llvm-svn: 26180
2006-02-14 20:37:37 +00:00
Evan Cheng ad8c20cd2b Remove -disable-x86-sse
llvm-svn: 26179
2006-02-14 20:30:14 +00:00
Chris Lattner 94f936d8ef add an assert
llvm-svn: 26178
2006-02-14 20:14:17 +00:00
Evan Cheng db2a7a736a Keep to < 80 cols
llvm-svn: 26177
2006-02-14 20:12:38 +00:00
Evan Cheng 038521ef76 Missed a break so memcpy cases fell through to memset. Doh.
llvm-svn: 26176
2006-02-14 19:45:56 +00:00
Evan Cheng d502610604 Fixed a build breakage.
llvm-svn: 26175
2006-02-14 09:11:59 +00:00
Evan Cheng 4b40a42653 Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
llvm-svn: 26174
2006-02-14 08:38:30 +00:00
Evan Cheng f976d79f78 Add a entry.
llvm-svn: 26173
2006-02-14 08:25:32 +00:00
Evan Cheng 6a37456d73 Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and
maxStoresPerMemMove. Although the last one is not used.

llvm-svn: 26172
2006-02-14 08:25:08 +00:00
Evan Cheng 81fcea8aa2 Expand memset dst, c, size to a series of stores if size falls below the
target specific theshold, e.g. 16 for x86.

llvm-svn: 26171
2006-02-14 08:22:34 +00:00
Evan Cheng 40b6eb9973 Enable SSE (for the right subtargets)
llvm-svn: 26169
2006-02-14 08:07:58 +00:00
Chris Lattner 1784a9d267 now that libcalls don't suck, we can remove this hack
llvm-svn: 26164
2006-02-14 05:39:35 +00:00
Chris Lattner 0242688ad8 adjust to new style of handling lexer changes
llvm-svn: 26162
2006-02-14 05:14:46 +00:00
Chris Lattner 0b8ec1a132 Use statistics to keep track of what flavors of loops we are unswitching
llvm-svn: 26157
2006-02-14 01:01:41 +00:00
Chris Lattner 8e2ee7358f Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86)
create these nodes with flag results.  Remember that we legalized them.

llvm-svn: 26156
2006-02-14 00:55:02 +00:00
Chris Lattner 8b10ab3002 Implement Instcombine/and.ll:test34
llvm-svn: 26155
2006-02-13 23:07:23 +00:00
Chris Lattner 7d8522884b If any of the sign extended bits are demanded, the input sign bit is demanded
for a sign extension.

This fixes InstCombine/2006-02-13-DemandedMiscompile.ll and Ptrdist/bc.

llvm-svn: 26152
2006-02-13 22:41:07 +00:00
Chris Lattner d2d174dd0e Another hack due to allowing multiple symbols with the same name.
llvm-svn: 26150
2006-02-13 22:22:42 +00:00
Chris Lattner eea0f0198e Another work around for the 'symbols with different types can have the same
name' issue.

llvm-svn: 26149
2006-02-13 21:43:26 +00:00
Andrew Lenharth a438ef0ee7 improved zap discovery
llvm-svn: 26148
2006-02-13 18:52:29 +00:00
Jim Laskey 390c63e9d9 Rename to better reflect usage (current and planned.)
llvm-svn: 26145
2006-02-13 12:50:39 +00:00
Chris Lattner 462505fc5f Completely rewrite libcall insertion by the legalizer, providing the
following handy-dandy properties:

1. it is always correct now
2. it is much faster than before
3. it is easier to understand

This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.

This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).

llvm-svn: 26144
2006-02-13 09:18:02 +00:00
Chris Lattner 62c3484e43 Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.

llvm-svn: 26143
2006-02-13 09:00:43 +00:00
Chris Lattner 3a0ad47b39 Switch to using getCALLSEQ_START instead of using our own creation calls
llvm-svn: 26142
2006-02-13 08:55:29 +00:00
Chris Lattner 68e7475777 Be careful not to request or look at bits shifted in from outside the size
of the input.  This fixes the mediabench/gsm/toast failure last night.

llvm-svn: 26138
2006-02-13 06:09:08 +00:00
Nate Begeman bc3ec1d37b Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/
PowerPC/and-imm.ll

llvm-svn: 26136
2006-02-12 09:09:52 +00:00
Chris Lattner f5b4ef7f58 remove some more dead special case code
llvm-svn: 26135
2006-02-12 08:07:37 +00:00
Chris Lattner 5b2edb1fca Eliminate special case hacks that are superceded by general purpose hacks
llvm-svn: 26134
2006-02-12 08:02:11 +00:00
Chris Lattner ee0f280743 Three changes:
1. Teach GetConstantInType to handle boolean constants.
2. Teach instcombine to fold (compare X, CST) when X has known 0/1 bits.
   Testcase here: set.ll:test22
3. Improve the "(X >> c1) & C2 == 0" folding code to allow a noop cast
   between the shift and and.  More aggressive bitfolding for other reasons
   was turning signed shr's into unsigned shr's, leaving the noop cast in
   the way.

llvm-svn: 26131
2006-02-12 02:07:56 +00:00
Chris Lattner 02f53ad3a2 Revert my last patch. It too breaks stuff
llvm-svn: 26128
2006-02-12 01:59:10 +00:00
Chris Lattner 35248e06bc Fix for my previously reverted patch
llvm-svn: 26126
2006-02-11 21:24:54 +00:00
Chris Lattner 0157e7f55b Port the recent innovations in ComputeMaskedBits to SimplifyDemandedBits.
This allows us to simplify on conditions where bits are not known, but they
are not demanded either!  This also fixes a couple of bugs in
ComputeMaskedBits that were exposed during this work.

In the future, swaths of instcombine should be removed, as this code
subsumes a bunch of ad-hockery.

llvm-svn: 26122
2006-02-11 09:31:47 +00:00
Chris Lattner b24ce3a2a8 revert my previous change, it exposed other problems.
llvm-svn: 26121
2006-02-11 08:47:47 +00:00
Duraid Madina 4698e4f5fe fix storing booleans (grawp missed this one)
llvm-svn: 26120
2006-02-11 07:33:17 +00:00
Duraid Madina 0010a92375 now short immediates will get matched (previously constants were all
triggering movl 64bit imm fat instructions)

llvm-svn: 26119
2006-02-11 07:32:15 +00:00
Chris Lattner 05bf90dddf Make this check stricter. Disallow loop exit blocks from being shared by
loops and their subloops.

llvm-svn: 26118
2006-02-11 02:13:17 +00:00
Evan Cheng a86ba85dc5 Prevent certain nodes that have already been selected from being folded into
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.

llvm-svn: 26117
2006-02-11 02:05:36 +00:00
Chris Lattner a6ae101afa remove dead expr
llvm-svn: 26116
2006-02-11 01:43:37 +00:00
Jim Laskey 5995d0160c Reorg for integration with gcc4. Old style debug info will not be passed though
to SelIDAG.

llvm-svn: 26115
2006-02-11 01:01:30 +00:00
Chris Lattner fbadd7e1ee implement unswitching of loops with switch stmts and selects in them
llvm-svn: 26114
2006-02-11 00:43:37 +00:00
Chris Lattner f1b151684d Update PHI nodes in successors of exit blocks.
llvm-svn: 26113
2006-02-10 23:26:14 +00:00
Chris Lattner fe4151efe7 Reform the unswitching code in terms of edge splitting, not block splitting.
llvm-svn: 26112
2006-02-10 23:16:39 +00:00
Evan Cheng 2b6f78b664 Nicer code. :-)
llvm-svn: 26111
2006-02-10 22:46:26 +00:00
Evan Cheng d49cc3634e Added X86 isel debugging stuff.
llvm-svn: 26110
2006-02-10 22:24:32 +00:00
Chris Lattner ec6b40a093 Fix a case where UnswitchTrivialCondition broke critical edges with
phi's in the successors

llvm-svn: 26108
2006-02-10 19:08:15 +00:00
Chris Lattner fcb8a3aa76 Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
intrinsics.

Autogen frameindex matcher

llvm-svn: 26107
2006-02-10 07:35:42 +00:00
Chris Lattner 0c4dea4cb2 Update to new-style flags usage, simplifying the .td file
llvm-svn: 26106
2006-02-10 06:58:25 +00:00
Evan Cheng 907be3e24c Remove a completed entry; add a new entry about fisttp op
llvm-svn: 26105
2006-02-10 05:48:15 +00:00
Chris Lattner 6e263155a6 add some notes, move some code around. Implement unswitching of loops
with branches on partially invariant computations.

llvm-svn: 26104
2006-02-10 02:30:37 +00:00
Chris Lattner 4935417a84 Move code around to be more logical, no functionality change.
llvm-svn: 26103
2006-02-10 02:01:22 +00:00
Chris Lattner 3fc3148b85 When unswitching a trivial loop, do admit we are doing it! :)
llvm-svn: 26102
2006-02-10 01:36:35 +00:00
Chris Lattner ed7a67b0de Implement unconditional unswitching of 'trivial' loops, those loops that contain
branches in their entry block that control whether or not the loop is a noop or not.

llvm-svn: 26101
2006-02-10 01:24:09 +00:00
Chris Lattner 4f0e66df6a Simplify control flow a bit, note that unswitch preserves canonical loop form
llvm-svn: 26098
2006-02-09 22:15:42 +00:00
Evan Cheng 101e4b916a Match tblgen change.
llvm-svn: 26096
2006-02-09 22:12:53 +00:00
Evan Cheng a1ef3ec5b5 Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).

llvm-svn: 26094
2006-02-09 22:11:03 +00:00
Chris Lattner 8976219850 Make the threshold a parameter
llvm-svn: 26093
2006-02-09 20:15:48 +00:00
Chris Lattner 4c0bd5bcdf Done
llvm-svn: 26091
2006-02-09 20:00:19 +00:00
Chris Lattner 5259aa1c86 Enable LSR by default for SPARC: it is a clear win.
llvm-svn: 26090
2006-02-09 19:59:55 +00:00
Chris Lattner 2826e0511b Simplify the loop-unswitch pass, by not even trying to unswitch loops with
uses of loop values outside the loop.  We need loop-closed SSA form to do
this right, or to use SSA rewriting if we really care.

llvm-svn: 26089
2006-02-09 19:14:52 +00:00
Chris Lattner 24cd2fa269 Fix 80-column violations
llvm-svn: 26088
2006-02-09 07:41:14 +00:00
Chris Lattner 4534dd59a3 Enhance MVIZ in three ways:
1. Teach it new tricks: in particular how to propagate through signed shr and sexts.
2. Teach it to return a bitset of known-1 and known-0 bits, instead of just zero.
3. Teach instcombine (AND X, C) to fold when we know all C bits of X.

This implements Regression/Transforms/InstCombine/bittest.ll, and allows
future things to be simplified.

llvm-svn: 26087
2006-02-09 07:38:58 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand).
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng d3f1db93c1 More changes to reduce frame size.
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.

llvm-svn: 26083
2006-02-09 07:15:23 +00:00
Chris Lattner c75d5b093d add an option to turn on LSR.
llvm-svn: 26080
2006-02-09 05:06:36 +00:00
Chris Lattner 729ffe95c4 simplify this code now that each constant pool entry is not separately allocated
llvm-svn: 26079
2006-02-09 04:49:59 +00:00
Chris Lattner f6190821da Adjust to MachineConstantPool interface change: instead of keeping a
value/alignment pair for each constant, keep a value/offset pair.

llvm-svn: 26078
2006-02-09 04:46:04 +00:00
Chris Lattner ba97264e72 rename fields of constant pool entries
llvm-svn: 26076
2006-02-09 04:22:52 +00:00
Chris Lattner 47f7319f00 Simplify code, alignment must be specified now.
llvm-svn: 26074
2006-02-09 02:26:04 +00:00
Chris Lattner 4576bb74d5 Make MachineConstantPool entries alignments explicit
llvm-svn: 26071
2006-02-09 02:23:13 +00:00
Chris Lattner 832d78d981 Always pass in an alignment.
llvm-svn: 26070
2006-02-09 02:19:16 +00:00
Chris Lattner d94a3d2c8a provide an explicit alignment for cp entries
llvm-svn: 26069
2006-02-09 02:15:30 +00:00
Evan Cheng 6dc90ca172 Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Chris Lattner 2e07d6370a Darwin doesn't support #APP/#NO_APP
llvm-svn: 26066
2006-02-08 23:42:22 +00:00
Chris Lattner ed87dcd45f Add support for assembler directives that wrap inline asm
llvm-svn: 26065
2006-02-08 23:41:56 +00:00
Chris Lattner 26e385a623 Rename BSel -> PPCBSel for the benefit of doxygen users.
Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.

llvm-svn: 26064
2006-02-08 19:33:26 +00:00
Chris Lattner b4fc050f0f add a simple optimization
llvm-svn: 26062
2006-02-08 17:47:22 +00:00
Chris Lattner ab2dc4d70d Simplify some code, reducing calls to MaskedValueIsZero. Implement a minor
optimization where we reduce the number of bits in AND masks when possible.

llvm-svn: 26056
2006-02-08 07:34:50 +00:00
Chris Lattner b7e074ab9b more email -> README moving
llvm-svn: 26054
2006-02-08 07:12:07 +00:00
Chris Lattner f7b962d7d7 Emit the 'mr' pseudoop for easier reading.
llvm-svn: 26053
2006-02-08 06:56:40 +00:00
Chris Lattner 45bb34b715 Add some random notes, not high-prio
llvm-svn: 26052
2006-02-08 06:52:06 +00:00
Chris Lattner b97142eec0 Move emails from nate into public places
llvm-svn: 26051
2006-02-08 06:43:51 +00:00
Chris Lattner 5997cf9381 Use EraseInstFromFunction in a few cases to put the uses of the removed
instruction onto the worklist (in case they are now dead).

Add a really trivial local DSE implementation to help out bitfield code.
We now fold this:

struct S {
    unsigned char a : 1, b : 1, c : 1, d : 2, e : 3;
    S();
};

S::S() : a(0), b(0), c(1), d(0), e(6) {}

to this:

void %_ZN1SC1Ev(%struct.S* %this) {
entry:
        %tmp.1 = getelementptr %struct.S* %this, int 0, uint 0
        store ubyte 38, ubyte* %tmp.1
        ret void
}

much earlier (in gccas instead of only in gccld after DSE runs).

llvm-svn: 26050
2006-02-08 03:25:32 +00:00
Chris Lattner 06a0ed1ee0 Implement some more interesting select sccp cases. This implements:
test/Regression/Transforms/SCCP/select.ll

llvm-svn: 26049
2006-02-08 02:38:11 +00:00
Chris Lattner a10e23c19f Compile this:
xori r6, r2, 1
        rlwinm r6, r6, 0, 31, 31
        cmpwi cr0, r6, 0
        bne cr0, LBB1_3 ; endif

to this:

        rlwinm r6, r2, 0, 31, 31
        cmpwi cr0, r6, 0
        beq cr0, LBB1_3 ; endif

llvm-svn: 26047
2006-02-08 02:13:15 +00:00
Chris Lattner ddba3289b5 Fix a problem in my patch yesterday, causing a miscompilation of 176.gcc
llvm-svn: 26045
2006-02-08 01:20:23 +00:00
Evan Cheng adeb8fb5a2 Fixed a local common symbol bug.
llvm-svn: 26044
2006-02-07 23:32:58 +00:00
Evan Cheng ec212fb66d For ELF, .comm takes alignment value as the optional 3rd argument. It must be
specified in bytes.

llvm-svn: 26043
2006-02-07 21:54:08 +00:00
Chris Lattner 203b2f1288 Implement getConstraintType for PPC.
llvm-svn: 26042
2006-02-07 20:16:30 +00:00
Chris Lattner 44314827d6 Fix Transforms/InstCombine/2006-02-07-SextZextCrash.ll
llvm-svn: 26040
2006-02-07 19:07:40 +00:00
Evan Cheng 5a76680de1 Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete.
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.

llvm-svn: 26038
2006-02-07 08:38:37 +00:00
Evan Cheng 227e469c25 Remind myself to add PIC and static asm printer support.
llvm-svn: 26037
2006-02-07 08:35:44 +00:00
Chris Lattner 92a6865321 Generalize MaskedValueIsZero into a ComputeMaskedNonZeroBits function, which
is just as efficient as MVIZ and is also more general.

Fix a few minor bugs introduced in recent patches

llvm-svn: 26036
2006-02-07 08:05:22 +00:00
Chris Lattner c3ebf40031 Make MaskedValueIsZero take a uint64_t instead of a ConstantIntegral as a
mask.  This allows the code to be simpler and more efficient.

Also, generalize some of the cases in MVIZ a bit, making it slightly more aggressive.

llvm-svn: 26035
2006-02-07 07:27:52 +00:00
Chris Lattner 77defbae0a Use Type::getIntegralTypeMask() to simplify some code
llvm-svn: 26034
2006-02-07 07:00:41 +00:00
Chris Lattner 2590e511d8 Implement the beginnings of a facility for simplifying expressions based on
'demanded bits', inspired by Nate's work in the dag combiner.  This isn't
complete, but needs to unrelated instcombiner changes to continue.

llvm-svn: 26033
2006-02-07 06:56:34 +00:00
Jeff Cohen 2439669c6f The interpreter assumes that the caller of runFunction() must be lli, and
therefore the function being called must be a main() returning an int.  The
consequences when these assumptions are false are not good, so don't assume
them.

llvm-svn: 26031
2006-02-07 05:29:44 +00:00
Jeff Cohen 69e849014c Teach the interpreter to handle global variables that are added to a module after
interpretation has begun.  The JIT already handles this situation correctly, and
the interpreter can already handle new functions being added.

llvm-svn: 26030
2006-02-07 05:11:57 +00:00
Chris Lattner 15a6c4c444 Add the simple PPC integer constraints
llvm-svn: 26027
2006-02-07 00:47:13 +00:00
Chris Lattner d62a3bfa66 Eliminate the printCallOperand method, using a 'call' modifier on
printOperand instead.

llvm-svn: 26025
2006-02-06 23:41:19 +00:00
Chris Lattner 2bf2c8d7e7 Change prototype
llvm-svn: 26022
2006-02-06 22:18:19 +00:00
Chris Lattner 34f74c180a Add support for modifier characters to operand printers
llvm-svn: 26021
2006-02-06 22:17:23 +00:00
Jim Laskey 0458fb76fd Goodbye nasty macro.
llvm-svn: 26019
2006-02-06 21:54:05 +00:00
Jim Laskey b643ff5546 Edit requests from Sabre.
llvm-svn: 26018
2006-02-06 19:12:02 +00:00
Andrew Lenharth f5b7f16259 see what this allignment thing will do
llvm-svn: 26017
2006-02-06 17:15:17 +00:00
Jim Laskey 85263234a8 Changing model for the construction of debug information.
llvm-svn: 26016
2006-02-06 15:33:21 +00:00
Jim Laskey 58d48c8118 We seem to have settled to __DWARF for section name.
llvm-svn: 26015
2006-02-06 14:16:15 +00:00
Evan Cheng d5f2ba0d6f - Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
2006-02-06 06:02:33 +00:00
Evan Cheng bfa4b7cc75 Complex pattern isel code shouldn't select nodes.
llvm-svn: 26010
2006-02-05 08:45:01 +00:00
Chris Lattner 463fa70eaa Fix the Sparc backend with Evan's recent tblgen changes
llvm-svn: 26009
2006-02-05 08:35:50 +00:00
Chris Lattner 8467e5d6af This xform isn't safe
llvm-svn: 26007
2006-02-05 08:26:16 +00:00
Nate Begeman 8c9cd461df Back out previous commit, it isn't safe.
llvm-svn: 26006
2006-02-05 08:23:00 +00:00
Nate Begeman 3dc8b89493 fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.
llvm-svn: 26005
2006-02-05 08:07:24 +00:00
Chris Lattner 4b8fcc229f some stuff is done
llvm-svn: 26004
2006-02-05 07:54:37 +00:00
Chris Lattner 2e90b732fa Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) [urem only].
Turn A / (C1 << N), where C1 is "1<<C2" into A >> (N+C2) [udiv only].

Tested with: rem.ll:test5, div.ll:test10

llvm-svn: 26003
2006-02-05 07:54:04 +00:00
Nate Begeman c89fdf1eb3 Handle urem by shifted powers of 2.
llvm-svn: 26001
2006-02-05 07:36:48 +00:00
Nate Begeman 25d178bece handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2
llvm-svn: 26000
2006-02-05 07:20:23 +00:00
Evan Cheng a28b764886 Use SelectRoot() as the entry to any tblgen based isel.
llvm-svn: 25998
2006-02-05 06:51:51 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Chris Lattner 25777c8c25 Remove the SparcV8 backend. It has been renamed to be the Sparc backend.
llvm-svn: 25992
2006-02-05 06:33:29 +00:00
Chris Lattner a3e5b2c61c remove V8 reference
llvm-svn: 25991
2006-02-05 06:32:59 +00:00
Evan Cheng d37645c07d * Added SDNode::isOnlyUse().
* Fix hasNUsesOfValue(), it should be const.

llvm-svn: 25990
2006-02-05 06:29:23 +00:00
Chris Lattner 158e1f519c Rename SPARC V8 target to be the LLVM SPARC target.
llvm-svn: 25985
2006-02-05 05:50:24 +00:00
Chris Lattner c0e48c6c58 add a note
llvm-svn: 25984
2006-02-05 05:27:35 +00:00
Evan Cheng d19d51f414 Re-commit the last bit of change that was backed out.
llvm-svn: 25983
2006-02-05 05:25:07 +00:00
Chris Lattner cbab28414e make sure that global doubles are aligned to 8 bytes
llvm-svn: 25981
2006-02-05 01:46:49 +00:00
Chris Lattner c070cb685d Use getPreferredAlignmentLog.
llvm-svn: 25980
2006-02-05 01:45:04 +00:00
Chris Lattner 1b1a8731c0 Use the asmprinter to find out what the preferred alignment of a global is.
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.

llvm-svn: 25979
2006-02-05 01:30:45 +00:00
Chris Lattner a9b2525d3e Implement the AsmPrinter::getPreferredAlignmentLog method.
llvm-svn: 25978
2006-02-05 01:29:18 +00:00
Andrew Lenharth 1fcff15f86 linkage fix for weak functions
llvm-svn: 25976
2006-02-04 19:13:09 +00:00
Jeff Cohen 95ae171d5b Fix VC++ warning.
llvm-svn: 25975
2006-02-04 16:20:31 +00:00
Chris Lattner d30c4991a1 Use SCEVExpander::InsertCastOfTo instead of our own code. This reduces
#LLVM LOC, and auto-cse's cast instructions.

llvm-svn: 25974
2006-02-04 09:52:43 +00:00
Chris Lattner a6da69cab0 Pull the InsertCastOfTo out of the header, implement CSE'ing of arguments.
llvm-svn: 25973
2006-02-04 09:51:53 +00:00
Chris Lattner 22b4edfb42 Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.

llvm-svn: 25971
2006-02-04 09:24:16 +00:00
Chris Lattner b6a1865bca Value# select instructions, allowing -gcse to remove duplicates
llvm-svn: 25969
2006-02-04 09:15:29 +00:00
Evan Cheng ce87cac555 Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.

llvm-svn: 25968
2006-02-04 08:50:49 +00:00
Chris Lattner ab146eae38 Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.

llvm-svn: 25967
2006-02-04 08:31:30 +00:00
Chris Lattner a1fa8b1c88 Fix a nasty typo that broke functions with big stack frames.
llvm-svn: 25966
2006-02-04 08:04:21 +00:00
Chris Lattner d096b2f3e0 fix a bug in my last checkin
llvm-svn: 25965
2006-02-04 07:48:46 +00:00
Chris Lattner 2959f0003e Fix two significant bugs in LSR:
1. When rewriting code in outer loops, sometimes we would insert code into
   inner loops that is invariant in that loop.
2. Notice that 4*(2+x) is 8+4*x and use that to simplify expressions.

This is a performance neutral change.

llvm-svn: 25964
2006-02-04 07:36:50 +00:00
Nate Begeman a1e895cf97 Remove some stuff that now works
llvm-svn: 25963
2006-02-04 07:29:35 +00:00
Chris Lattner 32ed2b45c7 add a note
llvm-svn: 25962
2006-02-04 07:07:31 +00:00
Chris Lattner 2c0956bcea Two changes:
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
   ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
   up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.

llvm-svn: 25961
2006-02-04 06:58:46 +00:00
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind
llvm-svn: 25960
2006-02-04 06:49:00 +00:00
Chris Lattner 2d2e2e3c0e Let bugpoint work on sparc with v9 instructions enabled.
llvm-svn: 25958
2006-02-04 05:02:27 +00:00
Jeff Cohen 57a004abfe Fix VC++ warning.
llvm-svn: 25957
2006-02-04 03:27:39 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this:
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
2006-02-04 02:26:14 +00:00
Evan Cheng 0a977c95aa Remove an unnecessary predicate.
llvm-svn: 25954
2006-02-04 02:23:01 +00:00
Evan Cheng 11613a5219 Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a
flag so it can be flagged to a FST.

llvm-svn: 25953
2006-02-04 02:20:30 +00:00
Chris Lattner 65ad53feb3 Initial early support for non-register operands, like immediates
llvm-svn: 25952
2006-02-04 02:16:44 +00:00
Chris Lattner ee1dadbccf implementation of some methods for inlineasm
llvm-svn: 25951
2006-02-04 02:13:02 +00:00
Chris Lattner c93403a7fb Handle another case exposed on X86.
llvm-svn: 25949
2006-02-03 23:50:46 +00:00
Chris Lattner 71d20c4e18 Fix a nasty problem on two-address machines in the following situation:
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
2006-02-03 23:28:46 +00:00
Chris Lattner 507a3a7bd1 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
2006-02-03 23:13:58 +00:00
Nate Begeman 20a894282d Implement some feedback from sabre
llvm-svn: 25946
2006-02-03 22:38:07 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits.
llvm-svn: 25945
2006-02-03 22:24:05 +00:00
Chris Lattner 81e66abd1e add a note
llvm-svn: 25944
2006-02-03 22:06:45 +00:00
Chris Lattner d079dbb9b0 another case Nate came up with
llvm-svn: 25943
2006-02-03 22:05:41 +00:00
Chris Lattner 277462e20f add a note
llvm-svn: 25942
2006-02-03 21:25:23 +00:00
Chris Lattner f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway.
llvm-svn: 25941
2006-02-03 20:13:59 +00:00
Chris Lattner a1d312c6ea remove an old comment
llvm-svn: 25940
2006-02-03 18:59:39 +00:00
Chris Lattner 23d55f2547 Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete.  yaay :)

llvm-svn: 25939
2006-02-03 18:54:24 +00:00
Chris Lattner c408558638 When rewriting frame instructions, emit the appropriate small-immediate
instruction when possible.

llvm-svn: 25938
2006-02-03 18:20:04 +00:00
Chris Lattner ca76917388 Teach sparc to fold loads/stores into copies.
Remove the dead getRegClassForType method
minor formating changes.

llvm-svn: 25936
2006-02-03 07:06:25 +00:00
Chris Lattner 6091407783 remove dead fn
llvm-svn: 25935
2006-02-03 06:51:34 +00:00
Nate Begeman 22e251abf1 Add common code for reassociating ops in the dag combiner
llvm-svn: 25934
2006-02-03 06:46:56 +00:00
Chris Lattner d7d98611ca Implement isLoadFromStackSlot and isStoreToStackSlot
llvm-svn: 25932
2006-02-03 06:44:54 +00:00
Chris Lattner a23b04acdb remove some target-indep and implemented notes
llvm-svn: 25930
2006-02-03 06:22:11 +00:00
Chris Lattner d1aaee03ce target independent notes
llvm-svn: 25929
2006-02-03 06:21:43 +00:00
Nate Begeman fc567d85d5 Flesh out a couple of the items in the README
llvm-svn: 25928
2006-02-03 05:17:06 +00:00
Jeff Cohen 3276ff7ac6 Fix VC++ compilation error caused by using a std::map iterator variable to receive
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
2006-02-03 03:48:54 +00:00
Chris Lattner e18ef0d4a6 Remove move copies and dead stuff by not clobbering the result reg of a noop copy.
llvm-svn: 25926
2006-02-03 03:16:14 +00:00
Andrew Lenharth 1318240fd0 isStoreToStackSlot
llvm-svn: 25925
2006-02-03 03:07:37 +00:00
Chris Lattner 774d4a190b Simplify some code
llvm-svn: 25924
2006-02-03 03:06:49 +00:00
Chris Lattner a1eac9b978 the X86 backend no longer needs to delete its own noop copies
llvm-svn: 25923
2006-02-03 02:59:58 +00:00
Chris Lattner 1ef239afb4 Add code that checks for noop copies, which triggers when either:
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
2006-02-03 02:02:59 +00:00
Chris Lattner f0a2d66d1c Add a note
llvm-svn: 25921
2006-02-03 01:49:49 +00:00
Evan Cheng 02b5b9cdd6 Added case HANDLENODE to getOperationName().
llvm-svn: 25920
2006-02-03 01:33:01 +00:00
Chris Lattner b7f24de4c8 Physregs may hold multiple stack slot values at the same time. Keep track
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
2006-02-03 00:36:31 +00:00
Chris Lattner 9b178ce225 update a note
llvm-svn: 25918
2006-02-02 23:50:22 +00:00
Chris Lattner f3aef1b004 Fix a deficiency in the spiller that Evan noticed. In particular, consider
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
2006-02-02 23:29:36 +00:00
Nate Begeman 4efb328926 add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
llvm-svn: 25916
2006-02-02 21:07:50 +00:00
Chris Lattner 5123346708 fix operand numbers
llvm-svn: 25915
2006-02-02 20:38:12 +00:00
Chris Lattner c327d71e06 implement isStoreToStackSlot for PPC
llvm-svn: 25914
2006-02-02 20:16:12 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner 246ee44c8f implement isStoreToStackSlot
llvm-svn: 25911
2006-02-02 20:00:41 +00:00
Chris Lattner 0acc90c67e add a method
llvm-svn: 25910
2006-02-02 19:57:16 +00:00
Chris Lattner d8208c3665 more notes
llvm-svn: 25908
2006-02-02 19:43:28 +00:00
Chris Lattner d3f033e8e0 add a note, I have no idea how important this is.
llvm-svn: 25907
2006-02-02 19:16:34 +00:00
Chris Lattner e10e1024bc %fcc is not an alias for %fcc0
llvm-svn: 25906
2006-02-02 08:02:20 +00:00
Chris Lattner cb34968d19 correct an opcode
llvm-svn: 25905
2006-02-02 07:56:15 +00:00
Chris Lattner 9dd7df7ee7 new example
llvm-svn: 25903
2006-02-02 07:37:11 +00:00
Nate Begeman cd018525f8 Update the README
llvm-svn: 25902
2006-02-02 07:27:56 +00:00
Chris Lattner 49beaf40fc Turn any_extend nodes into zero_extend nodes when it allows us to remove an
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
2006-02-02 07:17:31 +00:00
Chris Lattner e0c60d63b1 Implement MaskedValueIsZero for ANY_EXTEND nodes
llvm-svn: 25900
2006-02-02 06:43:15 +00:00
Chris Lattner 4b2ec8af23 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll
llvm-svn: 25899
2006-02-02 06:36:48 +00:00
Chris Lattner 49ce35542f add two dag combines:
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
2006-02-02 06:36:13 +00:00
Evan Cheng d3908f79cb Update.
llvm-svn: 25896
2006-02-02 02:40:17 +00:00
Chris Lattner 0bd74558ae make -debug output less newliney
llvm-svn: 25895
2006-02-02 00:38:08 +00:00
Evan Cheng d8fba3a1ee Fix a erroneous comment.
llvm-svn: 25894
2006-02-02 00:28:23 +00:00
Chris Lattner 7f5880b1c7 Implement matching constraints. We can now say things like this:
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
2006-02-02 00:25:23 +00:00
Chris Lattner 2f34a9e332 validate matching constraints and remember when we see them.
llvm-svn: 25892
2006-02-02 00:23:53 +00:00
Chris Lattner 6132a87cf4 more notes
llvm-svn: 25890
2006-02-01 23:38:08 +00:00
Evan Cheng b3ea2677a4 Tell codegen MOVAPSrr and MOVAPDrr are copies.
llvm-svn: 25889
2006-02-01 23:03:16 +00:00
Evan Cheng f1ed826c2a Added SSE entries to foldMemoryOperand().
llvm-svn: 25888
2006-02-01 23:02:25 +00:00