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162697 Commits

Author SHA1 Message Date
Zoran Jovanovic 472486714e Test case for issue with microMIPS long branch. 
llvm-svn: 195976
 2013-11-30 19:13:15 +00:00
Zoran Jovanovic 9d86e26e62 Fixed issue with microMIPS long branch. 
llvm-svn: 195975
 2013-11-30 19:12:28 +00:00
Mark Seaborn 664711188f Fix indentation of fields in __cxa_exception to line up 
Align to 8 spaces instead of an inconsistent 9.

llvm-svn: 195974
 2013-11-30 17:37:21 +00:00
Daniel Sanders 7fd68d6018 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. 
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.

llvm-svn: 195973
 2013-11-30 13:47:57 +00:00
Daniel Sanders 7153414768 [mips][msa] A small refactor to reduce patch noise in my next commit 
No functional change. An if-statement has been split into two nested if-statements.

llvm-svn: 195972
 2013-11-30 13:15:21 +00:00
Juergen Ributzka 5b6234dc4a Force CPU type to unbreak unit tests on Haswell machines. 
llvm-svn: 195971
 2013-11-30 03:07:16 +00:00
Joerg Sonnenberger 84c7ca8851 NetBSD uses signed wchar_t on ARM platforms. 
llvm-svn: 195970
 2013-11-30 00:38:16 +00:00
Andrew Trick c2ab53a318 Reverse the order of eviction checks for possible compile time savings. No functionality. 
llvm-svn: 195969
 2013-11-29 23:49:38 +00:00
Reed Kotler ad450f239f Part 1 of 3 patches that completes very long conditional branches 
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations. 

llvm-svn: 195968
 2013-11-29 22:32:56 +00:00
Zoran Jovanovic 1bc3cce040 Revert revision 195965. 
llvm-svn: 195967
 2013-11-29 22:10:02 +00:00
Petar Jovanovic e3e940d887 mips: XFAIL llvm-cov test 
XFAIL llvm-cov.test for MIPS until big-endian issues are fixed for llvm-cov.
The test does pass on MIPS little-endian.

llvm-svn: 195966
 2013-11-29 21:59:09 +00:00
Zoran Jovanovic ff2a40ce4d Fixed issue with microMIPS long branch. 
llvm-svn: 195965
 2013-11-29 21:41:24 +00:00
Aaron Ballman 5b0481a398 Refactored the tls_model attribute to use a custom subset subject. No functional change intended. 
llvm-svn: 195964
 2013-11-29 16:20:30 +00:00
Aaron Ballman f7cd09a047 Using a custom subject to reenable the Subjects line for the ns_bridged attribute. No functional change intended. 
llvm-svn: 195963
 2013-11-29 16:13:12 +00:00
Aaron Ballman 4cfafb9a85 Fixes a possible assert in the custom SubsetSubject logic for the attr emitter. 
llvm-svn: 195962
 2013-11-29 16:12:29 +00:00
Alexander Kornienko cabdd738fc Added LanguageStandard::LS_JavaScript to gate all JS-specific parsing. 
Summary:
Use LS_JavaScript for files ending with ".js". Added support for ">>>="
operator.

Reviewers: djasper, klimek

Reviewed By: djasper

CC: cfe-commits, klimek

Differential Revision: http://llvm-reviews.chandlerc.com/D2242

llvm-svn: 195961
 2013-11-29 15:19:43 +00:00
Aaron Ballman 80469038c0 Enables support for custom subject lists for attributes. As a testbed, uses the custom subject for the ibaction attribute. 
llvm-svn: 195960
 2013-11-29 14:57:58 +00:00
Kostya Serebryany dc58090213 [asan] dump coverage even if asan has reported an error 
llvm-svn: 195959
 2013-11-29 14:49:32 +00:00
Kostya Serebryany 5774faf5b0 [sanitizer] disable shmctl intercetor in 32-bit -- it is rotten (bug filed) 
llvm-svn: 195958
 2013-11-29 14:09:13 +00:00
Timur Iskhodzhanov 5ca41e3800 Increase the LocatePcInTrace PC threshold now that GET_STACK_TRACE_WITH_PC_AND_BP has grown 
llvm-svn: 195957
 2013-11-29 13:15:25 +00:00
Timur Iskhodzhanov a10c46f2ae Fix current stack unwinding when using DRASan 
llvm-svn: 195956
 2013-11-29 12:53:30 +00:00
Timur Iskhodzhanov bbf2ff8193 [ASan] Also print <empty stack> when size==0 
llvm-svn: 195955
 2013-11-29 12:08:59 +00:00
Daniel Jasper 38c82408a7 clang-format: Extends formatted ranges to subsequent lines comments. 
Before:
  int aaaa;     // This line is formatted.
                // The comment continues ..
                // .. here.

Before:
  int aaaa; // This line is formatted.
            // The comment continues ..
            // .. here.

This fixes llvm.org/PR17914.

llvm-svn: 195954
 2013-11-29 09:27:43 +00:00
Daniel Jasper 1556b59338 clang-format: Correctly handle Qt's Q_SLOTS. 
This should fix llvm.org/PR17241. Maybe it sticks this time :-).

llvm-svn: 195953
 2013-11-29 08:51:56 +00:00
Daniel Jasper e40caf9ad2 clang-format: Fix bad indentation of nested blocks. 
Before:
  DEBUG(  //
  { f(); });

After:
  DEBUG(  //
      { f(); });

Also add additional test to selected formatting of individual statements
in nested blocks.

llvm-svn: 195952
 2013-11-29 08:46:20 +00:00
Hal Finkel 1df3205e8c Adjust PPC A2 input operand latencies 
On the PPC A2, instructions are only issued after their input operands are
ready. Model this by specifying that input operands are read at dispatch (0
cycles after issue). This changes all input operand latencies from 1 to 0.

Significant test-suite performance changes (these are 99.5% confidence
intervals on 6 runs for both before and after):

speedups:
MultiSource/Benchmarks/sim/sim
	-1.21915% +/- 0.175063%
MultiSource/Benchmarks/TSVC/LinearDependence-flt/LinearDependence-flt
	-1.23946% +/- 1.05133%
SingleSource/Benchmarks/Misc/flops-2
	-1.24237% +/- 0.681362%
MultiSource/Applications/JM/lencod/lencod
	-1.33992% +/- 0.757498%
MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt
	-1.51802% +/- 1.21468%
MultiSource/Benchmarks/TSVC/GlobalDataFlow-flt/GlobalDataFlow-flt
	-2.18818% +/- 1.28605%
MultiSource/Benchmarks/TSVC/Packing-flt/Packing-flt
	-2.21977% +/- 1.19499%
SingleSource/Benchmarks/BenchmarkGame/spectral-norm
	-2.29822% +/- 0.671871%
MultiSource/Benchmarks/TSVC/Packing-dbl/Packing-dbl
	-2.40975% +/- 0.355931%
SingleSource/Benchmarks/Misc/fp-convert
	-2.41899% +/- 1.04751%
MultiSource/Benchmarks/TSVC/Searching-dbl/Searching-dbl
	-2.50349% +/- 0.126765%
SingleSource/Benchmarks/Misc/flops-3
	-3.00214% +/- 0.700795%
MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt
	-3.56995% +/- 3.2929%
MultiSource/Applications/sgefa/sgefa
	-4.24908% +/- 2.00413%
MultiSource/Benchmarks/ASC_Sequoia/IRSmk/IRSmk
	-18.1294% +/- 3.96489%

regressions:
MultiSource/Benchmarks/TSVC/Reductions-dbl/Reductions-dbl
	1.03249% +/- 0.178547%
MultiSource/Applications/hexxagon/hexxagon
	1.16597% +/- 0.285235%
MultiSource/Benchmarks/TSVC/IndirectAddressing-flt/IndirectAddressing-flt
	1.39576% +/- 1.07855%
SingleSource/Benchmarks/Misc-C++/stepanov_v1p2
	1.71539% +/- 0.173182%
MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
	1.90013% +/- 0.866472%
MultiSource/Benchmarks/TSVC/Recurrences-dbl/Recurrences-dbl
	2.39854% +/- 1.05914%
MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl
	2.4402% +/- 0.817904%
MultiSource/Benchmarks/TSVC/LoopRestructuring-dbl/LoopRestructuring-dbl
	5.87997% +/- 3.3172%
MultiSource/Benchmarks/Trimaran/netbench-crc/netbench-crc
	9.02643% +/- 5.79591%
MultiSource/Benchmarks/VersaBench/bmm/bmm
	10.3517% +/- 1.227%

Obviously, there are data points on both sides of this; but I think, overall,
this supports making the change.

llvm-svn: 195951
 2013-11-29 07:04:59 +00:00
Lang Hames 7468daadda Teach LocalStackSlotAllocation that stackmaps/patchpoints don't have range 
constraints on their frame offsets.

llvm-svn: 195950
 2013-11-29 06:35:30 +00:00
Hal Finkel 5a7162f36b Create a PPC440 SchedMachineModel 
Some of the older PPC processor definitions don't have associated
SchedMachineModels; correct this for the PPC440.

llvm-svn: 195949
 2013-11-29 06:32:17 +00:00
Hal Finkel 4035e8d86a Fixup PPC440 load/store operand latencies 
The operand latencies for loads and stores in the PPC440 itinerary were wrong
(the store operands are all inputs, and the "with update" (pre-increment)
instructions need a latency for the additional output).

llvm-svn: 195948
 2013-11-29 06:19:43 +00:00
Hal Finkel a10bd1d23a Adjust PPC440 operand latencies 
The operand latencies for the PPC440 should be specified relative to dispatch,
not relative to the initial fetch-and-decode stages. Because most instructions
(ignoring bypass) wait in dispatch until their operands are ready, this is
modeled as reading input operands "at dispatch" (0 cycles after issue), and so
every input and output operand has 4 cycles subtracted from it.

This could alter scheduling slightly, but I don't expect a large effect.

llvm-svn: 195947
 2013-11-29 05:59:00 +00:00
Hal Finkel dd06369913 Don't model the fetch and decode units for the PPC440 
Modeling the fetch and decode units in the PPC440 itinerary does not add
anything to the hazard detection capability (and so modeling them just wastes
compile time).

No functionality change intended.

llvm-svn: 195946
 2013-11-29 05:58:38 +00:00
Lang Hames c8a73af391 Remove unused variable from r195944. 
llvm-svn: 195945
 2013-11-29 03:36:53 +00:00
Lang Hames 39609996d9 Refactor a lot of patchpoint/stackmap related code to simplify and make it 
target independent.

Most of the x86 specific stackmap/patchpoint handling was necessitated by the
use of the native address-mode format for frame index operands. PEI has now
been modified to treat stackmap/patchpoint similarly to DEBUG_INFO, allowing
us to use a simple, platform independent register/offset pair for frame
indexes on stackmap/patchpoints.

Notes:
  - Folding is now platform independent and automatically supported.
  - Emiting patchpoints with direct memory references now just involves calling
    the TargetLoweringBase::emitPatchPoint utility method from the target's
    XXXTargetLowering::EmitInstrWithCustomInserter method. (See
    X86TargetLowering for an example).
  - No more ugly platform-specific operand parsers.

This patch shouldn't change the generated output for X86. 

llvm-svn: 195944
 2013-11-29 03:07:54 +00:00
Hao Liu 46a6ed9e64 AArch64: Two intrinsics are expected to return float64 not float32 in arm_neon.h 
llvm-svn: 195943
 2013-11-29 02:31:42 +00:00
Hao Liu 8a0099e02c Fix the problem that the range check for scalar narrow shift is too wide. 
E.g. the immediate value of vshrns_n_s16 is [1,16], which should be [1,8].

llvm-svn: 195942
 2013-11-29 02:13:17 +00:00
Hao Liu ba38eee8ac AArch64: The pattern match should check the range of the immediate value. 
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].

llvm-svn: 195941
 2013-11-29 02:11:22 +00:00
Jiangning Liu 24173dd4b1 Add missing intrinsic function vbsl_f64 for AArch64 NEON. 
llvm-svn: 195940
 2013-11-29 01:38:49 +00:00
Jiangning Liu f7b4c7c2ce Add missing test case for bsl_f64 support of AArch64 NEON. 
llvm-svn: 195939
 2013-11-29 01:38:08 +00:00
Jiangning Liu c429c00f3b Add missing pattern for supporting intrinsic function vbsl_f64 with 
argument double floating point.

llvm-svn: 195938
 2013-11-29 01:37:15 +00:00
Jiangning Liu c8a9d762d3 Add missing intrinsic function vcombine_f64 for AArch64 NEON. 
llvm-svn: 195937
 2013-11-29 01:29:57 +00:00
Kevin Qin 337cfcc83c [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction. 
llvm-svn: 195936
 2013-11-29 01:29:16 +00:00
Tobias Grosser 2cbc7bf64a (re)enable formatting checks 
llvm-svn: 195935
 2013-11-28 23:35:08 +00:00
Stephen Canon c454964c47 Rein in overzealous InstCombine of fptrunc(OP(fpextend, fpextend)). 
llvm-svn: 195934
 2013-11-28 21:38:05 +00:00
Rafael Espindola d5bd5a4716 Refactor to remove a bit of duplication. No functionality change. 
llvm-svn: 195933
 2013-11-28 20:12:44 +00:00
Benjamin Kramer ea1982aff9 Silence sign-compare warning and reduce nesting. 
No functionality change.

llvm-svn: 195932
 2013-11-28 19:58:56 +00:00
Rafael Espindola 61b3d0c1fb Remove an always true parameter. 
llvm-svn: 195931
 2013-11-28 19:35:07 +00:00
Sylvestre Ledru 3b5b16cdff Also silent -Wno-cast-qual in the SWIG Python wrapper. Remove a huge number of warnings 
llvm-svn: 195930
 2013-11-28 18:11:34 +00:00
NAKAMURA Takumi 226e10edff [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too. 
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
 2013-11-28 17:04:31 +00:00
NAKAMURA Takumi c08227de0e [CMake] Also OptionTests can be free from add_dependencies() with add_public_tablegen_target(). 
llvm-svn: 195928
 2013-11-28 17:04:13 +00:00
NAKAMURA Takumi ce746c6c49 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
 2013-11-28 17:04:04 +00:00