maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
26,414 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

5794 Commits

Author SHA1 Message Date
Chris Lattner cfb2c32724 add a note 
llvm-svn: 30271
 2006-09-12 06:36:01 +00:00
Chris Lattner 8b4de218d9 Testcase noticed from PR906 
llvm-svn: 30269
 2006-09-11 23:00:56 +00:00
Chris Lattner 6e7286f72a add compilable testcase 
llvm-svn: 30268
 2006-09-11 22:57:51 +00:00
Rafael Espindola c7829d62c0 implement SRL and MUL 
llvm-svn: 30262
 2006-09-11 19:24:19 +00:00
Rafael Espindola bccf9c2f1b add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 
llvm-svn: 30261
 2006-09-11 19:23:32 +00:00
Rafael Espindola e45a79a9e2 partial implementation of the ARM Addressing Mode 1 
llvm-svn: 30252
 2006-09-11 17:25:40 +00:00
Rafael Espindola ecb0d686f8 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
llvm-svn: 30246
 2006-09-11 12:49:38 +00:00
Evan Cheng 21a75acc3e Updates. 
llvm-svn: 30245
 2006-09-11 05:35:17 +00:00
Evan Cheng 9e77d9a96b Update README file. 
llvm-svn: 30244
 2006-09-11 05:25:15 +00:00
Evan Cheng 4259a0f654 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.

llvm-svn: 30241
 2006-09-11 02:19:56 +00:00
Nate Begeman a0d95a8da9 Behold, more work on relocations. Things are looking pretty good now. 
llvm-svn: 30240
 2006-09-10 23:03:44 +00:00
Anton Korobeynikov fbee8bfe48 Removed unnecessary Mangler creation. 
llvm-svn: 30239
 2006-09-10 21:17:03 +00:00
Chris Lattner fdb3a75942 Add cbe support for powi 
llvm-svn: 30226
 2006-09-09 06:17:12 +00:00
Nate Begeman 69df6132d7 First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207
 2006-09-08 22:42:09 +00:00
Evan Cheng de33f66286 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.

llvm-svn: 30205
 2006-09-08 21:08:13 +00:00
Rafael Espindola d11fb5d13b implement shl and sra 
llvm-svn: 30191
 2006-09-08 17:36:23 +00:00
Chris Lattner 6c003a7c2d Use __USER_LABEL_PREFIX__ to get the prefix added by the current host. 
llvm-svn: 30190
 2006-09-08 17:03:56 +00:00
Rafael Espindola 4443c7d60a add the eor (xor) instruction 
llvm-svn: 30189
 2006-09-08 16:59:47 +00:00
Jim Laskey 177405376c Missing tab 
llvm-svn: 30188
 2006-09-08 13:06:56 +00:00
Rafael Espindola 778769aafb implement unconditional branches 
fix select.ll

llvm-svn: 30186
 2006-09-08 12:47:03 +00:00
Evan Cheng 7348403d42 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
llvm-svn: 30178
 2006-09-08 06:56:55 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support. 
llvm-svn: 30177
 2006-09-08 06:48:29 +00:00
Nate Begeman c9db83306f We actually do support object file writing, so don't return true (error) 
llvm-svn: 30173
 2006-09-08 03:42:15 +00:00
Evan Cheng 89c5d04b9b - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).

llvm-svn: 30171
 2006-09-08 01:50:06 +00:00
Jim Laskey ae92ce8798 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
 2006-09-07 23:39:26 +00:00
Chris Lattner 2785d55446 add a new value for the command line optn 
llvm-svn: 30165
 2006-09-07 22:32:28 +00:00
Chris Lattner b9e0a9e82f Fix a cross-build issue. The asmsyntax shouldn't be affected by the build 
host, it should be affected by the target.  Allow the command line option to
override in either case.

llvm-svn: 30164
 2006-09-07 22:29:41 +00:00
Jim Laskey 261779bb45 Make target asm info a property of the target machine. 
llvm-svn: 30162
 2006-09-07 22:06:40 +00:00
Jim Laskey 0e83541f8b Break out target asm info into separate files. 
llvm-svn: 30161
 2006-09-07 22:05:02 +00:00
Chris Lattner dc4ff5311f Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns 
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.

llvm-svn: 30156
 2006-09-07 20:33:45 +00:00
Chris Lattner 1b7f09cdf7 Some notes on better load folding we could do 
llvm-svn: 30155
 2006-09-07 20:32:01 +00:00
Evan Cheng a9411c0977 Consistency. 
llvm-svn: 30152
 2006-09-07 19:03:48 +00:00
Jim Laskey c7abe471fe Make the x86 asm flavor part of the subtarget info. 
llvm-svn: 30146
 2006-09-07 12:23:47 +00:00
Evan Cheng 7f3f0973e6 Clean up. 
llvm-svn: 30140
 2006-09-07 01:17:57 +00:00
Evan Cheng 4c7a3fbdea Watch out for variable_ops instructions. 
llvm-svn: 30135
 2006-09-06 20:32:45 +00:00
Evan Cheng ac22e54131 Variable ops instructions may ignore the last few operands for code emission. 
llvm-svn: 30134
 2006-09-06 20:24:14 +00:00
Jim Laskey ef94ebb666 Oops - forgot to update banner. 
llvm-svn: 30131
 2006-09-06 19:21:41 +00:00
Jim Laskey 681ecbb3b3 Separate target specifc asm properties from asm printers. 
llvm-svn: 30127
 2006-09-06 18:35:33 +00:00
Jim Laskey a6211dcdad Separate target specific asm properties from the asm printers. 
llvm-svn: 30126
 2006-09-06 18:34:40 +00:00
Rafael Espindola abd8bcbe5e add the orr instruction 
llvm-svn: 30125
 2006-09-06 18:03:12 +00:00
Chris Lattner 2656932979 Bugfix to work with the two-addr changes that have been made in the tree recently 
llvm-svn: 30121
 2006-09-05 20:27:32 +00:00
Evan Cheng 7a150d3113 Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll 
llvm-svn: 30113
 2006-09-05 08:32:49 +00:00
Evan Cheng 17c28b2e0e JIT encoding bug. 
llvm-svn: 30112
 2006-09-05 05:59:25 +00:00
Chris Lattner e3d2e1e41e Update the X86 JIT to make it work with the new two-addr changes. This also 
adds assertions that check to make sure every operand gets emitted.

llvm-svn: 30110
 2006-09-05 02:52:35 +00:00
Chris Lattner af23f9b5f6 Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Chris Lattner 13a5dcddce Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.

llvm-svn: 30108
 2006-09-05 02:12:02 +00:00
Andrew Lenharth 3852b2ce7e jmp_bufs are this big on alpha. 
llvm-svn: 30107
 2006-09-05 00:22:25 +00:00
Rafael Espindola 8386105f3f add support for returning 64bit values 
llvm-svn: 30103
 2006-09-04 19:05:01 +00:00
Chris Lattner 49c45d3a13 Fix some X86 JIT failures. This should really come from TargetJITInfo. 
llvm-svn: 30102
 2006-09-04 18:48:41 +00:00
Duraid Madina cf6749e4c0 add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095
 2006-09-04 06:21:35 +00:00