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15 Commits

Author SHA1 Message Date
Chad Rosier 71070856e6 [AArch64] Add basic support for Qualcomm's Saphira CPU. 
llvm-svn: 314105
 2017-09-25 14:05:00 +00:00
Sam Parker b252ffd2cc [ARM][AArch64] Cortex-A75 and Cortex-A55 support 
This patch introduces support for Cortex-A75 and Cortex-A55, Arm's
latest big.LITTLE A-class cores. They implement the ARMv8.2-A
architecture, including the cryptography and RAS extensions, plus
the optional dot product extension. They also implement the RCpc
AArch64 extension from ARMv8.3-A.

Cortex-A75:
https://developer.arm.com/products/processors/cortex-a/cortex-a75

Cortex-A55:
https://developer.arm.com/products/processors/cortex-a/cortex-a55

Differential Revision: https://reviews.llvm.org/D36667

llvm-svn: 311316
 2017-08-21 08:43:06 +00:00
Joel Jones 2852088126 [AArch64] Vulcan is now ThunderXT99 
Broadcom Vulcan is now Cavium ThunderX2T99.

LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113

Minor fixes for the alignments of loops and functions for
ThunderX T81/T83/T88 (better performance).

Patch was tested with SpecCPU2006.

Patch by Stefan Teleman

Differential Revision: https://reviews.llvm.org/D30510

llvm-svn: 297190
 2017-03-07 19:42:40 +00:00
Evandro Menezes aeec780e42 Add support for Samsung Exynos M3 (NFC) 
llvm-svn: 289613
 2016-12-13 23:31:41 +00:00
Chad Rosier 201fc1ed26 [AArch64] Add support for Qualcomm's Falkor CPU. 
Differential Revision: https://reviews.llvm.org/D26673

llvm-svn: 287036
 2016-11-15 21:34:12 +00:00
Evandro Menezes 82e245a202 [AArch64] Add support for Samsung Exynos M2 (NFC). 
llvm-svn: 277364
 2016-08-01 18:39:45 +00:00
Silviu Baranga dc43d61a25 [AArch64] Switch regression tests to test features not CPUs 
Summary:
We have switched to using features for all heuristics, but
the tests for these are still using -mcpu, which means we
are not directly testing the features.

This converts at least some of the existing regression tests
to use the new features.

This still leaves the following features untested:

merge-narrow-ld
predictable-select-expensive
alternate-sextload-cvt-f32-pattern
disable-latency-sched-heuristic

Reviewers: mcrosier, t.p.northover, rengolin

Subscribers: MatzeB, aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D21288

llvm-svn: 273271
 2016-06-21 15:16:34 +00:00
Pankaj Gode 0aab2e398a [AARCH64] Add support for Broadcom Vulcan 
Adding core tuning support for new Broadcom Vulcan core (ARMv8.1A).

Differential Revision: http://reviews.llvm.org/D21500

llvm-svn: 273148
 2016-06-20 11:13:31 +00:00
Sjoerd Meijer 0b7bb16e5b This adds support for Cortex-A73 as an available target. 
Differential Revision: http://reviews.llvm.org/D20865

llvm-svn: 271508
 2016-06-02 10:48:52 +00:00
Paul Robinson 51fa0a87c3 Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 
FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17588

llvm-svn: 262054
 2016-02-26 19:40:34 +00:00
Chad Rosier cd2be7f084 [AArch64] Add support for Qualcomm Kryo CPU. 
Machine model description by Dave Estes <cestes@codeaurora.org>.

llvm-svn: 260686
 2016-02-12 15:51:51 +00:00
MinSeong Kim a7385ebf78 [AArch64] Add support for Samsung Exynos-M1 
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).

Differential Revision: http://reviews.llvm.org/D15663

llvm-svn: 256828
 2016-01-05 12:51:59 +00:00
Christof Douma 8b5dc2c94e [AArch64]: Add support for Cortex-A35 
Adds support for the new Cortex-A35 ARMv8-A core.

llvm-svn: 254503
 2015-12-02 11:53:44 +00:00
Renato Golin 6088504499 Adding support to LLVM for targeting Cortex-A72 
Currently, Cortex-A72 is modelled as an Cortex-A57 except the fp
load balancing pass isn't enabled for Cortex-A72 as it's not
profitable to have it enabled for this core.

Patch by Ranjeet Singh.

llvm-svn: 228140
 2015-02-04 13:31:29 +00:00
Jiangning Liu cd296378a7 Implement AArch64 TTI interface isAsCheapAsAMove. 
llvm-svn: 214159
 2014-07-29 02:09:26 +00:00