14 Commits

Author	SHA1	Message	Date
Chris Lattner	71227c23b1	In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. ... llvm-svn: 29096	2006-07-11 00:48:23 +00:00
Chris Lattner	52a956da52	Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file ... llvm-svn: 28889	2006-06-20 23:18:58 +00:00
Chris Lattner	49cadab385	Implement the getPointerRegClass method, which is required for the ptr_rc ... magic to work. llvm-svn: 28847	2006-06-17 00:01:04 +00:00
Chris Lattner	10d6341618	Move some methods out of MachineInstr into MachineOperand ... llvm-svn: 28102	2006-05-04 17:52:23 +00:00
Chris Lattner	91400bd413	teach the ppc backend how to spill/reload vector regs ... llvm-svn: 26806	2006-03-16 22:24:02 +00:00
Chris Lattner	fd9f3e8ed3	Add support for copying registers. still needed: spilling and reloading them ... llvm-svn: 26800	2006-03-16 20:03:58 +00:00
Chris Lattner	ea79d9fd73	implement TII::insertNoop ... llvm-svn: 26562	2006-03-05 23:49:55 +00:00
Nate Begeman	4efb328926	add 64b gpr store to the possible list of isStoreToStackSlot opcodes. ... llvm-svn: 25916	2006-02-02 21:07:50 +00:00
Chris Lattner	c327d71e06	implement isStoreToStackSlot for PPC ... llvm-svn: 25914	2006-02-02 20:16:12 +00:00
Chris Lattner	bb53acd03c	Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) ... llvm-svn: 25913	2006-02-02 20:12:32 +00:00
Chris Lattner	5f37623218	teach ppc backend these are copies ... llvm-svn: 23813	2005-10-19 01:50:36 +00:00
Nate Begeman	0b71e007ef	First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is ... purely mechanical. llvm-svn: 23778	2005-10-18 00:28:58 +00:00
Nate Begeman	6cca84e43c	More PPC32 -> PPC changes, as well as merging some classes that were ... redundant after the change. llvm-svn: 23759	2005-10-16 05:39:50 +00:00
Chris Lattner	6f3b954662	Rename PPC32*.h to PPC*.h ... This completes the grand PPC file renaming llvm-svn: 23745	2005-10-14 23:59:06 +00:00