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1993 Commits

Author SHA1 Message Date
Nate Begeman 984c1a4a8f Emit .set directives for jump table entries when possible, which reduces 
the number of relocations in object files, shrinkifying them.

llvm-svn: 29650
 2006-08-12 21:29:52 +00:00
Chris Lattner 20b461a97f eliminate extraneous blank line 
llvm-svn: 29627
 2006-08-11 21:08:16 +00:00
Chris Lattner ed728e8dc9 Eliminate use of getNode that takes a vector. 
llvm-svn: 29614
 2006-08-11 17:38:39 +00:00
Evan Cheng bd1c5a8fb8 Match tablegen changes. 
llvm-svn: 29604
 2006-08-11 09:08:15 +00:00
Evan Cheng 81b645a76b CALLSEQ_* produces chain even if that's not needed. 
llvm-svn: 29603
 2006-08-11 09:03:33 +00:00
Evan Cheng 5c68bba085 Convert more calls of getNode() that takes a vector to pass in the start of an array. 
llvm-svn: 29601
 2006-08-11 07:35:45 +00:00
Chris Lattner c24a1d3093 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.

llvm-svn: 29566
 2006-08-08 02:23:42 +00:00
Evan Cheng 72bb66a4b8 Eliminate reachability matrix. It has to be calculated before any instruction 
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.

llvm-svn: 29559
 2006-08-08 00:31:00 +00:00
Evan Cheng b9d34bd098 Match tablegen isel changes. 
llvm-svn: 29549
 2006-08-07 22:28:20 +00:00
Evan Cheng d5e38e017c Make XMM, FP register dwarf register numbers consistent with gcc. 
llvm-svn: 29543
 2006-08-07 21:02:39 +00:00
Jim Laskey f2c14591e6 Get darwin intel debugging up and running. 
llvm-svn: 29504
 2006-08-03 17:27:09 +00:00
Evan Cheng 8f585196e1 Reflect change to AssignTopologicalOrder(). 
llvm-svn: 29480
 2006-08-02 22:01:32 +00:00
Evan Cheng 8101dd67d1 Use of vector<bool> causes some horrendous compile time regression (2x)! 
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.

llvm-svn: 29469
 2006-08-02 09:18:33 +00:00
Nate Begeman 6025c92e50 Update the readme to remove duplicate information and clarify the loop 
problem.

llvm-svn: 29468
 2006-08-02 05:31:20 +00:00
Nate Begeman d573cc7938 Disable LSR at -fast 
llvm-svn: 29467
 2006-08-02 05:29:40 +00:00
Evan Cheng 45af287957 Factor topological order code to SelectionDAG. Clean up. 
llvm-svn: 29430
 2006-08-01 08:17:22 +00:00
Chris Lattner 524129dd64 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. 
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.

llvm-svn: 29420
 2006-07-31 23:26:50 +00:00
Evan Cheng e8071ecc3b Can't spell. 
llvm-svn: 29383
 2006-07-28 06:33:41 +00:00
Evan Cheng 2e94538b8e Some clean up. 
llvm-svn: 29382
 2006-07-28 06:05:06 +00:00
Evan Cheng e2a3f7014d Rename IsFoldableBy to CanBeFoldedleBy 
llvm-svn: 29376
 2006-07-28 01:03:48 +00:00
Evan Cheng 11a4d8c2f4 Node selected into address mode cannot be folded. 
llvm-svn: 29374
 2006-07-28 00:49:31 +00:00
Evan Cheng 3b5e0cafd1 Another duh. Determine topological order before any target node is added. 
llvm-svn: 29371
 2006-07-28 00:10:59 +00:00
Evan Cheng f38707b8d4 Brain cramp.. 
llvm-svn: 29370
 2006-07-27 23:35:40 +00:00
Evan Cheng 390dd7eb7d Allocating too large an array for ReachibilityMatrix. 
llvm-svn: 29367
 2006-07-27 22:35:40 +00:00
Evan Cheng 87585760ab Calculate the portion of reachbility matrix on demand. 
llvm-svn: 29366
 2006-07-27 22:10:00 +00:00
Evan Cheng d6c0c2dfd9 isNonImmUse is replaced by IsFoldableBy 
llvm-svn: 29365
 2006-07-27 21:19:10 +00:00
Evan Cheng 78bf1074fc Resolve BB references with relocation. 
llvm-svn: 29351
 2006-07-27 18:21:10 +00:00
Evan Cheng 691a63d564 Use reachbility information to determine whether a node can be folded into another during isel. 
llvm-svn: 29346
 2006-07-27 16:44:36 +00:00
Jim Laskey 3b4866e194 Use the predicate. 
llvm-svn: 29322
 2006-07-27 02:05:13 +00:00
Nate Begeman 787565024a Support jump tables when in PIC relocation model 
llvm-svn: 29318
 2006-07-27 01:13:04 +00:00
Jim Laskey c169b8798f Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. 
llvm-svn: 29317
 2006-07-27 01:12:23 +00:00
Evan Cheng 23a21c19d9 New entry. 
llvm-svn: 29310
 2006-07-26 21:49:52 +00:00
Chris Lattner 9e56e5c003 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
llvm-svn: 29307
 2006-07-26 21:12:04 +00:00
Evan Cheng f6acb34d23 - Refactor the code that resolve basic block references to a TargetJITInfo 
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
 2006-07-25 20:40:54 +00:00
Evan Cheng 66ed41cac1 Can't commute shufps. The high / low parts elements come from different vectors. 
llvm-svn: 29275
 2006-07-25 20:25:40 +00:00
Evan Cheng c0577648c0 Done. 
llvm-svn: 29262
 2006-07-21 23:07:23 +00:00
Evan Cheng 74065bedf2 This opt is now handled in DAG combine. 
llvm-svn: 29243
 2006-07-21 08:26:46 +00:00
Evan Cheng 4cf0238720 A splat of a vector constant of all zero or all one is the vector constant. 
llvm-svn: 29234
 2006-07-20 23:09:47 +00:00
Evan Cheng f98bc5288e Missing a space. 
llvm-svn: 29233
 2006-07-20 22:52:28 +00:00
Evan Cheng 683b966485 Clean up. 
llvm-svn: 29228
 2006-07-20 21:37:39 +00:00
Evan Cheng 8a881f2309 New entry. 
llvm-svn: 29215
 2006-07-19 21:29:30 +00:00
Jim Laskey 181fb1c4d7 Do once flag never set to true. 
llvm-svn: 29214
 2006-07-19 19:33:08 +00:00
Jim Laskey 7c860afec6 Tidy up a few things. 
llvm-svn: 29213
 2006-07-19 19:32:06 +00:00
Jim Laskey 18debc21db Reduce size of routine. Shrinks .o by 37%. 
llvm-svn: 29210
 2006-07-19 17:53:32 +00:00
Jim Laskey 5ba7c23cdd Bug#834 ICE (crash in code generator?) when building PCH . 
Missing Darwin check in Intel ATT ASM printer.

llvm-svn: 29204
 2006-07-19 11:54:50 +00:00
Evan Cheng 968a0b0309 Misc. new entry. 
llvm-svn: 29202
 2006-07-19 06:06:24 +00:00
Evan Cheng 02d8836cd5 INC / DEC instructions have shorter code size than ADD32ri8, etc. 
llvm-svn: 29194
 2006-07-19 00:27:29 +00:00
Chris Lattner 2e1d01541a Add an out-of-line virtual method for X86DwarfWriter to give it a home. 
llvm-svn: 29153
 2006-07-14 23:05:05 +00:00
Chris Lattner c8db10725b Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll

llvm-svn: 29118
 2006-07-12 16:59:49 +00:00
Evan Cheng d5a086ab12 Emit inc / dec of registers as one byte instruction. 
llvm-svn: 29110
 2006-07-11 19:49:49 +00:00
Chris Lattner 298ef37e02 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll

llvm-svn: 29101
 2006-07-11 02:54:03 +00:00
Evan Cheng 32860f42bb New entry. 
llvm-svn: 29091
 2006-07-10 21:42:16 +00:00
Evan Cheng 79cf9a5342 Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.

llvm-svn: 29090
 2006-07-10 21:37:44 +00:00
Chris Lattner 9aabc1e16f Mark internal function static 
llvm-svn: 29085
 2006-07-10 19:53:12 +00:00
Evan Cheng 5987cfb7b1 X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret

llvm-svn: 29042
 2006-07-07 08:33:52 +00:00
Evan Cheng 0261242aa6 Reorg. No functionality change. 
llvm-svn: 28999
 2006-07-05 22:17:51 +00:00
Evan Cheng 41816100f4 Fix JIT on non MacOS X i386 systems. 
llvm-svn: 28992
 2006-07-05 07:09:13 +00:00
Evan Cheng 390922f979 Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer. 
llvm-svn: 28984
 2006-06-29 18:04:54 +00:00
Evan Cheng 28a95491d9 Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack. 
llvm-svn: 28982
 2006-06-29 01:48:36 +00:00
Evan Cheng fa9e60895b Add shift and rotate by 1 instructions / patterns. 
llvm-svn: 28980
 2006-06-29 00:36:51 +00:00
Evan Cheng fc8cdda070 Always use xorps to clear XMM registers. 
llvm-svn: 28979
 2006-06-29 00:34:23 +00:00
Evan Cheng 56737d4fe3 Move .literal4 and .literal8 support into AsmPrinter.cpp 
llvm-svn: 28978
 2006-06-29 00:33:06 +00:00
Chris Lattner 0cc5907728 Hide x86 symbols 
llvm-svn: 28976
 2006-06-28 23:27:49 +00:00
Evan Cheng 87813744ba Doh. 
llvm-svn: 28963
 2006-06-28 17:56:43 +00:00
Evan Cheng 0687b04455 Oops. Need to keep CP index. 
llvm-svn: 28958
 2006-06-28 07:55:24 +00:00
Evan Cheng 7f88856d95 Darwin puts float and double literal constants into literal4 and literal8 sections. 
llvm-svn: 28957
 2006-06-28 07:35:41 +00:00
Evan Cheng 2aed9ebded Remove dead code. 
llvm-svn: 28938
 2006-06-27 20:34:14 +00:00
Evan Cheng 38c5aee959 Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
llvm-svn: 28910
 2006-06-24 08:36:10 +00:00
Jim Laskey a7b2bd5997 Add and sort "sections" in debug lines. This always stepping through 
code in sections other than ".text", including weak sections like ctors and
dtors.

llvm-svn: 28909
 2006-06-23 12:51:53 +00:00
Evan Cheng 0c9b90aba3 Eliminate unneeded parameter. 
llvm-svn: 28907
 2006-06-22 00:02:55 +00:00
Evan Cheng fc1b27dad1 variable_ops instructions such as call can have any number of operands. 
llvm-svn: 28906
 2006-06-21 23:37:07 +00:00
Chris Lattner dbec49d574 Remove some ugly now-redundant casts. 
llvm-svn: 28864
 2006-06-20 00:25:29 +00:00
Chris Lattner 55594634d7 Fix some mismatched type constraints 
llvm-svn: 28862
 2006-06-20 00:12:37 +00:00
Evan Cheng cd58e9d8b9 Minor clean up. 
llvm-svn: 28860
 2006-06-19 19:25:30 +00:00
Evan Cheng a54b9643aa A new entry. 
llvm-svn: 28848
 2006-06-17 00:45:49 +00:00
Evan Cheng d2e9a67cd9 Later models likely to have Yonah like attributes. 
llvm-svn: 28843
 2006-06-16 21:58:49 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Chris Lattner cb29586ce4 Add a note that Nate noticed. 
llvm-svn: 28808
 2006-06-15 21:33:31 +00:00
Evan Cheng de7156f12c Type of vector extract / insert index operand should be iPTR. 
llvm-svn: 28796
 2006-06-15 08:14:54 +00:00
Evan Cheng c8734381ac X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.

llvm-svn: 28789
 2006-06-14 22:24:55 +00:00
Chris Lattner 37c1c44c14 add a note 
llvm-svn: 28787
 2006-06-14 21:26:18 +00:00
Evan Cheng ca25486603 Add argument registers to the end of call operand list (partial fix). 
llvm-svn: 28783
 2006-06-14 18:17:40 +00:00
Jim Laskey f67bec0579 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.

llvm-svn: 28781
 2006-06-14 11:35:03 +00:00
Evan Cheng 17ca732b6a Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
llvm-svn: 28764
 2006-06-13 05:14:44 +00:00
Evan Cheng beedf824e3 Comments to appease sabre. 
llvm-svn: 28737
 2006-06-09 06:25:10 +00:00
Evan Cheng 0e14a56d35 Minor compilation speed improvement. 
llvm-svn: 28736
 2006-06-09 06:24:42 +00:00
Chris Lattner ba1ed585ee Add support for "m" inline asm constraints. 
llvm-svn: 28728
 2006-06-08 18:03:49 +00:00
Evan Cheng dc614c193e Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Evan Cheng 0f29df98a1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng 0de66677e7 Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Evan Cheng e8a42360c5 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng a2efb9f3ec Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng 7ae8632cb4 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner b47b8a9fad Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng 2b2c1be49c Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Evan Cheng 2489ccdd90 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng cfaffdd335 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00
Evan Cheng cf70c7f42d Sign extender 
llvm-svn: 28603
 2006-05-31 22:05:11 +00:00
Evan Cheng 25e44e008d Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng 8abf45e22d Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
llvm-svn: 28582
 2006-05-31 00:51:37 +00:00