Commit Graph

131928 Commits

Author SHA1 Message Date
Aaron Ballman 54269226ba Removing an unused variable introduced in r269911; NFC.
llvm-svn: 269915
2016-05-18 12:52:04 +00:00
Daniel Sanders 016e6c4354 Try again to fix pdbdump-headers.test on big-endian hosts after r269861.
r269898 fixed the problem with HashBuckets but the same issue occurred with
AddressMap and ThunkMap too.

llvm-svn: 269913
2016-05-18 12:36:25 +00:00
Ashutosh Nema 348af9cc6b Add new flag and intrinsic support for MWAITX and MONITORX instructions
Summary:

MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction execution
and enter an implementation-dependent optimized state until occurrence of a
class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper, RKSimon
Subscribers: RKSimon, joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19795

llvm-svn: 269911
2016-05-18 11:59:12 +00:00
Rafael Espindola 699281cce7 Don't pass a Reloc::Model to MC.
MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this information for is expanding "macros" in sparc and
mips. The rest I am pretty sure could be moved to CodeGen.

This is a cleanup and isolates the code from future changes to
Reloc::Model.

llvm-svn: 269909
2016-05-18 11:58:50 +00:00
James Molloy a854c0a0c3 [VectorUtils] Fix nasty use-after-free
In truncateToMinimalBitwidths() we were RAUW'ing an instruction then erasing it. However, that intruction could be cached in the map we're iterating over. The first check is "I->use_empty()" which in most cases would return true, as the (deleted) object was RAUW'd first so would have zero use count. However in some cases the object could have been polluted or written over and this wouldn't be the case. Also it makes valgrind, asan and traditionalists who don't like their compiler to crash sad.

No testcase as there are no externally visible symptoms apart from a crash if the stars align.

Fixes PR26509.

llvm-svn: 269908
2016-05-18 11:57:58 +00:00
Dylan McKay f830f4baa5 [AVR] Remove the 'AVRConfig.h' header
It defined the LLVM_AVR_GCC_COMPAT constant, which would enable/disable
certain GCC-specific behaviours.

There is no point conditionally turning it on/off, as it will always be
turned on, and we have to maintain both code paths anyway.

llvm-svn: 269904
2016-05-18 11:20:48 +00:00
Simon Pilgrim 324d9200d6 [X86][SSSE3] Sync with clang/test/CodeGen/ssse3-builtins.c
llvm-svn: 269903
2016-05-18 11:19:17 +00:00
Simon Pilgrim 102627405c [X86][SSE4A] Sync with clang/test/CodeGen/sse4a-builtins.c
llvm-svn: 269902
2016-05-18 11:14:58 +00:00
Dylan McKay c1ec00fe88 [AVR] Add missing CMake dependencies
llvm-svn: 269901
2016-05-18 11:11:51 +00:00
Dylan McKay f1f1c010e4 [AVR] Fix a few compile errors
llvm-svn: 269900
2016-05-18 11:11:38 +00:00
Simon Dardis 669d8dd8e1 [PATCH] [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they do meet the ISA
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Recommit of rL269893 with reviewers comments.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269899
2016-05-18 10:38:01 +00:00
Daniel Sanders c819d903e1 Attempt to fix pdbdump-headers.test on big-endian hosts after r269861.
llvm-svn: 269898
2016-05-18 09:59:14 +00:00
Simon Dardis b0aa9f2cbe Revert "[mips] Restrict the creation of compact branches"
This reverts commit rL269893.

Incorrect patch applied.

llvm-svn: 269897
2016-05-18 09:51:37 +00:00
Dylan McKay d56676ed65 [AVR] Convert C style comments to C++
llvm-svn: 269895
2016-05-18 09:43:01 +00:00
Simon Dardis 1549a2f46a [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they meet the ISA encoding
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269893
2016-05-18 09:21:44 +00:00
Chris Dewhurst 68388a0a99 [Sparc] Add Soft Float support
This change adds support for software floating point operations for Sparc targets.

This is the first in a set of patches to enable software floating point on Sparc. The next patch will enable the option to be used with Clang.

Differential Revision: http://reviews.llvm.org/D19265

llvm-svn: 269892
2016-05-18 09:14:13 +00:00
Igor Kudrin eb10307347 [Coverage] Ensure that coverage mapping data has an expected alignment in 'covmapping' files.
Coverage mapping data is organized in a sequence of blocks, each of which is expected
to be aligned by 8 bytes. This feature is used when reading those blocks, see
VersionedCovMapFuncRecordReader::readFunctionRecords(). If a misaligned covearge
mapping data has more than one block, it causes llvm-cov to fail.

Differential Revision: http://reviews.llvm.org/D20285

llvm-svn: 269887
2016-05-18 07:43:27 +00:00
Craig Topper 095fc41523 [AVX512] Strengthen type constraints on my rounding mode inputs and some immediate inputs.
llvm-svn: 269886
2016-05-18 06:56:01 +00:00
Craig Topper 74ed087b0b [AVX512] Strengthen type checks on the X86ISD::SELECT node. Saves over 800 bytes in the DAG isel table by removing type checks for the condition operand which is always a vector or scalar of i1 matching the the number of elements in the other operands.
llvm-svn: 269885
2016-05-18 06:55:59 +00:00
Craig Topper 4b23ed79b3 Strengthen type assertion for ISD::VSELECT ensuring that the condition has the name number of elements as the destination type.
llvm-svn: 269884
2016-05-18 06:55:55 +00:00
Zlatko Buljan 6afea51a58 [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support
Differential Revision: http://reviews.llvm.org/D15418

llvm-svn: 269883
2016-05-18 06:54:59 +00:00
Lang Hames 4ce96c59e4 [RuntimeDyld] Thread Error through some APIs, remove calls to report_fatal_error.
llvm-svn: 269881
2016-05-18 05:31:24 +00:00
Craig Topper a36a61d46a [X86] Remove GCC builtin from add/sub/mul/div ss/sd intrinsics. These haven't been used as builtins in clang for a long time.
Can probably remove the intrinsics entirely, but that will require more work.

llvm-svn: 269876
2016-05-18 01:36:25 +00:00
Rafael Espindola 010148a834 Delete default in fully covered switch.
llvm-svn: 269872
2016-05-18 00:31:06 +00:00
Rafael Espindola cdb2a15d9d Don't pass relocation-model= to tests that don't need it.
Very few things in MC itself use the option. Most of the code that that
uses it could be move to CodeGen.

llvm-svn: 269871
2016-05-18 00:27:17 +00:00
Zachary Turner 14d1cb226c [codeview] Move Symbol / Type enum defs into CodeView.h
This fixes a build breakage that would otherwise only be fixable
through a circular header dependency.

llvm-svn: 269868
2016-05-17 23:57:10 +00:00
Zachary Turner 63a2846e84 [codeview] Some cleanup of Symbol Records.
* Reworks the CVSymbolTypes.def to work similarly to TypeRecords.def.
* Moves some enums from SymbolRecords.h to CodeView.h to maintain
  consistency with how we do type records.
* Generalize a few simple things like the record prefix
* Define the leaf enum and the kind enum similar to how we do with tyep
  records.

Differential Revision: http://reviews.llvm.org/D20342
Reviewed By: amccarth, rnk

llvm-svn: 269867
2016-05-17 23:50:21 +00:00
David Blaikie bc619cde52 llvm-dwp: remove some unused error handling
llvm-svn: 269866
2016-05-17 23:44:13 +00:00
Zachary Turner b18921b565 Revert "[obj2yaml] [yaml2obj] Support MachO section and section_64
structs"

This reverts commits r269845, r269846, and r269850 as they
introduce a crash in obj2yaml when trying to do a roundtrip.

llvm-svn: 269865
2016-05-17 23:38:22 +00:00
David Blaikie 17ab78e82a llvm-dwp: Move error handling code closer to use
llvm-svn: 269864
2016-05-17 23:37:44 +00:00
Dan Gohman 7100809080 [WebAssembly] Rename $discard to $drop in the assembly output.
llvm-svn: 269862
2016-05-17 23:19:03 +00:00
Rui Ueyama 8dc18c5f45 pdbdump: Print out more strcutures.
I don't yet fully understand the meaning of these data strcutures,
but at least it seems that their sizes and types are correct.
With this change, we can read publics streams till end.

Differential Revision: http://reviews.llvm.org/D20343

llvm-svn: 269861
2016-05-17 23:07:48 +00:00
Paul Robinson 101772128a [DwarfDebug] Make tuning predicates private, should be used only in ctor.
llvm-svn: 269859
2016-05-17 22:53:20 +00:00
Peter Collingbourne 62b5b73eaf docs: Update and clean up BitCodeFormat.rst.
llvm-svn: 269857
2016-05-17 22:30:58 +00:00
Dan Gohman 1054570a29 [WebAssembly] Model the stack evaluation order more precisely.
We currently don't represent get_local and set_local explicitly; they
are just implied by virtual register use and def. This avoids a lot of
clutter, but it does complicate stackifying: get_locals read their
operands at their position in the stack evaluation order, rather than
at their parent instruction. This patch adds code to walk the stack to
determine the precise ordering, when needed.

llvm-svn: 269854
2016-05-17 22:24:18 +00:00
Rafael Espindola 705231bfd4 Delete deprecated function.
llvm-svn: 269853
2016-05-17 22:07:45 +00:00
David Blaikie 8bef4125f2 llvm-dwp: Add error handling for multiple type sections in a dwp file.
llvm-svn: 269851
2016-05-17 22:00:57 +00:00
Chris Bieneman dd3c6b42c5 Fixing a test case that I broke by fixing r269846
This should fix the bots.

llvm-svn: 269850
2016-05-17 21:55:45 +00:00
Lang Hames 8a63b2afc1 [Object] Move isNotObjectErrorInvalidFileType out of header.
llvm-svn: 269848
2016-05-17 21:38:53 +00:00
Justin Bogner 594e07bd78 [PM] Port DSE to the new pass manager
Patch by JakeVanAdrighem. Thanks!

llvm-svn: 269847
2016-05-17 21:38:13 +00:00
Chris Bieneman 622a9394f9 [obj2yaml][yaml2obj] Fixing dyld_info_command mappings
Apparently I mucked up the mappings here, which was causing some binary differences in round tripping.

llvm-svn: 269846
2016-05-17 21:33:59 +00:00
Chris Bieneman 7b504b7531 [obj2yaml] [yaml2obj] Support MachO section and section_64 structs
This patch adds round trip support for MachO section structs.

llvm-svn: 269845
2016-05-17 21:31:02 +00:00
Lang Hames e3ec688df5 Remove unnecessary header include.
llvm-svn: 269844
2016-05-17 21:15:50 +00:00
Dan Gohman d08cd15f33 [WebAssembly] Don't stackify calls past stack pointer modifications.
llvm-svn: 269843
2016-05-17 21:14:26 +00:00
Adrian Prantl 6323ddf99c Debug Info: Introduce a DwarfDebug::UseDWARF2Bitfields flag
instead of having DwarfUnit query the debugger tuning options.

Follow-up commmit to r269827.
Thanks to Paul Robinson for pointing this out!

llvm-svn: 269840
2016-05-17 21:07:16 +00:00
Xinliang David Li 7d0fed74f0 minor cleanup /NFC
llvm-svn: 269839
2016-05-17 21:06:16 +00:00
Hans Wennborg 759af30109 Revert r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
Seems to have broken the Windows ASan bot. Reverting while investigating.

llvm-svn: 269833
2016-05-17 20:38:56 +00:00
Zachary Turner 8f02a54e2b [codeview] Macroify definition of bitwise operators for flags enums.
llvm-svn: 269832
2016-05-17 20:21:01 +00:00
Sanjay Patel 22b01febd4 [InstCombine] add another test for wrong icmp constant (PR27792)
It doesn't matter if the comparison is unsigned; the inc/dec is always signed.

llvm-svn: 269831
2016-05-17 20:20:40 +00:00
Dan Gohman 12de0b91ac [WebAssembly] Stackify induction variable increment instructions.
This handles instructions where the defined register is also used, as in
"x = x + 1".

llvm-svn: 269830
2016-05-17 20:19:47 +00:00