43df6c268b
Finegrainify namespacification
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llvm-svn: 11757
2004-02-23 18:38:20 +00:00
63f41abfe6
Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed
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by operator<< on MachineInstr's, and looking up what register "24" is all of the
time was greatly annoying.
llvm-svn: 11623
2004-02-19 16:17:08 +00:00
14f3fe81c6
Add LeakDetection to MachineInstr.
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Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.
llvm-svn: 11497
2004-02-16 07:17:43 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
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llvm-svn: 11393
2004-02-13 21:01:20 +00:00
e8f7c2f863
Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.
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Rename SetMachineOperandConst's formal parameters to match other methods here.
Mark some methods as being used only by the SPARC back-end.
Fix a missing-paren bug in OutputValue().
llvm-svn: 11363
2004-02-13 04:39:32 +00:00
de8ac749fe
Add parent pointer to MachineInstr that points to owning
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MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
llvm-svn: 11357
2004-02-12 18:49:07 +00:00
6a597d6057
Rename the opCode instance variable to Opcode
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llvm-svn: 11348
2004-02-12 16:09:53 +00:00
6108d9d5ee
This field is never read
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llvm-svn: 11346
2004-02-12 16:04:49 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
3d100ef0ca
When an instruction like: A += B had both A and B virtual registers
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spilled, A was loaded from its stack location twice. This fixes the bug.
llvm-svn: 11093
2004-02-03 01:13:07 +00:00
aaba4639f8
Change interface of MachineOperand as follows:
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a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
2003-12-14 13:24:17 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
02fe6b7683
Fixed spelling.
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llvm-svn: 8588
2003-09-17 21:34:23 +00:00
da92f366c7
Fix assertion in MachineInstr::substituteValue().
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llvm-svn: 7675
2003-08-07 15:01:48 +00:00
020b544cbc
Do not insert physical regsiters into the regsUsed set
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llvm-svn: 7617
2003-08-05 21:55:20 +00:00
cd4f4320b0
All callers of these methods actually wanted them to preserve the flags,
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so get rid of the def/use parameters that were getting passed in.
**** This now changes the semantics of these methods to preserve the flags,
not clobber them!
llvm-svn: 7602
2003-08-05 16:58:46 +00:00
41a894de77
Simplify code, eliminating the need for the X86 isVoid target instr flag
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llvm-svn: 7534
2003-08-03 21:51:45 +00:00
1789d23990
Remove using decl
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llvm-svn: 7531
2003-08-03 20:24:29 +00:00
689adb19b0
Change interface to MachineInstr::substituteValue to specify more precisely
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which args can be substituted: defsOnly, defsAndUses or usesOnly.
llvm-svn: 7154
2003-07-10 19:45:07 +00:00
c468882155
Allow explicit physical registers for implicit operands.
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llvm-svn: 6468
2003-05-31 07:39:06 +00:00
7366fa1aa6
(1) Added special register class containing (for now) %fsr.
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Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
llvm-svn: 6341
2003-05-27 00:05:23 +00:00
5da071b265
Remove obsolete ctor
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llvm-svn: 5301
2003-01-15 19:47:02 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
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llvm-svn: 5272
2003-01-14 22:00:31 +00:00
a2ad874c95
Add support for 3 new forms of MachineOperand
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llvm-svn: 5217
2003-01-13 00:23:24 +00:00
fd1ecadb1d
* Add printing support for FrameIndex operands
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llvm-svn: 5194
2002-12-28 20:37:37 +00:00
f895418b47
Implement printing of MBB arguments
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llvm-svn: 5053
2002-12-15 20:35:25 +00:00
d8ea18b695
Print is const!
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llvm-svn: 4737
2002-11-17 23:22:13 +00:00
17ec8a8dd0
Remove only uses of markDef/markDefAndUse methods
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llvm-svn: 4719
2002-11-17 22:14:08 +00:00
6c614a9931
Remove fixme
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llvm-svn: 4447
2002-10-30 02:02:37 +00:00
ac6e97410b
Add special code to make printing SSA form machine instructions nicer
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llvm-svn: 4446
2002-10-30 01:55:38 +00:00
4e9fb1f52e
Use MRegisterInfo, if available, to print symbolic register names
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llvm-svn: 4438
2002-10-30 00:58:19 +00:00
214808f8ac
Implement structured machine code printing
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llvm-svn: 4435
2002-10-30 00:48:05 +00:00
27ccb70df6
Implement autoinserting ctor
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llvm-svn: 4426
2002-10-29 23:19:00 +00:00
a1b4f0f85e
Remove separate vector of implicit refs from MachineInstr, and
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instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.
llvm-svn: 4399
2002-10-29 19:41:18 +00:00
07e26837a9
Move TargetInstrDescriptors extern to the one .cpp file that refers to it:
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MachineInstr.cpp
llvm-svn: 4392
2002-10-29 17:40:30 +00:00
660bf10981
Use higher level methods, don't use TargetInstrDescriptors directly!
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llvm-svn: 4389
2002-10-29 17:35:39 +00:00
5c7d638208
Remove all traces of the "Opcode Mask" field in the MachineInstr class
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llvm-svn: 4359
2002-10-28 21:17:20 +00:00
bee314fc94
Remove more default arguments that are never used
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llvm-svn: 4358
2002-10-28 21:02:40 +00:00
307fb1a314
Remove default operands that are never used
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llvm-svn: 4357
2002-10-28 20:59:49 +00:00
ca4a9d20b8
* Make MachineOperand ctors private, so MachineOperand can only be created
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by MachineInstr.
* Add a bunch of new methods to allow incremental addition of operands to the
machine instr instance.
llvm-svn: 4356
2002-10-28 20:48:39 +00:00
864d279667
Remove two arguments that are never specified
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llvm-svn: 4348
2002-10-28 19:46:59 +00:00
340bb96e64
Fairly major overhaul of MachineInstr & Operand classes
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- Inline methods that are mostly a single line anyway
- Eliminate several methods that were never called
- Group methods a bit more consistently
llvm-svn: 4329
2002-10-28 04:24:49 +00:00
9668c8c8db
Add #includes now that MachineInstr.h doesn't include llvm/Target/MachineInstrInfo.h
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llvm-svn: 4327
2002-10-28 02:28:39 +00:00
ce64eddb71
- Two minor improvements to the MachineInstr class to reduce footprint and
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overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
llvm-svn: 4261
2002-10-22 23:16:21 +00:00
97c348d9ec
Add method MachineInstr::replace to rewrite a machine instruction in place.
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llvm-svn: 3843
2002-09-20 00:47:49 +00:00
751130215f
Dump routine now writes out allocated register numbers if available.
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llvm-svn: 3737
2002-09-16 15:18:53 +00:00
fa99db77a8
Add method MachineInstr::substituteValue() which substitutes
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one Value with another one in all operands and implicit references
of the machine instruction.
llvm-svn: 3306
2002-08-14 16:52:58 +00:00
959a5fbf8e
* Removed extraneous #includes
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* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3278
2002-08-09 20:08:06 +00:00
10073a9080
*** empty log message ***
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llvm-svn: 3075
2002-07-25 06:17:51 +00:00
Chris Lattner