Commit Graph

227169 Commits

Author SHA1 Message Date
Jan Vesely 43b7b5b846 AMDGPU/SI: Implement atomic load/store for i32 and i64
Standard load/store instructions with GLC bit set.

Reviewers: tstellardAMD, arsenm

Differential Revision: http://reviews.llvm.org/D18760

llvm-svn: 265709
2016-04-07 19:23:11 +00:00
Tom Stellard 9112758077 AMDGPU/SI: Add latency for export instructions
Reviewers: arsenm, nhaehnle

Subscribers: nhaehnle, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18599

llvm-svn: 265708
2016-04-07 18:30:05 +00:00
Quentin Colombet 40ad573d2c [RegBankSelect] Initial implementation for non-optimized output.
The pass walk through the machine function and assign the register banks
using the default mapping. In other words, there is no attempt to reduce
cross register copies.

llvm-svn: 265707
2016-04-07 18:19:27 +00:00
Marshall Clow 89685ed0da Recommit r263036 with additional inlining, so that it will continue to work with existing system dylibs. Implements LWG#2583
llvm-svn: 265706
2016-04-07 18:13:41 +00:00
Derek Bruening a7685389c8 [sanitizer] Add early call handling to strlen interceptor
Summary:
The strlen interceptor is sometimes invoked too early for REAL(strlen) to
be initialized.  A special check is added to use internal_strlen for this
situation.

Reviewers: dim

Subscribers: llvm-commits, samsonov

Differential Revision: http://reviews.llvm.org/D18851

Change-Id: I3acc58f4abbae1904f25324abd84efea67aad0a2
llvm-svn: 265705
2016-04-07 18:07:09 +00:00
Quentin Colombet 42795bdc76 [RegisterBankInfo] Add more details on the expectation of
getInstrMapping.

llvm-svn: 265704
2016-04-07 18:07:07 +00:00
Quentin Colombet fe1ee4f9be [RegisterBankInfo] Provide a target independent helper function to guess
the mapping of an instruction on register bank.

For most instructions, it is possible to guess the mapping of the
instruciton by using the encoding constraints.
It remains instructions without encoding constraints.
For copy-like instructions, we try to propagate the information we get
from the other operands. Otherwise, the target has to give this
information.

llvm-svn: 265703
2016-04-07 18:01:19 +00:00
Saleem Abdulrasool 94cfc603d1 Basic: move CodeGenOptions from Frontend
This is a mechanical move of CodeGenOptions from libFrontend to libBasic.  This
fixes the layering violation introduced earlier by threading CodeGenOptions into
TargetInfo.  It should also fix the modules based self-hosting builds.  NFC.

llvm-svn: 265702
2016-04-07 17:49:44 +00:00
Quentin Colombet ee366eff44 [RegisterBankInfo] Change the signature of getSizeInBits to factor out
the access to MRI and TRI.

llvm-svn: 265701
2016-04-07 17:44:54 +00:00
Simon Pilgrim 112776dc66 Minor Wdocumentation fix. NFCI.
llvm-svn: 265700
2016-04-07 17:38:24 +00:00
Quentin Colombet 5b7ba5092c [RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.

The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.

llvm-svn: 265699
2016-04-07 17:30:18 +00:00
Eugene Zelenko b869289cf3 Mention readability-static-definition-in-anonymous-namespace in release notes.
Consistency in using ` and ``.

Differential revision: http://reviews.llvm.org/D18797

llvm-svn: 265698
2016-04-07 17:28:35 +00:00
Simon Pilgrim fba9352f31 [X86][SSE] Added bitmask pattern shuffle tests
Based on OR(AND(MASK,V0),AND(~MASK,V1)) style patterns

llvm-svn: 265697
2016-04-07 17:23:55 +00:00
Quentin Colombet c33085f2c6 [MachineRegisterInfo] Track register bank for virtual registers.
A virtual register may have either a register bank or a register class.
This is represented by a PointerUnion between the related classes.

Typically, a virtual register went through the following states
regarding register class and register bank:

1. Creation: None is set. Virtual registers are fully generic.
2. Register bank assignment: Register bank is set. Virtual registers
live into a register bank, but we do not know the constraints they need
to fulfil.
3. Instruction selection: Register class is set. Virtual registers are
bound by encoding constraints.

To map these states to GlobalISel, the IRTranslator implements #1,
RegBankSelect #2, and Select #3.

llvm-svn: 265696
2016-04-07 17:20:29 +00:00
Quentin Colombet d21115876c [RegisterBank] Rename RegisterBank::contains into RegisterBank::covers.
llvm-svn: 265695
2016-04-07 17:09:39 +00:00
Ehsan Amiri ec63c92916 [PPC] Added a note to release notes
A draft line added to release notes for PPC, to keep a record of changes.
This is just a draft and will be rewritten towards the end of release.

llvm-svn: 265694
2016-04-07 16:47:35 +00:00
Ulrich Weigand 79391ee0f2 [SystemZ] Fix build break from r265689
Fix build error seen on some build bots due to:
error: default label in switch which covers all enumeration values

llvm-svn: 265693
2016-04-07 16:33:25 +00:00
Mike Aizatsky 66505137eb [sancov] updaing android test
llvm-svn: 265692
2016-04-07 16:22:34 +00:00
Etienne Bergeron a5fd19ba1e [clang-tidy] add new checker for string literal with NUL character.
Summary:
This patch adds the support for detecting suspicious string
literals and their //incorrect// usage.

The following example shows a incorrect character escaping leading 
to an embedded NUL character. 
```
  std::string str = "\0x42";   // Should be "\x42".
```

The patch also add detection of truncated literal when a literal
is passed to a string constructor.

Reviewers: hokein, alexfh

Subscribers: LegalizeAdulthood, bcraig, Eugene.Zelenko, bkramer, cfe-commits

Differential Revision: http://reviews.llvm.org/D18783

llvm-svn: 265691
2016-04-07 16:16:36 +00:00
Kevin B. Smith 3802c4af59 [X86]: Fix for PR27251.
Differential Revision: http://reviews.llvm.org/D18850

llvm-svn: 265690
2016-04-07 16:15:34 +00:00
Ulrich Weigand 2eb027d21f [SystemZ] Implement conditional returns
Return is now considered a predicable instruction, and is converted
to a newly-added CondReturn (which maps to BCR to %r14) instruction by
the if conversion pass.

Also, fused compare-and-branch transform knows about conditional
returns, emitting the proper fused instructions for them.

This transform triggers on a *lot* of tests, hence the huge diffstat.
The changes are mostly jX to br %r14 -> bXr %r14.

Author: koriakin

Differential Revision: http://reviews.llvm.org/D17339

llvm-svn: 265689
2016-04-07 16:11:44 +00:00
Davide Italiano 14e351a553 [IR/Verifier] Merge two ifs into one. NFC.
llvm-svn: 265688
2016-04-07 15:55:28 +00:00
Ulrich Weigand fc23907673 [GVN] Address review comments for D18662
As suggested by Chandler in his review comments for D18662, this
follow-on patch renames some variables in GetLoadValueForLoad and
CoerceAvailableValueToLoadType to hopefully make it more obvious
which variables hold value sizes and which hold load/store sizes.

No functional change intended.

llvm-svn: 265687
2016-04-07 15:55:11 +00:00
Rafael Espindola 3828b88d86 Fix an use after free.
Thanks to asan for pointing it out that OutputSections was being
resized.

llvm-svn: 265686
2016-04-07 15:50:23 +00:00
JF Bastien e1951092ff NFC: disallow comparison of AtomicOrdering
Follow-up to D18775 and related clang change. AtomicOrdering is a lattice, 'stronger' is the right thing to do, direct comparison is fraught with peril.

llvm-svn: 265685
2016-04-07 15:50:05 +00:00
Ulrich Weigand 6e6966460a [GVN] Fix handling of sub-byte types in big-endian mode
When GVN wants to re-interpret an already available value in a smaller
type, it needs to right-shift the value on big-endian systems to ensure
the correct bytes are accessed.  The shift value is the difference of
the sizes of the two types.

This is correct as long as both types occupy multiples of full bytes.
However, when one of them is a sub-byte type like i1, this no longer
holds true: we still need to shift, but only to access the correct
*byte*.  Accessing bits within the byte requires no shift in either
endianness; e.g. an i1 resides in the least-significant bit of its
containing byte on both big- and little-endian systems.

Therefore, the appropriate shift value to be used is the difference of
the *storage* sizes of the two types.  This is already handled correctly
in one place where such a shift takes place (GetStoreValueForLoad), but
is incorrect in two other places: GetLoadValueForLoad and
CoerceAvailableValueToLoadType.

This patch changes both places to use the storage size as well.

Differential Revision: http://reviews.llvm.org/D18662

llvm-svn: 265684
2016-04-07 15:45:02 +00:00
Ehsan Amiri 4701a91e59 [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
http://reviews.llvm.org/D18562

A large number of testcases has been modified so they pass after this test.
One testcase is deleted, because I realized even after undoing the original
change that was committed with this testcase, the testcase still passes. So
I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll)
is an arbitrary change to keep it passing. Given the original intention of the
testcase, and the fact that fixing it will require some time to change the testcase,
we concluded that this quick change will be enough.

llvm-svn: 265683
2016-04-07 15:30:55 +00:00
Rafael Espindola 74031ba1e9 Simplify dynamic relocation creation.
The position of a relocation can always be expressed as an offset in an
output section.

llvm-svn: 265682
2016-04-07 15:20:56 +00:00
Etienne Bergeron 2c82ebe813 [clang-tidy] fix a crash with -fdelayed-template-parsing in UnnecessaryValueParamCheck.
Summary:
This is the same kind of bug than [[ http://reviews.llvm.org/D18238 | D18238 ]].

Fix crashes caused by deferencing null pointer when declarations parsing may be delayed.
The body of the declarations may be null.

The crashes were observed with a Windows build of clang-tidy and the following command-line.
```
command-line switches: -fms-compatibility-version=19 -fms-compatibility
```

Reviewers: alexfh

Subscribers: kimgr, LegalizeAdulthood, cfe-commits

Differential Revision: http://reviews.llvm.org/D18852

llvm-svn: 265681
2016-04-07 14:58:13 +00:00
Benjamin Kramer a62e223281 [clang-tidy] Remove unnecessary getName() on Decls and Types feeding into a DiagnosticBuilder
Going through a string removes some of the smarts of the diagnosic printer
and makes the code more complicated. This change has some cosmetic impact
on the output but that's mostly minor.

llvm-svn: 265680
2016-04-07 14:55:25 +00:00
Etienne Bergeron 53f7c0ea8e [clang-tidy] Fix infinite loop in MisplacedWideningCastCheck.
Summary:
In Release mode, the check was infinite looping over chromium code base.

It seems there is something strange with the creation of the Maps.
I believe the compiler is making some assumption with the implicit conversion from enum <-> int.

By moving the map to a standard switch/cases, we no longer allocate memory and we can keep the same behavior. For a small amount of elements, this is fine.

Reviewers: alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18833

llvm-svn: 265679
2016-04-07 14:52:52 +00:00
Tom Stellard d37630e461 AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStates
Summary: This makes it possible to insert nops at the end of blocks.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18549

llvm-svn: 265678
2016-04-07 14:47:07 +00:00
Michael Zuckerman 5ae71243c2 Fixing duplicate declaration "_mm256 _mm_set_epi32" in revision 262177
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 265677
2016-04-07 14:44:08 +00:00
Rafael Espindola c012db35d7 Delete Off_Bss.
It is now just a special case of Off_Sec.

llvm-svn: 265676
2016-04-07 14:34:15 +00:00
Sanjay Patel ae7a9df7bf make __builtin_isfinite more efficient (PR27145)
isinf (is infinite) and isfinite should be implemented with the same function
except we change the comparison operator.

See PR27145 for more details:
https://llvm.org/bugs/show_bug.cgi?id=27145

Ref: forked off of the discussion in D18513.

Differential Revision: http://reviews.llvm.org/D18648

llvm-svn: 265675
2016-04-07 14:29:05 +00:00
Marshall Clow f90ec0e82e Added a noexcept test
llvm-svn: 265674
2016-04-07 14:24:16 +00:00
Rafael Espindola 56004c577a Don't create dynamic relocs for discarded .eh_frame entries.
This requires knowing input section offsets in output sections before
scanRelocs. This is generally a good thing and should allow further
simplifications in the creation of dynamic relocations.

llvm-svn: 265673
2016-04-07 14:22:09 +00:00
Marshall Clow 0ab4205705 Fix bug #27260 - add missing swap(reference, reference) to vector<bool>.
llvm-svn: 265672
2016-04-07 14:20:31 +00:00
Etienne Bergeron f6660dab02 [clang-tidy] Fix FP with readability-redundant-string-init for default arguments
Summary:
Clang-tidy is reporting a warning of redundant string initialisation
on a string parameter initialized with empty string.

See bug: 27087

The reported example is:
```
#include <string>
void fn(std::string a = "");
```

Reviewers: alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18829

llvm-svn: 265671
2016-04-07 14:18:53 +00:00
Valery Pykhtin e23b6deb01 [AMDGPU] fix readlane/readfirstlane src vgpr operand type.
For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand).
readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding).

Differential Revision: http://reviews.llvm.org/D18696

llvm-svn: 265670
2016-04-07 13:41:51 +00:00
Dmitry Polukhin af16b958c0 Fix test/Assembler/ifunc-asm.ll test on hexagon-elf bots
Temporary disable llc test, it seems that such test should be in some
other directory.

llvm-svn: 265669
2016-04-07 13:18:43 +00:00
Alexey Bataev 2af33e3d3f [OPENMP 4.0] Parsing/sema analysis for 'simdlen' clause in 'declare simd'
construct.

OpenMP 4.0 defines '#pragma omp declare simd' construct that may have
associated 'simdlen' clause with constant positive expression as an
argument:
simdlen(<const_expr>)
Patch adds parsin and semantic analysis for simdlen clause.

llvm-svn: 265668
2016-04-07 12:45:37 +00:00
Dmitry Polukhin a1feff7024 [GCC] Attribute ifunc support in llvm
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. Patch
for Clang http://reviews.llvm.org/D15524

Differential Revision: http://reviews.llvm.org/D15525

llvm-svn: 265667
2016-04-07 12:32:19 +00:00
Kuba Brecka 79cb643b20 [tsan] Remove long sleeps from fork tests
On one of our testing machines, we're running the tests under heavy load, and especially in the fork-based TSan tests, we're seeing timeouts when a test uses sleep(10), assuming that calling fork() on another thread will finish sooner than that. This patch removes a timeout and makes another one longer.

Differential Revision: http://reviews.llvm.org/D18476

llvm-svn: 265666
2016-04-07 12:10:28 +00:00
Kuba Brecka 74f7f399ac [tsan] Add support for OS X OSAtomic* functions
OS X provides atomic functions in libkern/OSAtomic.h. These provide atomic guarantees and they have alternatives which have barrier semantics. This patch adds proper TSan support for the functions from libkern/OSAtomic.h.

Differential Revision: http://reviews.llvm.org/D18500

llvm-svn: 265665
2016-04-07 12:05:09 +00:00
Rafael Espindola 7231c3372f Add a test for the offset of dynamic relocations.
I found that a patch I am working on would have broken this and no
existing test found it.

llvm-svn: 265664
2016-04-07 12:02:42 +00:00
Kuba Brecka 06bbca9ec4 [tsan] Add TSan __tsan_atomic* functions to tsan_interface.h
To avoid using the public header (tsan_interface_atomic.h), which has different data types, let's add all the __tsan_atomic* functions to tsan_interface.h. 

Differential Revision: http://reviews.llvm.org/D18543

llvm-svn: 265663
2016-04-07 11:59:36 +00:00
Kuba Brecka 399af93242 [tsan] Add interceptors for dispatch_apply
Adding an interceptor with two more release+acquire pairs to avoid false positives with dispatch_apply.

Differential Revision: http://reviews.llvm.org/D18722

llvm-svn: 265662
2016-04-07 11:52:51 +00:00
Kuba Brecka e316bb61b3 [tsan] Add XPC support (OS X)
XPC APIs have async callbacks, and we need some more happen-before edges to avoid false positives. This patch add them, plus a test case (sorry for the long boilerplate code, but XPC just needs all that).

Differential Revision: http://reviews.llvm.org/D18493

llvm-svn: 265661
2016-04-07 11:47:11 +00:00
Kuba Brecka cecb7faea2 [tsan] Add support for dispatch event sources
GCD has APIs for event sources, we need some more release-acquire pairs to avoid false positives in TSan.

Differential Revision: http://reviews.llvm.org/D18515

llvm-svn: 265660
2016-04-07 11:38:53 +00:00