Commit Graph

290615 Commits

Author SHA1 Message Date
Jan Kratochvil 43b40939fb Fix compiler unused variable warning in DWARFUnit
Alex Langford has reported it from: https://reviews.llvm.org/D46810

llvm-svn: 333449
2018-05-29 18:53:25 +00:00
Florian Hahn 33b6f9acc4 [TableGen] Use explicit constructor for InstMemo
This should fix a few buildbot failures with old
GCC versions.

llvm-svn: 333448
2018-05-29 18:34:42 +00:00
Akira Hatanaka 1da9dbbc25 [CodeGen][Darwin] Set the calling-convention of thread-local variable
initialization functions to 'cxx_fast_tlscc'.

This fixes a bug where instructions calling initialization functions for
thread-local static members of c++ template classes were using calling
convention 'cxx_fast_tlscc' while the called functions weren't annotated
with the calling convention.

rdar://problem/40447463

Differential Revision: https://reviews.llvm.org/D47354

llvm-svn: 333447
2018-05-29 18:28:49 +00:00
Craig Topper 681b882d4e [X86] Tag some 128/256 load/store instructions as requiring avx512vl instead of avx512f.
llvm-svn: 333446
2018-05-29 18:23:22 +00:00
Eli Friedman 63fead0f43 [ARM] Enable SETCCCARRY lowering for Thumb1.
We've had Thumb1 support for ARMISD::SUBE for a while now, so this just
works.  Reduces codesize a bit for 64-bit integer comparisons.

Differential Revision: https://reviews.llvm.org/D47387

llvm-svn: 333445
2018-05-29 18:17:16 +00:00
Alex Langford 47039c460a Remove lldb-private headers when building LLDB.framework with CMake
Summary:
Generating LLDB.framework when building with CMake+Ninja will copy the
lldb-private headers because public_headers contains them, even though we try
to make sure they don't get copied by removing root_private_headers from
root_public_headers.

This patch also removes SystemInitializerFull.h from the LLDB.framework headers when building with CMake.

Reviewers: compnerd, sas, labath, beanz, zturner

Reviewed By: labath

Subscribers: clayborg, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D47278

llvm-svn: 333444
2018-05-29 18:09:09 +00:00
Matt Arsenault 64c6ab445e IRBuilder: Add overload for intrinsics without args
llvm-svn: 333443
2018-05-29 18:06:50 +00:00
Matt Arsenault ceafc55e5a AMDGPU: Pass function directly instead of MachineFunction
These functions just query the underlying IR function,
so pass it directly.

llvm-svn: 333442
2018-05-29 17:42:50 +00:00
Matt Arsenault 2fb9ccf770 AMDGPU: Add nuw to add off of kernarg ptr
llvm-svn: 333441
2018-05-29 17:42:38 +00:00
Matt Arsenault ab2b79cb97 DAG: Remove redundant version of getRegisterTypeForCallingConv
There seems to be no real reason to have these separate copies.
The existing implementations just copy each other for x86.
For Mips there is a subtle difference, which is just a bug
since it changes based on the context where which one was called.
Dropping this version, all tests pass. If I try to merge them
to match the removed version, a test fails.

llvm-svn: 333440
2018-05-29 17:42:26 +00:00
Tom Stellard 57b9342c80 AMDGPU: Split R600 MCInst lowering into its own class
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47307

llvm-svn: 333439
2018-05-29 17:41:59 +00:00
Florian Hahn 7d3f9a88b9 [TableGen] Fix leaking of PhysRegInputs.
Instead of dynamically allocating the vector for PhysRegs, we can
allocate it on the stack and move it into InstructionMemo.

Reviewers: mcrosier, craig.topper, RKSimon, dsanders

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D47461

llvm-svn: 333438
2018-05-29 17:40:03 +00:00
Jan Kratochvil 1bbff4520e Fix DWARFUnit::GetUnitDIEPtrOnly stale pointer
GetUnitDIEPtrOnly() needs to return pointer to the first DIE.
But the first element of m_die_array after ExtractDIEsIfNeeded(true)
may move in memory after later ExtractDIEsIfNeeded(false).

DWARFDebugInfoEntry::collection m_die_array is std::vector,
its data may move during its expansion.

Differential revision: https://reviews.llvm.org/D46810

llvm-svn: 333437
2018-05-29 17:17:46 +00:00
Nicolai Haehnle e7ae0f48f4 TableGen: add some more helpful error messages
Summary: Change-Id: I6f3dacf675a4126134577616e259696bebdade3a

Reviewers: tra, simon_tatham, craig.topper, MartinO, arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D47429

Change-Id: I614de12a4c154c6d53c090f2f3e53ad2d09942c5
llvm-svn: 333436
2018-05-29 17:12:20 +00:00
Marshall Clow 5a823d8d63 Mark __clear_and_shrink() as noexcept. This prevents the generation of a catch block and call to terminate in string's move assignment. Thanks to Howard for the 'catch'.
llvm-svn: 333435
2018-05-29 17:04:37 +00:00
Florian Hahn 6c21b3b595 [TableGen] Fix leaking synthesized registers.
By keeping track of unique_ptrs to the synthesized definitions in
CodeGenRegBank we avoid leaking them.

Reviewers: dsanders, kparzysz, stoklund

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D47462

llvm-svn: 333434
2018-05-29 16:55:06 +00:00
Cameron McInally b1bb60aec9 [StrictFP] Make getStrictFPOpcodeAction(...) more accessible
NFCI. This function will be reused in upcoming patches.

Differential Revision: https://reviews.llvm.org/D47380

llvm-svn: 333433
2018-05-29 16:49:32 +00:00
Jonas Devlieghere 36ab8956f4 [lit] Add support for passing arguments to dotest.py via lit.
The lldb test suite is highly configurable. While part of this
configuration takes place at configure/build-time, a common scenario
involves running the test suite several times with different
configuration. For example, we might want to test the current lldb
against inferiors built with different compilers.

This configuration was already possible for lldb-dotest, but was lacking
for the lit counterpart. It is now possible to pass arguments to pass
  arguments like this:

  ./bin/llvm-lit ../llvm/tools/lldb/lit/Suite/ -Ddotest-args="-foo;-bar"

llvm-svn: 333432
2018-05-29 16:49:07 +00:00
Simon Pilgrim db9dbac501 [X86][SSE] Regenerate sdiv combine tests
llvm-svn: 333431
2018-05-29 16:36:27 +00:00
Simon Pilgrim 77149a801f [X86][AVX] Regenerate vzeroall/vzeroupper cleanup tests
llvm-svn: 333430
2018-05-29 16:35:38 +00:00
Evandro Menezes f8425340e4 [AArch64] Fix PR32384: bump up the number of stores per memset and memcpy
As suggested in https://bugs.llvm.org/show_bug.cgi?id=32384#c1, this change
makes the inlining of `memset()` and `memcpy()` more aggressive when
compiling for speed.  The tuning remains the same when optimizing for size.

Patch by: Sebastian Pop <s.pop@samsung.com>
          Evandro Menezes <e.menezes@samsung.com>

Differential revision: https://reviews.llvm.org/D45098

llvm-svn: 333429
2018-05-29 15:58:50 +00:00
Simon Atanasyan 69301c9eb9 [mips] Process numeric register name in the .set assignment directive
Now LLVM assembler cannot process the following code and generates an
error. GNU tools support .set assignment directive with numeric register
name.

```
.set r4, 4

test.s:1:11: error: invalid token in expression
  .set r4, $4
           ^
```

This patch teach assembler to handle such directives correctly.
Unfortunately a numeric register name cannot be represented as an
expression. That's why we have to maintain a separate `StringMap`
in the `MipsAsmParser` to keep mapping between aliases names and
register numbers.

Differential revision: https://reviews.llvm.org/D47464

llvm-svn: 333428
2018-05-29 15:58:06 +00:00
Amara Emerson d5a9e7bbc9 Revert "[AArch64] added FP16 vcvth intrinsic support"
This reverts commit r333410 due to bot failures.

llvm-svn: 333427
2018-05-29 15:34:22 +00:00
Michael Kruse d3ce899ddf [ForwardOpTree] Use less computationally expensive method to compute def-to-target map. NFCI.
When forwarding a LoadInst to another statement, a map that translates
their domain is needed. Before this patch, is was computed by appending
the def-to-use map to the def-to-target of the operand tree's target.

This patch lets the new method getDefToTarget do this. This is
computationally less expensive due to:

 * Caching of the result such that it can be used for multiple operands
   tree to the same target.

 * The map is only computed when there is a LoadInst that needs it.

 * It is only computed for the statement requiring the translator map,
   instead of having an intermediate result for every edge in the
  operand tree.

The downside is that this scheme cannot handle forwarding from a
previous loop iteration (which would require the entire path from
statement to target). Since ForwardOpTree currently does not support
forwarding across loop iterations (SCEV expressions would need to be
transformed), this was not needed anyway.

Differential Revision: https://reviews.llvm.org/D47385

llvm-svn: 333426
2018-05-29 15:19:17 +00:00
Jonas Devlieghere 1fc7fc4db8 [COFF] Update CV register names.
Update tests to use the new prefix for CodeView registers added in
r333421.

llvm-svn: 333425
2018-05-29 14:58:41 +00:00
Alexander Ivchenko 6572425462 [llvm-readobj] Support GNU_PROPERTY_X86_FEATURE_1_AND notes in .note.gnu.property
This patch allows parsing GNU_PROPERTY_X86_FEATURE_1_AND
notes in .note.gnu.property sections. These notes
indicate that the object file is built to support Intel CET.

patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D47473

llvm-svn: 333424
2018-05-29 14:49:51 +00:00
Nico Weber 7eddafaf12 add test for r332053
llvm-svn: 333423
2018-05-29 14:48:30 +00:00
Sander de Smalen 8704b03c4d [AArch64][SVE] Asm: Support for predicated LSL/LSR (vectors)
Reviewers: rengolin, huntergr, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47365

llvm-svn: 333422
2018-05-29 14:40:24 +00:00
Jonas Devlieghere 43dce3edbe [CodeView] Add prefix to CodeView registers.
Adds CVReg to CodeView register names to prevent a duplicate symbol with
CR3 defined in termios.h, as suggested by Zachary on the mailing list.

http://lists.llvm.org/pipermail/llvm-dev/2018-May/123372.html

Differential revision: https://reviews.llvm.org/D47478

rdar://39863705

llvm-svn: 333421
2018-05-29 14:35:34 +00:00
Sean Fertile ef0f7496d1 [PPC64] Support General-Dynamic tls.
Adds handling of all the relocation types for general-dynamic thread local
storage.

Differential Revision: https://reviews.llvm.org/D47325

llvm-svn: 333420
2018-05-29 14:34:38 +00:00
Alexander Ivchenko 96062eaa8e [X86] Scalar mask and scalar move optimizations
1. Introduction of mask scalar TableGen patterns.
2. Introduction of new scalar move TableGen patterns
   and refactoring of existing ones.
3. Folding of pattern created by introducing scalar
   masking in Clang header files.

Patch by tkrupa

Differential Revision: https://reviews.llvm.org/D47012

llvm-svn: 333419
2018-05-29 14:27:11 +00:00
Simon Atanasyan dc86ba4b8b [ELF][MIPS] Add test case to cover handling of microMIPS relocations in 64-bit mode
llvm-svn: 333418
2018-05-29 14:20:05 +00:00
Rafael Stahl 0137aa8679 [analyzer] const init: handle non-explicit cases more accurately
Summary: If the access is out of bounds, return UndefinedVal. If it is missing an explicit init, return the implicit zero value it must have.

Reviewers: NoQ, xazax.hun, george.karpenkov

Reviewed By: NoQ

Subscribers: szepet, rnkovacs, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D46823

llvm-svn: 333417
2018-05-29 14:14:22 +00:00
Than McIntosh 48bf43df8a StackColoring: better handling of statically unreachable code
Summary:
Avoid assert/crash during liveness calculation in situations
where the incoming machine function has statically unreachable BBs.
Second attempt at submitting; this version of the change includes
a revised testcase.

Fixes PR37130.

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47372

llvm-svn: 333416
2018-05-29 13:52:24 +00:00
Lei Huang 716103f1cd [PowerPC] Fix the incorrect iterator inside peephole
Instruction selection can insert nodes into the underlying list after the root
node so iterating will thereby miss it. We should NOT assume that, the root node
is the last element in the DAG nodelist.

Patch by: steven.zhang (Qing Shan Zhang)

Differential Revision: https://reviews.llvm.org/D47437

llvm-svn: 333415
2018-05-29 13:38:56 +00:00
Sander de Smalen 26b9b2a8c3 [AArch64][SVE] Asm: Support for AND, ORR, EOR and BIC instructions.
This patch addresses the following variants:
  - bitmask immediate,         e.g. 'and z0.d, z0.d, #0x6'.
  - unpredicated data vectors, e.g. 'and z0.d, z1.d, z2.d'.
  - predicated data vectors,   e.g. 'and z0.d, p0/m, z0.d, z1.d'.

And also several aliases, such as: 
  - ORN, alias of ORR.
  - EON, alias of EOR.
  - BIC, alias of AND (immediate variant)
  - MOV, alias of ORR (if unpredicated and source register operands are the same)

Reviewers: rengolin, huntergr, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47363

llvm-svn: 333414
2018-05-29 13:08:43 +00:00
David Stenberg d45d7eae05 Fix emission of phony dependency targets when adding extra deps
Summary:
This commit fixes a bug where passing extra dependency entries
(using -fdepfile-entry) would result in -MP incorrectly emitting
a phony target for the input file, and no phony target for the
first extra dependency.

The extra dependencies are added first to the filename vector in
DFGImpl. That clashed with the emission of the phony targets, as
the code assumed that the first index always correspond to the
input file.

Reviewers: rsmith, pcc, krasin, bruno, vsapsai

Reviewed By: vsapsai

Subscribers: vsapsai, bruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D44568

llvm-svn: 333413
2018-05-29 13:07:58 +00:00
Jonas Devlieghere f6c870a794 [test] Fix --framework argument passed to dotest.
The framework argument was broken when I removed the generator
expressions upstream.  I replaced $<TARGET_FILE_DIR:liblldb> with
${LLVM_LIBRARY_OUTPUT_INTDIR}) which is not correct.

rdar://40534649

llvm-svn: 333412
2018-05-29 12:30:27 +00:00
Kirill Bobyrev 5a267ed889 [clangd] Minor cleanup
This patch silences few clang-tidy warnings, removes unwanted trailing
whitespace and enforces coding guidelines.

The functionality is not affected since the cleanup is rather straightforward,
all clangd tests are still green.

Reviewers: ioeric, ilya-biryukov

Reviewed By: ioeric

Subscribers: MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47471

llvm-svn: 333411
2018-05-29 11:50:51 +00:00
Luke Geeson 16092ab3c5 [AArch64] added FP16 vcvth intrinsic support
Summary: Change-Id: I0df845749c7689dfc99150ba7c19c7d0dadbd705

Reviewers: javed.absar, SjoerdMeijer

Reviewed By: SjoerdMeijer

Subscribers: llvm-commits, SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D46311

llvm-svn: 333410
2018-05-29 11:40:33 +00:00
Simon Atanasyan a1d69f9e53 [mips] Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 / HI16 relocations
Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 and
R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_HI16 chains of
relocations for %lo(%neg(%gp_rel())) and %hi(%neg(%gp_rel()))
expressions in case of microMIPS.

Differential Revision: http://reviews.llvm.org/D47220

llvm-svn: 333409
2018-05-29 11:33:54 +00:00
Sander de Smalen 98686c6b15 [AArch64][SVE] Asm: Support for ADD (immediate) instructions.
This patch adds addsub_imm8_opt_lsl_(i8|i16|i32|i64) operands
that are unsigned values in the range 0 to 255. For element widths of
16 bits or higher it may also be a signed multiple of 256 in the
range 0 to 65280.

Note: This also does some refactoring to reuse convenience function
getShiftedVal<shift>(), and now allows AArch64 scalar 'ADD #-4096' to be
accepted to be mapped to SUB #4096.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47310

llvm-svn: 333408
2018-05-29 10:39:49 +00:00
Simon Atanasyan 6be87bce29 [mips] Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocations
Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocations for %higher()
and %highest() expressions in case of microMIPS. These relocations do
exactly the same things as R_MIPS_HIGHER / R_MIPS_HIGHEST, but for
consistency it's better to write microMIPS variants.

Differential Revision: http://reviews.llvm.org/D47219

llvm-svn: 333407
2018-05-29 10:27:44 +00:00
Luke Geeson cc09d78297 Test Commit Access - Removed Whitespace
llvm-svn: 333406
2018-05-29 10:12:27 +00:00
Simon Dardis 0fad58cbaf [mips] Correct the predicates for a number of instructions.
Previously, their listed predicates were overridden at the scope level.

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46947

llvm-svn: 333405
2018-05-29 09:56:19 +00:00
Simon Atanasyan b2d61fa3d8 [mips] Cleanup the code to reduce diff with the upcoming patches. NFC
llvm-svn: 333404
2018-05-29 09:51:33 +00:00
Simon Atanasyan d408ec4cfa [mips] Escape else-after-return. NFC
llvm-svn: 333403
2018-05-29 09:51:28 +00:00
Simon Atanasyan 3535cb1130 [mips] Stop parsing a .set assignment if the first argument is not an identifier
Before this fix the following code triggers two error messages. The
second one is at least useless:

  test.s:1:9: error: expected identifier after .set
    .set  123, $a0
          ^
  test-set.s:1:9: error: unexpected token, expected comma
    .set  123, $a0
          ^

llvm-svn: 333402
2018-05-29 09:51:22 +00:00
Pavel Labath 0bd19ead89 XFAIL TestMachCore for windows hosts
It's been failing since I enabled the test for non-darwin targets. I
made it reference the same bug as the linux core, as it's likely that
the root cause is the same.

llvm-svn: 333401
2018-05-29 09:22:58 +00:00
Bruce Mitchener 6e82c4d6cc Remove Linux-specific includes for posix/FileSystem.cpp
Summary:
This improves the process of cross-compiling from macOS to Linux
since these files aren't used / needed at all.

Reviewers: clayborg, labath

Subscribers: lldb-commits, krytarowski

Differential Revision: https://reviews.llvm.org/D47420

llvm-svn: 333400
2018-05-29 09:14:40 +00:00