1a0df9a80e
Enable multiple Compile Units in one module.
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This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately.
llvm-svn: 103439
2010-05-10 22:49:55 +00:00
d6908dc4a2
It's not safe to propagate implicit_def that defines part of a register.
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llvm-svn: 103436
2010-05-10 21:25:30 +00:00
9d55b23425
Clear RegSequences vector after eliminating REG_SEQUENCE instructions.
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llvm-svn: 103435
2010-05-10 21:24:55 +00:00
02947a4551
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
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llvm-svn: 103419
2010-05-10 19:03:57 +00:00
faef5d0281
Re-defined valno is always valno even for partial re-def's.
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llvm-svn: 103410
2010-05-10 17:33:49 +00:00
01fcdaa7f5
Fix PR7096. When a block containing multiple defs is tail duplicated, the
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SSAUpdater for the value from the first def may see uses of undefined values,
because the later defs will not have been updated yet.
llvm-svn: 103407
2010-05-10 17:14:26 +00:00
e4d6670f6b
Add an assertion to catch attempts to access off the end of the array.
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Based on a patch by Javier Martinez.
llvm-svn: 103391
2010-05-10 04:54:28 +00:00
0625af2a88
Instead of just verifying compile unit, verify entire type, variable, namespace etc..
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llvm-svn: 103327
2010-05-07 23:33:41 +00:00
cbe7a8508a
Remove DIGlobal.
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llvm-svn: 103325
2010-05-07 23:19:07 +00:00
7de01ec2c9
SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
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and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.
llvm-svn: 103310
2010-05-07 22:19:08 +00:00
2ae3397536
Verify variable directly.
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llvm-svn: 103305
2010-05-07 22:04:20 +00:00
028449325b
add COFF support for COMDAT sections, patch by Nathan Jeffords!
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llvm-svn: 103304
2010-05-07 21:49:09 +00:00
8d6a2b7428
Verify entire type descriptor not just tag.
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llvm-svn: 103303
2010-05-07 21:45:47 +00:00
51c1695a0a
Fix PR 7087, and probably other things, by extending
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getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
llvm-svn: 103299
2010-05-07 21:35:53 +00:00
32cc43c242
Wrap const MDNode * inside DIDescriptor.
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llvm-svn: 103295
2010-05-07 20:54:48 +00:00
cfa8e9d45f
Avoid DIDescriptor::getNode(). Use overloaded operators instead.
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llvm-svn: 103272
2010-05-07 18:11:54 +00:00
87cffa9498
switch MCSectionCOFF from a syntactic to semantic representation,
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patch by Peter Housel!
llvm-svn: 103267
2010-05-07 17:17:41 +00:00
45f530db39
Revert r103133 and add testcase from PR7066.
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llvm-svn: 103233
2010-05-07 01:45:38 +00:00
e6d40166a8
Transfer debug location information from PHI nodes to resulting
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lowered copies.
llvm-svn: 103228
2010-05-07 01:10:20 +00:00
e7dff14d5d
Print debug information for SDNodes.
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llvm-svn: 103227
2010-05-07 01:09:21 +00:00
7421ae48bf
Disable the new unknown-location code for now. It causes a major
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increase in the debug line info section, and it's causing
regressions in a gdb testsuite.
llvm-svn: 103226
2010-05-07 01:08:53 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
f0ac19a6d5
80 col violation.
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llvm-svn: 103185
2010-05-06 16:33:12 +00:00
c0255bac1d
Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.ll
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with the fix in 103157.
%reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0
is not coalescable since none of the super-registers of S1 are in reg1039's
register class: DPR_VFP2. But it is still a legal copy instruction so it should
not assert.
llvm-svn: 103170
2010-05-06 06:23:31 +00:00
47d04e3e41
Update LabelsBeforeInsn also, when creating unknown-position labels.
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llvm-svn: 103145
2010-05-06 00:29:41 +00:00
35096e82c5
Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed.
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Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.
llvm-svn: 103140
2010-05-06 00:05:37 +00:00
a7c717d8d4
In bottom-up mode, defer the materialization of local constant values.
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llvm-svn: 103139
2010-05-06 00:02:14 +00:00
ffcb590b0f
Add an "IsBottomUp" member function to FastISel, which will be used to
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support a new bottom-up mode.
llvm-svn: 103138
2010-05-05 23:58:35 +00:00
50849c63e4
Emit debug info for MachineInstrs with unknown debug locations, instead
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of just letting them inherit the debug locations of adjacent instructions.
Debug info should aim to be either accurate or absent.
llvm-svn: 103135
2010-05-05 23:41:32 +00:00
1b6f698e85
Fix PR6520. An earlyclobber physreg must not be allocated to anything else.
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llvm-svn: 103133
2010-05-05 23:07:41 +00:00
92b21cad5d
Use getValue() for PHINodes when direct NodeMap access does not work.
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llvm-svn: 103126
2010-05-05 22:29:00 +00:00
4b6abd8c2b
Move REG_SEQUENCE removal to 2addr pass.
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llvm-svn: 103109
2010-05-05 18:45:40 +00:00
38d9a6f805
Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
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80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0
llvm-svn: 103102
2010-05-05 18:27:40 +00:00
d1b38e317d
Combine the implementations of the core part of the SSAUpdater and
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MachineSSAUpdater to avoid duplicating all the code.
llvm-svn: 103060
2010-05-04 23:18:19 +00:00
4c908f4181
Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
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%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...
PHI elimination now does more than phi elimination. It is really a de-SSA pass.
llvm-svn: 103039
2010-05-04 20:26:52 +00:00
a5c0cc329e
Rename variables for consistency.
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llvm-svn: 103013
2010-05-04 17:12:26 +00:00
075e9b5d66
Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is available all the time.
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llvm-svn: 103001
2010-05-04 06:15:30 +00:00
55869af998
Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
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llvm-svn: 102993
2010-05-04 00:58:39 +00:00
f869d9adf2
Teach scheduler about REG_SEQUENCE.
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llvm-svn: 102984
2010-05-04 00:22:40 +00:00
0e79c864c3
Re-enable isel kill flags, now that the local allocator is ignoring them.
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llvm-svn: 102981
2010-05-04 00:12:15 +00:00
b944b39887
Remove preexisting kill flags in RegAllocLocal, just like LiveVariables does.
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This should make it possible to start producing kill flags in isel without
breaking stuff.
llvm-svn: 102976
2010-05-03 23:49:20 +00:00
626b5d8e0c
Factor out FastISel's code for materializing constants and other values
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in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
llvm-svn: 102975
2010-05-03 23:36:34 +00:00
f4e4e84115
Check that subregisters don't have independent values in RemoveCopyByCommutingDef().
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This fixes PR6941.
llvm-svn: 102970
2010-05-03 22:40:32 +00:00
1e679cbfff
Reword a comment slightly.
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llvm-svn: 102966
2010-05-03 22:18:49 +00:00
c936b56871
Print basic block numbers in live interval debug output. Since the rest of the
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debug output is showing machine instructions, the IR-level basic block names
aren't very meaningful, and because multiple machine basic blocks may be
derived from one IR-level BB, they're also not unique.
llvm-svn: 102960
2010-05-03 21:38:11 +00:00
2ad68de4aa
Fix a bug which prevented tail merging of return instructions in
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beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.
The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.
Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.
And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.
llvm-svn: 102907
2010-05-03 14:35:47 +00:00
1ebb395cee
Don't count debug info as instructions. This was
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preventing the emission of the NOP on Darwin for a
function with no actual code. From timberwolfmc
with TEST=optllcdbg.
llvm-svn: 102843
2010-05-01 16:41:11 +00:00
737718d4f4
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
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when needed. This fixes PR7001
llvm-svn: 102838
2010-05-01 12:52:34 +00:00
ec74444d3e
Remove the code for special-casing byval for fast-isel. SelectionDAG
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handles argument lowering anyway, so there's no need for special
casing here.
llvm-svn: 102828
2010-05-01 02:44:23 +00:00
Devang Patel