Commit Graph

189599 Commits

Author SHA1 Message Date
Nico Weber 933607f10e Add stub sections about Parse, Sema, CodeGen to the internals manual.
I'd be interested if the paragraph on Parse not knowing much about AST is
something folks agree with.  I think this used to be true after rjmccall removed
the Action interface in r112244 and I believe it's still true, but I'm not sure.
(For example, ParseOpenMP.cpp does include AST/StmtOpenMP.h.  Other than that,
Parse not using AST nodes much seems to be still true, though.)

llvm-svn: 224894
2014-12-28 02:07:26 +00:00
Nico Weber 3fc6a28c34 Remove unneeded include of DeclCXX.h from libParse.
llvm-svn: 224893
2014-12-28 01:52:28 +00:00
Nico Weber ff4b35e6e7 Objective-C: Serialize "more than one decl" state of ObjCMethodList.
This fixes PR21587, what r221933 fixed for regular programs is now also
fixed for decls coming from PCH files.

Use another bit from the count/bits uint16_t for storing the "more than one
decl" bit.  This reduces the number of bits for the count from 14 to 13.
The selector with the most overloads in Cocoa.h has ~55 overloads, so 13 bits
should still be plenty.  Since this changes the meaning of a serialized bit
pattern, also increase clang::serialization::VERSION_MAJOR.

Storing the "more than one decl" state of only the first overload isn't quite
correct, but Sema::AreMultipleMethodsInGlobalPool() currently only looks at
the state of the first overload so it's good enough for now.

llvm-svn: 224892
2014-12-27 22:14:15 +00:00
Craig Topper 6e3a582809 [x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Correctly this time. I did the wrong patterns the first time.
llvm-svn: 224891
2014-12-27 20:08:45 +00:00
David Majnemer d0bcef2040 PowerPC: CTR shouldn't fire if a TLS call is in the loop
Determining the address of a TLS variable results in a function call in
certain TLS models.  This means that a simple ICmpInst might actually
result in invalidating the CTR register.

In such cases, do not attempt to rely on the CTR register for loop
optimization purposes.

This fixes PR22034.

Differential Revision: http://reviews.llvm.org/D6786

llvm-svn: 224890
2014-12-27 19:45:38 +00:00
Aaron Ballman 4eb5c2e089 Fixing another -Wunused-variable warning, this time in release builds without asserts. NFC.
llvm-svn: 224889
2014-12-27 19:17:53 +00:00
Aaron Ballman b66d54c549 Removing a variable that is set but never used, to silence a -Wunused-but-set-variable warning; NFC.
llvm-svn: 224888
2014-12-27 19:01:19 +00:00
Craig Topper 1113fb343e [x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Forgot to do this when I did SSE/SSE2/AVX/AVX2.
llvm-svn: 224887
2014-12-27 18:51:06 +00:00
Craig Topper 53f75b9dc0 [x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates.
llvm-svn: 224886
2014-12-27 18:11:00 +00:00
Craig Topper acc73445b7 [x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The frontend now checks this when the builtin is used. This will allow the instruction printer to not have to deal with invalid immediates on these instructions.
llvm-svn: 224885
2014-12-27 18:10:56 +00:00
Keno Fischer 8438b08663 [FastIsel][X86] Fix invalid register replacement for bool args
Summary:
Consider the following IR:

  %3 = load i8* undef
  %4 = trunc i8 %3 to i1
  %5 = call %jl_value_t.0* @foo(..., i1 %4, ...)
  ret %jl_value_t.0* %5

Bools (that are the result of direct truncs) are lowered as whatever
the argument to the trunc was and a "and 1", causing the part of the
MBB responsible for this argument to look something like this:

  %vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7

Later, when the load is lowered, it will insert

  %vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14

but remember to (at the end of isel) replace vreg7 by vreg15. Now for
the bug. In fast isel lowering, we mistakenly mark vreg8 as the result
of the load instead of the trunc. This adds a fixup to have
vreg8 replaced by whatever the result of the load is as well, so
we end up with

  %vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15

which is an SSA violation and causes problems later down the road.

This fixes PR21557.

Test Plan: Test test case from PR21557 is added to the test suite.

Reviewers: ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6245

llvm-svn: 224884
2014-12-27 13:10:15 +00:00
Chandler Carruth 28daca211c [x86] Also add the missing type casts on the returns in the sha
intrinsic header file. Along with r224822, this should restore the build
bots to passing.

llvm-svn: 224883
2014-12-27 11:50:51 +00:00
Craig Topper ab70789199 [x86] Add missing typecast to __v4si to sha intrinsic header file.
llvm-svn: 224882
2014-12-27 07:19:25 +00:00
Nico Weber e3b11043d0 Objective-C: Tweak unavailability warning.
Don't warn when a selector has an unavailable and an available variant,
and the first also has an implementation.

llvm-svn: 224881
2014-12-27 07:09:37 +00:00
Craig Topper dd84ec5fd9 [x86] Add range checking to the constant argument of cmpps/pd/ss/sd builtinas.
llvm-svn: 224880
2014-12-27 07:00:08 +00:00
Craig Topper 2094d8fe88 [x86] Add the (v)cmpps/pd/ss/sd builtins to match gcc. Use them in the sse intrinsic files.
This still lower to the same intrinsics as before.

This is preparation for bounds checking the immediate on the avx version of the builtin so we don't pass illegal immediates into the backend. Since SSE uses a smaller size immediate its not possible to bounds check when using a shared builtin. Rather than creating a clang specific builtin for the different immediate, I decided (after consulting with Chandler) that it was better to match gcc.

llvm-svn: 224879
2014-12-27 06:59:57 +00:00
Craig Topper 2d85a4c537 Add more feature flags to the x86 instrinsic test.
llvm-svn: 224878
2014-12-27 06:59:44 +00:00
Craig Topper a31a5da904 Fix formatting. NFC.
llvm-svn: 224877
2014-12-27 06:59:37 +00:00
Nico Weber 2e0c8f79d9 Address review feedback on r221933.
Remove ObjCMethodList::Count, instead store a "has more than one decl" bit in
the low bit of the ObjCMethodDecl pointer, using a PointerIntPair.

Most of this patch is replacing ".Method" with ".getMethod()".

No intended behavior change.

llvm-svn: 224876
2014-12-27 03:58:08 +00:00
Nico Weber c33b2fd0ad Make the test from r224873 actually pass.
The behavior looks incorrect to me, but the test is supposed to document
current behavior for now.

llvm-svn: 224875
2014-12-27 03:38:18 +00:00
Craig Topper 1c161a35b7 Mark __builtin_ia32_cmppd256 and __builtin_ia32_cmpps256 as taking an ICE for the constant parameter.
llvm-svn: 224874
2014-12-27 01:20:16 +00:00
Nico Weber 1813ec797d Add more test coverage for the Objective-C deprected selector warning.
I broke this case in a local patch I'm writing, and there was no test to stop
me.  Now there is.

llvm-svn: 224873
2014-12-27 01:05:55 +00:00
Rafael Espindola 47beb8ace0 Convert test to llvm-readobj. NFC.
llvm-svn: 224872
2014-12-26 22:47:39 +00:00
Colin LeMahieu 8233fb002d [Hexagon] Adding auto-incrementing loads with and without byte reversal.
llvm-svn: 224871
2014-12-26 21:09:25 +00:00
Colin LeMahieu 0a721cd4e1 [Hexagon] Adding locked loads.
llvm-svn: 224870
2014-12-26 20:42:27 +00:00
Colin LeMahieu ff370ed90e [Hexagon] Adding deallocframe and circular addressing loads.
llvm-svn: 224869
2014-12-26 20:30:58 +00:00
Colin LeMahieu c83cbbf6a1 [Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
llvm-svn: 224868
2014-12-26 19:31:46 +00:00
Colin LeMahieu fe9612e09d [Hexagon] Adding post-increment unsigned byte loads.
llvm-svn: 224867
2014-12-26 19:12:11 +00:00
Colin LeMahieu 96976a10a3 [Hexagon] Adding post-increment signed byte loads with tests.
llvm-svn: 224866
2014-12-26 18:57:13 +00:00
David Majnemer fd4f63ad4b Adjust the rest of the tests due to r224849.
llvm-svn: 224865
2014-12-26 18:45:57 +00:00
Rafael Espindola 1a7ef86add Use llvm-readobj. NFC.
llvm-svn: 224864
2014-12-26 18:22:05 +00:00
Daniel Jasper 1e8eafd6c8 Escape ? to silence GCC warning about trigraphs.
llvm-svn: 224863
2014-12-26 18:21:34 +00:00
Craig Topper c4b12166f2 [X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.
llvm-svn: 224862
2014-12-26 18:20:05 +00:00
Craig Topper d5b39237a1 [X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix to not fail to disassembler CR9-CR15 references.
llvm-svn: 224861
2014-12-26 18:19:44 +00:00
Timur Iskhodzhanov b6fa52f274 Band-aid fix for PR22032: don't emit DWARF debug info if AddressSanitizer is enabled on Windows
llvm-svn: 224860
2014-12-26 17:00:51 +00:00
Rafael Espindola 5d94634c13 No need to run llvm-as. NFC.
llvm-svn: 224859
2014-12-26 16:42:47 +00:00
Evgeniy Stepanov 9e609426a7 [sanitizer] Treat \r, \n, \t as flag separators.
llvm-svn: 224858
2014-12-26 16:09:15 +00:00
Evgeniy Stepanov ef0f244594 [asan] Fix possibly uninitialized coverage flag.
llvm-svn: 224857
2014-12-26 16:07:33 +00:00
Timur Iskhodzhanov a04b33b9de [ASan/Win] Add basic support for MemoryRangeIsAvailable and DumpProcessMap to make it easier to debug startup shadow mapping failures
llvm-svn: 224856
2014-12-26 14:28:32 +00:00
Evgeniy Stepanov 103084691d [asan] Bump coverage size limit on 32-bit platforms.
This increases the limit from 4M locations to 16M, reserving
64Mb virtual memory. Chrome has >5M unique coverage locations with coverage=3.

llvm-svn: 224855
2014-12-26 13:54:11 +00:00
Evgeniy Stepanov da02effd9e [asan] Extend coverage test.
llvm-svn: 224854
2014-12-26 12:51:31 +00:00
Evgeniy Stepanov 05dc4be0dc [asan] Allow enabling coverage at activation.
This is a re-commit of r224838 + r224839, previously reverted in r224850.
Test failures were likely (still can not reproduce) caused by two lit tests
using the same name for an intermediate build target.

llvm-svn: 224853
2014-12-26 12:32:32 +00:00
Timur Iskhodzhanov b8373bc119 [ASan/Win] Suppress error messaging when Abort() is called
This will prevent ASan bots from hanging / timing out

llvm-svn: 224852
2014-12-26 12:25:54 +00:00
David Majnemer ca7e485c3f Update tests due to r224849
Inferring nuw caused some clang tests to change their output.

llvm-svn: 224851
2014-12-26 10:29:40 +00:00
Evgeniy Stepanov f8c7e25560 Revert r224838, r224839.
Flaky failures on the build bots.

llvm-svn: 224850
2014-12-26 10:19:56 +00:00
David Majnemer b1296ec0fd InstCombine: Infer nuw for multiplies
A multiply cannot unsigned wrap if there are bitwidth, or more, leading
zero bits between the two operands.

llvm-svn: 224849
2014-12-26 09:50:35 +00:00
David Majnemer a55027f68a ValueTracking: Small cleanup in ComputeNumSignBits
Constant contains the isAllOnesValue and isNullValue predicates, not
ConstantInt.

llvm-svn: 224848
2014-12-26 09:20:17 +00:00
David Majnemer 54c2ca2539 InstCombe: Infer nsw for multiplies
We already utilize this logic for reducing overflow intrinsics, it makes
sense to reuse it for normal multiplies as well.

llvm-svn: 224847
2014-12-26 09:10:14 +00:00
Craig Topper ee9eef2fd8 Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4.
llvm-svn: 224846
2014-12-26 06:36:28 +00:00
Craig Topper 2e44492b1d Use MCPhysReg for table of register encodings.
llvm-svn: 224845
2014-12-26 06:36:23 +00:00