Commit Graph

78410 Commits

Author SHA1 Message Date
Daniel Sanders 82df616d8e [mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.
Summary:
The 'R' constraint is actually supposed to be much more complicated than
this and is defined in terms of whether it will cause macro expansion in
the assembler. 'R' is getting less useful due to architecture changes and
ought to be replaced by other constraints. We therefore implement 9-bit
offsets which will work for all subtargets and all instructions.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8440

llvm-svn: 233537
2015-03-30 13:27:25 +00:00
Daniel Jasper 87e848c7dc Revert "[SCEV] Look at backedge dominating conditions."
This leads to terribly slow compile times under MSAN. More discussion
on the commit thread of r233447.

llvm-svn: 233529
2015-03-30 09:30:02 +00:00
Elena Demikhovsky d8fda62247 AVX-512: blank lines, duplicated tests, no functional changes
see comments http://reviews.llvm.org/D6835

llvm-svn: 233528
2015-03-30 09:29:28 +00:00
Elena Demikhovsky 98de9d6360 AVX-512: added intrinsics for VPAND, VPOR and VPXOR
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233525
2015-03-30 08:30:34 +00:00
Craig Topper 5d28b900ac [X86] In getHostCPUFeatures, disable xop, f16c, fma, and fma4 if OS does not support saving ymm state.
llvm-svn: 233518
2015-03-30 06:31:14 +00:00
Craig Topper 3611d9bc01 [X86] Remove FeatureAES for 'corei7' CPU. 'corei7' should match 'nehalem' which doesn't have AES. Having AES and not PCLMUL makes 'corei7' halfway between Nehalem and Westmere.
llvm-svn: 233517
2015-03-30 06:31:11 +00:00
Craig Topper 3c2e758e51 [X86] Use the more specific CPU names like 'nehalem', 'westmere', 'haswell', etc. Split Nehalem and Westmere CPUs.
llvm-svn: 233516
2015-03-30 06:31:09 +00:00
Craig Topper 0668285171 [X86] Move family 6 model 21 to 'pentium-m'. Near as I can tell this is a Dothan based SOC.
llvm-svn: 233515
2015-03-30 06:31:06 +00:00
Craig Topper 4e78a92610 [X86] Family 6 model 29 is a Penryn based processor not a Nehalem based processor.
llvm-svn: 233514
2015-03-30 06:31:03 +00:00
Alexei Starovoitov 36df1ca5f1 [MCJIT] In debug memory dump output, don't truncate 64 bit addresses
Summary: In dumpMemorySections a cast was too short, and in resolveRelocations a format string was too short.

Test Plan:
Enable debug build and run a program which invokes MCJIT::finalizeObject(). Saw valid input as below (highlighted addresses were previously truncated):

```
Parse relocations:
Resolving relocations Section #0	**0x7f4c1337b000**
----- Contents of section socket1 before relocations -----
**0x00007f4c1337b000**: 18 01 00 00 01 01 01 0a 00 00 00 00 04 03 02 01
0x00007f4c1337b010: 7b 1a f8 ff 00 00 00 00 18 11 00 00 05 00 00 00

```

Reviewers: lhames

Reviewed By: lhames

Subscribers: llvm-commits, ast

Differential Revision: http://reviews.llvm.org/D8681

llvm-svn: 233512
2015-03-30 05:15:57 +00:00
Lang Hames 633fe146e9 [MCJIT][Orc] Refactor RTDyldMemoryManager, weave RuntimeDyld::SymbolInfo through
MCJIT.

This patch decouples the two responsibilities of the RTDyldMemoryManager class,
memory management and symbol resolution, into two new classes:
RuntimeDyld::MemoryManager and RuntimeDyld::SymbolResolver.

The symbol resolution interface is modified slightly, from:

  uint64_t getSymbolAddress(const std::string &Name);

to:

  RuntimeDyld::SymbolInfo findSymbol(const std::string &Name);

The latter passes symbol flags along with symbol addresses, allowing RuntimeDyld
and others to reason about non-strong/non-exported symbols.


The memory management interface removes the following method:

  void notifyObjectLoaded(ExecutionEngine *EE,
                          const object::ObjectFile &) {}

as it is not related to memory management. (Note: Backwards compatibility *is*
maintained for this method in MCJIT and OrcMCJITReplacement, see below).


The RTDyldMemoryManager class remains in-tree for backwards compatibility.
It inherits directly from RuntimeDyld::SymbolResolver, and indirectly from
RuntimeDyld::MemoryManager via the new MCJITMemoryManager class, which
just subclasses RuntimeDyld::MemoryManager and reintroduces the
notifyObjectLoaded method for backwards compatibility).

The EngineBuilder class retains the existing method:

  EngineBuilder&
  setMCJITMemoryManager(std::unique_ptr<RTDyldMemoryManager> mcjmm);

and includes two new methods:

  EngineBuilder&
  setMemoryManager(std::unique_ptr<MCJITMemoryManager> MM);

  EngineBuilder&
  setSymbolResolver(std::unique_ptr<RuntimeDyld::SymbolResolver> SR);

Clients should use EITHER:

A single call to setMCJITMemoryManager with an RTDyldMemoryManager.

OR (exclusive)

One call each to each of setMemoryManager and setSymbolResolver.

This patch should be fully compatible with existing uses of RTDyldMemoryManager.
If it is not it should be considered a bug, and the patch either fixed or
reverted.

If clients find the new API to be an improvement the goal will be to deprecate
and eventually remove the RTDyldMemoryManager class in favor of the new classes.

llvm-svn: 233509
2015-03-30 03:37:06 +00:00
Benjamin Kramer 2739571168 Silence sign compare warning. NFC.
llvm-svn: 233502
2015-03-29 20:49:03 +00:00
Benjamin Kramer 9de151ee5d [inline asm] Don't reject duplicated matching constraints
They're harmless and it's easy to generate them from clang, leading to
a crash in LLVM. Found by afl-fuzz.

llvm-svn: 233500
2015-03-29 20:33:07 +00:00
Simon Pilgrim dcbe1213c8 Use SDValue bool check to tidyup some possible vector folding ops. NFC.
llvm-svn: 233498
2015-03-29 19:13:40 +00:00
Simon Pilgrim d15c2805ab Use SDValue bool check to tidyup some possible ReassociateOps. NFC.
llvm-svn: 233495
2015-03-29 16:49:51 +00:00
Elena Demikhovsky 72e3ccc375 AVX-512: Fixed the "commutative" property flag in VPANDN instruction
By Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233489
2015-03-29 09:14:29 +00:00
Craig Topper 7db49fda99 Fix a variable name in MSVC specific part of rr233487.
llvm-svn: 233488
2015-03-29 01:07:57 +00:00
Craig Topper 798a260554 [X86] Implement getHostCPUFeatures for X86.
Plan to use this as part of CPU 'native' support so we can stop picking a different CPU name if CPU doesn't support AVX or AVX2.

llvm-svn: 233487
2015-03-29 01:00:23 +00:00
Akira Hatanaka fb2289cb1b Delete MCInstPrinter::AvailableFeatures.
All the ports have been fixed to read the feature bits from the subtarget passed
to the print methods. Also, delete the call to setAvailableFeatures in the
constructor of NVPTX's instprinter as the instprinter wasn't using the feature
bits anywhere.

llvm-svn: 233486
2015-03-28 21:07:24 +00:00
Akira Hatanaka 16adb81a9e [X86] Read the feature bits from the subtarget that is passed to printInst
instead of from MCInstPrinter::AvailableFeatures.

llvm-svn: 233485
2015-03-28 20:56:05 +00:00
Hal Finkel 6e9110abe9 [PowerPC] Add asm parser support for bitmask forms of rotate-and-mask instructions
The asm syntax for the 32-bit rotate-and-mask instructions can take a 32-bit
bitmask instead of an (mb, me) pair. This syntax is not specified in the Power
ISA manual, but is accepted by GNU as, and is documented in IBM's Assembler
Language Reference. The GNU Multiple Precision Arithmetic Library (gmp)
contains assembly that uses this syntax.

To implement this, I moved the isRunOfOnes utility function from
PPCISelDAGToDAG.cpp to PPCMCTargetDesc.h.

llvm-svn: 233483
2015-03-28 19:42:41 +00:00
Simon Pilgrim 7fdcc30e93 [DAGCombiner] Fixed incorrect test for buildvector of constant integers.
DAGCombiner::ReassociateOps was correctly testing for an constant integer scalar but failed to correctly test for constant integer vectors (it was testing for any constant vector).

llvm-svn: 233482
2015-03-28 18:31:31 +00:00
Hal Finkel cd5553ed39 [ConstantFold] Don't fold ppc_fp128 <-> int bitcasts
PPC_FP128 is really the sum of two consecutive doubles, where the first double
is always stored first in memory, regardless of the target endianness. The
memory layout of i128, however, depends on the target endianness, and so we
can't fold this without target endianness information. As a result, we must not
do this folding in lib/IR/ConstantFold.cpp (it could be done instead in
Analysis/ConstantFolding.cpp, but that's not done now).

Fixes PR23026.

llvm-svn: 233481
2015-03-28 16:44:57 +00:00
Craig Topper b2a097a8a3 Convert feature strings to lowercase even if they have a '+'/'-' in front of them.
llvm-svn: 233475
2015-03-28 04:59:14 +00:00
Akira Hatanaka 5f11781ed5 Partially revert the changes I made in r233473 to keep the code concise.
llvm-svn: 233474
2015-03-28 04:40:43 +00:00
Akira Hatanaka ba511fdd12 clang-format X86ATTInstPrinter.{h,cpp} before I make changes to these files.
llvm-svn: 233473
2015-03-28 04:25:41 +00:00
Akira Hatanaka 725657bad6 [SparcInstPrinter] Use the subtarget that is passed to the print function
instead of the one passed to the constructor.

Unfortunately, I don't have a test case for this change. In order to test my
change, I will have to run the code after line 90 in printSparcAliasInstr. I
couldn't make that happen because printAliasInstr would always handle the
printing of fcmp instructions that the code after line 90 is supposed to handle.

llvm-svn: 233471
2015-03-28 04:03:51 +00:00
Craig Topper 28f550b4df Update comment to match code behavior.
llvm-svn: 233470
2015-03-28 03:24:19 +00:00
Duncan P. N. Exon Smith a8b3a1f374 Verifier: Allow subroutine types to have no type array
Loosen one check from r233446: as long as `DIBuilder` requires a
non-null type for every subprogram, we should allow a null type array.
Also add tests for the rest of `MDSubroutineType`, which were somehow
missing.

llvm-svn: 233468
2015-03-28 02:43:53 +00:00
Ahmed Bougacha a0f35592be [CodeGen] "PromoteInteger" f32 to f64 doesn't make sense.
The original f32->f64 promotion logic was refactored into roughly the
currently shape in r37781. However, starting with r132263, the
legalizer has been split into different kinds, and the previous
"Promote" (which did the right thing) was search-and-replace'd into
"PromoteInteger". The divide gradually deepened, with type legalization
("PromoteInteger") being separated from ops legalization
("Promote", which still works for floating point ops).

Fast-forward to today: there's no in-tree target with legal f64 but
illegal f32 (rather: no tests were harmed in the making of this patch).

With such a target, i.e., if you trick the legalizer into going through
the PromoteInteger path for FP, you get the expected brokenness.
For instance, there's no PromoteIntRes_FADD (the name itself sounds
wrong), so we'll just hit some assert in the PromoteInteger path.

Don't pretend we can promote f32 to f64. Instead, always soften.

llvm-svn: 233464
2015-03-28 01:22:37 +00:00
Akira Hatanaka ee97475b2e [ARM] Enable changing instprinter's behavior based on the per-function
subtarget.

llvm-svn: 233451
2015-03-27 23:41:42 +00:00
Akira Hatanaka cfa1f619e2 clang-format ARMInstPrinter.{h,cpp} before I make changes to these files.
llvm-svn: 233448
2015-03-27 23:24:22 +00:00
Sanjoy Das fe0e0fff92 [SCEV] Look at backedge dominating conditions.
Summary:
This change teaches ScalarEvolution::isLoopBackedgeGuardedByCond to look
at edges within the loop body that dominate the latch.  We don't do an
exhaustive search for all possible edges, but only a quick walk up the
dom tree.

Reviewers: atrick, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8627

llvm-svn: 233447
2015-03-27 23:18:08 +00:00
Duncan P. N. Exon Smith 53855f05d3 Verifier: Check operands of MDType subclasses and MDCompileUnit
Add verify checks for `MDType` subclasses and for `MDCompileUnit`.
These new checks don't yet incorporate everything from `Verify()`, but
at least they sanity check the operands.  Also downcast accessors as
possible.

A lot of these accessors can't be downcast as far as we'd like because
of arrays of typed objects (stored in a generic `MDTuple`) and
`MDString`-based type references.  Eventually I'll port over `DIRef<>`
and `DITypedArray<>` from `DebugInfo.h` to clean those up as well.

Updated bitrotted testcases separately in r233415 and r233443 to reduce
churn on the off-chance this needs to be reverted.

llvm-svn: 233446
2015-03-27 23:05:04 +00:00
Duncan P. N. Exon Smith d9ccfb9e01 DebugInfo: Require non-null in DIBuilder::retainType()
Assert that a non-null value is being passed in.  Note that I fixed the
one offender in clang in r233443.

llvm-svn: 233445
2015-03-27 23:00:49 +00:00
Andrew Kaylor f7118ae810 Fixing a bug with optimized catch-all handlers in WinEHPrepare
llvm-svn: 233439
2015-03-27 22:31:12 +00:00
Sanjay Patel f176566a00 fix typo and 80-col; NFC
llvm-svn: 233427
2015-03-27 21:45:18 +00:00
Rafael Espindola 44d5057e38 Add two small structs for readability in place of std::pair and std::tuple. NFC.
llvm-svn: 233422
2015-03-27 21:34:24 +00:00
David Blaikie 87ca1b6e0c Constrain the type of a parameter now that callers without this constraint have been removed.
llvm-svn: 233419
2015-03-27 20:56:11 +00:00
Akira Hatanaka bceb2a5a1c [AArch64InstPrinter] Use the feature bits of the subtarget passed to the print
method.

This enables the instprinter to print a different system register name based on
the feature bits of the per-function subtarget. 

Differential Revision: http://reviews.llvm.org/D8668 

llvm-svn: 233412
2015-03-27 20:37:20 +00:00
Akira Hatanaka b46d0234a6 [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.

llvm-svn: 233411
2015-03-27 20:36:02 +00:00
Ahmed Bougacha faf8065a99 [CodeGen] Don't attempt a tail-call with a non-forwarded explicit sret.
Tailcalls are only OK with forwarded sret pointers. With explicit sret,
one approximation is to check that the pointer isn't an Instruction, as
in that case it might point into some local memory (alloca). That's not
OK with tailcalls.

Explicit sret counterpart to r233409.
Differential Revison: http://reviews.llvm.org/D8510

llvm-svn: 233410
2015-03-27 20:35:49 +00:00
Ahmed Bougacha e2bd5d36b3 [CodeGen] Don't attempt a tail-call with implicit sret.
Tailcalls are only OK with forwarded sret pointers. With sret demotion,
they're not, as we'd have a pointer into a soon-to-be-dead stack frame.

Differential Revison: http://reviews.llvm.org/D8510

llvm-svn: 233409
2015-03-27 20:28:30 +00:00
David Blaikie e15dcbdf3e Recommit r233116 better: Remove a redundant instcombine involving bitcasts of geps of bitcasts
This just didn't need to be here at all, but the assertion I tried to
add wasn't appropriate either - the circumstance isn't impossible, it's
just not important to deal with it here - the gep-rooted version of this
instcombine will handle this case, we don't need to duplicate it for the
case where the gep happens to be used in a bitcast.

llvm-svn: 233404
2015-03-27 20:13:55 +00:00
Marek Olsak 2a1c9d00b9 R600/SI: Fix VOP2 VI encoding
Broken by "R600/SI: Refactor VOP2 instruction defs".

llvm-svn: 233399
2015-03-27 19:10:06 +00:00
Anna Zaks bf28d3aa33 [asan] Speed up isInterestingAlloca check
We make many redundant calls to isInterestingAlloca in the AddressSanitzier
pass. This is especially inefficient for allocas that have many uses. Let's
cache the results to speed up compilation.

The compile time improvements depend on the input. I did not see much
difference on benchmarks; however, I have a test case where compile time
goes from minutes to under a second.

llvm-svn: 233397
2015-03-27 18:52:01 +00:00
Alexei Starovoitov 13cf2cc405 [bpf] add support for bpf pseudo instruction
Expose bpf pseudo load instruction via intrinsic. It is used by front-ends that
can encode file descriptors directly into IR instead of relying on relocations.

llvm-svn: 233396
2015-03-27 18:51:42 +00:00
Quentin Colombet 2e27df717a [RegisterCoalescer] Refine the terminal rule to still consider the terminal
nodes.
When a node is terminal it is pushed at the end of the list of the copies to
coalesce instead of being completely ignored. In effect, this reduces its
priority over non-terminal nodes.

Because of that, we do not miss the rematerialization opportunities, nor the
copies that can be merged with more complex, than the terminal rule,
interference checks.

Related to PR22768.

llvm-svn: 233395
2015-03-27 18:37:15 +00:00
Duncan P. N. Exon Smith e2c61d9eec LLParser: Require non-null scope for MDLocation and MDLocalVariable
Change `LLParser` to require a non-null `scope:` field for both
`MDLocation` and `MDLocalVariable`.  There's no need to wait for the
verifier for this check.  This also allows their `::getImpl()` methods
to assert that the incoming scope is non-null.

llvm-svn: 233394
2015-03-27 17:56:39 +00:00
Yaron Keren 75e0c4b060 Remove superfluous .str() and replace std::string concatenation with Twine.
llvm-svn: 233392
2015-03-27 17:51:30 +00:00
Duncan P. N. Exon Smith 3d2afaa29e Verifier: Check fields of MDVariable subclasses
Check fields from `MDLocalVariable` and `MDGlobalVariable` and change
the accessors to downcast to the right types.  `getType()` still returns
`Metadata*` since it could be an `MDString`-based reference.

Since local variables require non-null scopes, I also updated `LLParser`
to require a `scope:` field.

A number of testcases had grown bitrot and started failing with this
patch; I committed them separately in r233349.  If I just broke your
out-of-tree testcases, you're probably hitting similar problems (so have
a look there).

llvm-svn: 233389
2015-03-27 17:29:58 +00:00
Vladimir Sukharev 45523ffd07 [AArch64] Don't store available subtarget features in AArch64SysReg::SysRegMapper
Subtarget features must not be a part of the target machine. So, they are now not being stored in SysRegMapper, but provided each time fromString()/toString() are called

Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8655

llvm-svn: 233386
2015-03-27 17:11:29 +00:00
Rafael Espindola b61beca40c Close unique sections when switching away from them.
It is not possible to switch back to unique secitons, so close them
automatically when switching away.

llvm-svn: 233380
2015-03-27 15:01:40 +00:00
Benjamin Kramer 0a010c2cfb [Support] Remove statically initialized yet dead code.
The last user of this code vanished with r223368, but this function still was
around being executed on every process start, allocating some memory and then
never being used again. No functional change.

Also avoids occasional complaints about the benign leak in this function, like
PR23037.

llvm-svn: 233371
2015-03-27 11:01:53 +00:00
James Molloy 0cbb2a8603 Reapply r233175 and r233183: float2int.
This re-adds float2int to the tree, after fixing PR23038. It turns
out the argument to APSInt() is true-if-unsigned, rather than
true-if-signed :(. Added testcase and explanatory comment.

llvm-svn: 233370
2015-03-27 10:36:57 +00:00
Andrew Trick 43adfb30d5 Complete the MachineScheduler fix made way back in r210390.
"Fix the MachineScheduler's logic for updating ready times for in-order.
 Now the scheduler updates a node's ready time as soon as it is
 scheduled, before releasing dependent nodes."

This fix was only made in one variant of the ScheduleDAGMI driver.
Francois de Ferriere reported the issue in the other bit of code where
it was also needed.
I never got around to coming up with a test case, but it's an
obvious fix that shouldn't be delayed any longer.
I'll try to refactor this code a little better.

I did verify performance on a wide variety of targets and saw no
negative impact with this fix.

llvm-svn: 233366
2015-03-27 06:10:13 +00:00
Sanjoy Das 7041fb1c13 [NFC] Fix typo in comment.
llvm-svn: 233363
2015-03-27 06:01:56 +00:00
Philip Reames a6ebf075b1 Code cleanup [NFC]
The assertion here was more expensive then it needed to be.  We're only inserting allocas in the entry block, so we only need to consider ones in the entry block.

llvm-svn: 233362
2015-03-27 05:53:16 +00:00
Philip Reames 24c6cd52e0 More code cleanup [NFC]
llvm-svn: 233361
2015-03-27 05:47:00 +00:00
Philip Reames 18d0feb7d2 More code cleanup [NFC]
Minor naming, one potentially unsafe cast

llvm-svn: 233359
2015-03-27 05:39:32 +00:00
Philip Reames aa66dfa028 Code simplification and style cleanup
All the removed assertions are either implied locally by the assert at the top of the function or properties of the verifier.

llvm-svn: 233358
2015-03-27 05:34:44 +00:00
Philip Reames e1bf27045d Require a GC strategy be specified for functions which use gc.statepoint
This was discussed a while back and I left it optional for migration.  Since it's been far more than the 'week or two' that was discussed, time to actually make this manditory.  

llvm-svn: 233357
2015-03-27 05:09:33 +00:00
Philip Reames f8f0933b48 Allow explicit spill slots to be specified for a gc.statepoint
This patch adds support for explicitly provided spill slots in the GC arguments of a gc.statepoint.  This is somewhat analogous to gcroot, but leverages the STATEPOINT MI node and StackMap infrastructure.  The motivation for this is:
1) The stack spilling code for gc.statepoints hasn't advanced as fast as I'd like.  One major option is to give up on doing spilling in the backend and do it at the IR level instead.  We'd give up the ability to have gc values in registers, but that's a minor cost in practice.  We are not neccessarily moving in that direction, but having the ability to prototype such a thing cheaply is interesting.
2) I want to port the gcroot lowering to use the statepoint infastructure.  Given the metadata printers for gcroot expect a fixed set of stack roots, it's easiest to just reuse the explicit stack slots and pass them directly to the underlying statepoint.  

I'm holding off on the documentation for the new feature until I'm reasonable sure this is going to stick around.

llvm-svn: 233356
2015-03-27 04:52:48 +00:00
David Majnemer b919dd693f WinEH: Create a parent frame alloca for HandlerType xdata tables
We don't have any logic to emit those tables yet, so the SDAG lowering
of this intrinsic is just a stub.  We can see the intrinsic in the
prepared IR, though.

llvm-svn: 233354
2015-03-27 04:17:07 +00:00
Karthik Bhat 0f8c908934 Refactor Code inside LoopVectorizer's function isInductionVariable.
This patch exposes LoopVectorizer's isInductionVariable function as common
a functionality.
http://reviews.llvm.org/D8608

llvm-svn: 233352
2015-03-27 03:44:15 +00:00
Andrew Trick e97ff5a2ad Fix a bug in SelectionDAG scheduling backtracking code: PR22304.
It can happen (by line CurSU->isPending = true; // This SU is not in
AvailableQueue right now.) that a SUnit is mark as available but is
not in the AvailableQueue. For SUnit being selected for scheduling
both conditions must be met.

This patch mainly defensively protects from invalid removing a node
from a queue. Sometimes nodes are marked isAvailable but are not in
the queue because they have been defered due to some hazard.

Patch by Pawel Bylica!

llvm-svn: 233351
2015-03-27 03:44:13 +00:00
Nick Lewycky ffb0864b44 Revert r233175 and r233183 with it. This pulls float2int back out of the tree, due to PR23038.
llvm-svn: 233350
2015-03-27 02:00:11 +00:00
Ahmed Bougacha 821880a7a1 [AsmPrinter] Don't assert on GOT equivalent non-constant users.
We used to dyn_cast<Constant> in the recursive call, but cast<> in the
initial one, and there can be non-Constant initial users.

llvm-svn: 233346
2015-03-27 01:40:54 +00:00
Duncan P. N. Exon Smith 3cd2cabf50 DIBuilder: Change a few helpers to return downcasted MDNodes
Change `getNonCompileUnitScope()` to return `MDScope` and
`getConstantAsMetadata()` to return `ConstantAsMetadata`.  This will
make it easier to start requiring more type safety in the debug info
hierarchy.

llvm-svn: 233340
2015-03-27 00:34:10 +00:00
Duncan P. N. Exon Smith 6d267f0c3e AsmWriter: Cleanup debug info fields with MDFieldPrinter, NFC
Move all the `MDNode` field helper methods into a new class,
`MDFieldPrinter`, and add helpers for integers, bools, and `DW_*`
symbolic constants.  This reduces a ton of code duplication, and makes
it more mechanical to update `AsmWriter` to print broken code in the
context of stricter accessors (like in r233322).

llvm-svn: 233337
2015-03-27 00:17:42 +00:00
Ahmed Bougacha 2a20e27057 Deduplicate a bunch of setOpActions into an MVT range-for. NFC.
llvm-svn: 233330
2015-03-26 23:21:03 +00:00
Ahmed Bougacha e85a2d34c6 [CodeGen] Report error rather than crash when unable to makeLibCall.
Also, make the assumption explicit in the header.

llvm-svn: 233329
2015-03-26 22:46:58 +00:00
Ahmed Bougacha 2721f62d50 [CodeGen] Don't pretend we can expand f16 libcalls.
We used to mark a bunch of libm nodes as Expand for f16.  There are no
libcalls we can use for those, so we eventually just hit an unhelpful
llvm_unreachable in ExpandFPLibCall.

Instead, just ignore them altogether.  If nothing else changes, we'll
then get the more descriptive and pleasant "Cannot select" fatal error.

There's an argument to be made for consistency, but f16 is already
special in all the good ways, and as long as there's no f16 support in
the ops expander (this patch), as well as the Soften/Expand float
legalizers (which, when hit, will currently segfault), I think there's
no point in even pretending we can legalize any of this.

This shouldn't affect anything that's not already broken.

llvm-svn: 233328
2015-03-26 22:44:58 +00:00
Derek Schuff b051389f04 Use movw/movt instead of constant pool loads to lower byval parameter copies
Summary:
The ARM backend can use a loop to implement copying byval parameters before
a call. In non-thumb2 mode it uses a constant pool load to materialize the
trip count. For targets that need movt instead (e.g. Native Client), use
the same code as in thumb2 mode to materialize the trip count.

Reviewers: jfb, t.p.northover

Differential Revision: http://reviews.llvm.org/D8442

llvm-svn: 233324
2015-03-26 22:11:00 +00:00
Duncan P. N. Exon Smith 264899823f Verifier: Check accessors of MDLocation
Check accessors of `MDLocation`, and change them to `cast<>` down to the
right types.  Also add type-safe factory functions.

All the callers that handle broken code need to use the new versions of
the accessors (`getRawScope()` instead of `getScope()`) that still
return `Metadata*`.  This is also necessary for things like
`MDNodeKeyImpl<MDLocation>` (in LLVMContextImpl.h) that need to unique
the nodes when their operands might still be forward references of the
wrong type.

In the `Value` hierarchy, consumers that handle broken code use
`getOperand()` directly.  However, debug info nodes have a ton of
operands, and their order (even their existence) isn't stable yet.  It's
safer and more maintainable to add an explicit "raw" accessor on the
class itself.

llvm-svn: 233322
2015-03-26 22:05:04 +00:00
Derek Schuff a3b594c480 Default to armv7 cpu for NaCl when march=arm
Summary:
When the arch is given as "arm" clang uses the default target CPU from
LLVM to determine what the real arch should be (i.e. "arm" becomes
"armv4t" because LLVM's getARMCPUForArch falls back to "arm7tdmi").
Default to "cortex-a8" so that we end up with "armv7" in clang.

the nacl-direct.c test in clang also covers this case.

Differential Revision: http://reviews.llvm.org/D8589

llvm-svn: 233321
2015-03-26 21:58:46 +00:00
Rafael Espindola aeed3cbce0 Fix PR23025.
There is something in link.exe that requires a relocation to use a
global symbol. Not doing so breaks the chrome build on windows.

This patch sets isWeak for that to work. To compensate,
we then need to look past those symbols when not creating relocations.

This patch includes an ELF test that matches GNU as behaviour.

I am still reducing the chrome build issue and will add a test
once that is done.

llvm-svn: 233318
2015-03-26 21:11:00 +00:00
Yaron Keren 39fc5a6fd7 Fix rare case where APInt divide algorithm applied un-needed transformation.
APInt uses Knuth's D algorithm for long division. In rare cases the
implementation applied a transformation that was not needed.

Added unit tests for long division. KnuthDiv() procedure is fully covered.
There is a case in APInt::divide() that I believe is never used (marked with
a comment) as all users of divide() handle trivial cases earlier.

Patch by Pawel Bylica!

  http://reviews.llvm.org/D8448

llvm-svn: 233312
2015-03-26 19:45:19 +00:00
Renato Golin 4c8713969c Adds an option to disable ARM ld/st optim pass
Enabled by default, but it's useful when debugging with llc.

Patch by Ranjeet Singh.

llvm-svn: 233303
2015-03-26 18:38:04 +00:00
Duncan P. N. Exon Smith c947892d10 Reapply "Linker: Drop function pointers for overridden subprograms"
This reverts commit r233254, effectively reapplying r233164 (and its
successors), with an additional testcase for when subprograms match
exactly.  This fixes PR22792 (again).

I'm using the same approach, but I've moved up the call to
`stripReplacedSubprograms()`.  The function pointers need to be dropped
before mapping any metadata from the source module, or else this can
drop the function from new subprograms that have merged (via Metadata
uniquing) with the old ones.  Dropping the pointers first prevents them
from merging.

**** The original commit message follows. ****

Linker: Drop function pointers for overridden subprograms

Instead of dropping subprograms that have been overridden, just set
their function pointers to `nullptr`.  This is a minor adjustment to the
stop-gap fix for PR21910 committed in r224487, and fixes the crasher
from PR22792.

The problem that r224487 put a band-aid on: how do we find the canonical
subprogram for a `Function`?  Since the backend currently relies on
`DebugInfoFinder` (which does a naive in-order traversal of compile
units and picks the first subprogram) for this, r224487 tried dropping
non-canonical subprograms.

Dropping subprograms fails because the backend *also* builds up a map
from subprogram to compile unit (`DwarfDebug::SPMap`) based on the
subprogram lists.  A missing subprogram causes segfaults later when an
inlined reference (such as in this testcase) is created.

Instead, just drop the `Function` pointer to `nullptr`, which nicely
mirrors what happens when an already-inlined `Function` is optimized
out.  We can't really be sure that it's the same definition anyway, as
the testcase demonstrates.

This still isn't completely satisfactory.  Two flaws at least that I can
think of:

  - I still haven't found a straightforward way to make this symmetric
    in the IR.  (Interestingly, the DWARF output is already symmetric,
    and I've tested for that to be sure we don't regress.)
  - Using `DebugInfoFinder` to find the canonical subprogram for a
    function is kind of crazy.  We should just attach metadata to the
    function, like this:

        define weak i32 @foo(i32, i32) !dbg !MDSubprogram(...) {

llvm-svn: 233302
2015-03-26 18:35:30 +00:00
Vladimir Sukharev 4b18c727a2 [ARM] Add v8.1a "Rounding Double Multiply Add/Subtract" extension
Reviewers: t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8503

llvm-svn: 233301
2015-03-26 18:29:02 +00:00
Vladimir Sukharev edc71abedd [AArch64] Rename Pairs to Mappings in AArch64NamedImmMapper
Third element is to be added soon to "struct AArch64NamedImmMapper::Mapping". So its instances are renamed from ...Pairs to ...Mappings

Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8582

llvm-svn: 233300
2015-03-26 17:57:39 +00:00
Vladimir Sukharev 017d10bb76 [AArch64] Move initializations of AArch64NamedImmMapper out of void AArch64Operand::print(...)
class AArch64NamedImmMapper is to become dependent of SubTargetFeatures, while class AArch64Operand don't have access to the latter. 

So, AArch64NamedImmMapper constructor invocations are refactored away from methods of AArch64Operand.

Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8579

llvm-svn: 233297
2015-03-26 17:29:53 +00:00
Sanjoy Das 14598830fe [SCEV] Revert bailout added in r75511.
Summary:
With the introduction of MarkPendingLoopPredicates in r157092, I don't
think the bailout is needed anymore.

Reviewers: atrick, nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8624

llvm-svn: 233296
2015-03-26 17:28:26 +00:00
Sanjay Patel 5b305d2d66 revert inadvertent change
llvm-svn: 233294
2015-03-26 17:19:24 +00:00
Sanjay Patel 4fa4a886d7 comment cleanup; NFC
llvm-svn: 233293
2015-03-26 17:18:17 +00:00
Benjamin Kramer 3d0031e0b8 Remove outdated README-SSE.txt entries.
llvm-svn: 233292
2015-03-26 17:12:16 +00:00
Benjamin Kramer 7fa8c430f7 InstCombine: fold (A << C) == (B << C) --> ((A^B) & (~0U >> C)) == 0
Anding and comparing with zero can be done in a single instruction on
most archs so this is a bit cheaper.

llvm-svn: 233291
2015-03-26 17:12:06 +00:00
Vladimir Sukharev c632cda8b2 [AArch64, ARM] Add v8.1a architecture and generic cpu
New architecture and cpu added, following http://community.arm.com/groups/processors/blog/2014/12/02/the-armv8-a-architecture-and-its-ongoing-development

Reviewers: t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8505

llvm-svn: 233290
2015-03-26 17:05:54 +00:00
Sanjay Patel cdf1e2e363 Use SDValue bool checks; NFC intended
llvm-svn: 233289
2015-03-26 16:55:43 +00:00
Sanjay Patel d95dd9e5fb fix indent; NFC
llvm-svn: 233288
2015-03-26 16:55:17 +00:00
Jingyue Wu 177a81578f [SLSR] handle candidate form &B[i * S]
Summary:
This patch enhances SLSR to handle another candidate form &B[i * S]. If
we found two candidates

S1: X = &B[i * S]
S2: Y = &B[i' * S]

and S1 dominates S2, we can replace S2 with

Y = &X[(i' - i) * S]

Test Plan:
slsr-gep.ll
X86/no-slsr.ll: verify that we do not run SLSR on GEPs that already fit into
an addressing mode

Reviewers: eliben, atrick, meheff, hfinkel

Reviewed By: hfinkel

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D7459

llvm-svn: 233286
2015-03-26 16:49:24 +00:00
Aaron Ballman 50af8d4670 Sometimes report_fatal_error is called when there is not a handler function used to fail gracefully. In that case, RunInterruptHandlers is called, which attempts to enter a critical section object. Ensure that the critical section is properly initialized so that this code functions properly, and tools like clang-tidy do not crash in Debug builds.
llvm-svn: 233282
2015-03-26 16:24:38 +00:00
Toma Tabacu 92dbbf1700 [mips] Move the setATReg definition inside the MipsAssemblerOptions class. NFC.
Summary: This groups all of the MipsAssemblerOptions functionality together, making it more reader-friendly.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8445

llvm-svn: 233271
2015-03-26 13:08:55 +00:00
Andrea Di Biagio 8f7feec5fd [X86][FastIsel] Teach how to select vector load instructions.
This patch teaches fast-isel how to select 128-bit vector load instructions.
Added test CodeGen/X86/fast-isel-vecload.ll

Differential Revision: http://reviews.llvm.org/D8605

llvm-svn: 233270
2015-03-26 11:29:02 +00:00
Duncan P. N. Exon Smith 7124230682 Revert "Linker: Drop function pointers for overridden subprograms"
This reverts commit r233164 and its testcase follow-ups in r233165,
r233207, r233214, and r233221.  It apparently unleashed an LTO bootstrap
failure, at least on Darwin:

http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build/3376/

I'm reproducing now.

llvm-svn: 233254
2015-03-26 05:27:45 +00:00
Quentin Colombet 2c6e0597c6 [RegisterCoalescer] Add a rule to consider more profitable copies first when
those are in the same basic block.
The previous approach was the topological order of the basic block.

By default this rule is disabled.

Related to PR22768.

llvm-svn: 233241
2015-03-26 01:01:48 +00:00
Eric Christopher ed1042b97c Add computeFSAdditions to the function based subtarget creation
for PPC due to some unfortunate default setting via TargetMachine
creation. I've added a FIXME on how this can be unraveled in the
backend and a test to make sure we successfully legalize 64-bit things
if we say we're 64-bits.

llvm-svn: 233239
2015-03-26 00:50:23 +00:00
Nico Weber cf07c65be3 Fix typo in comment.
llvm-svn: 233226
2015-03-25 22:34:16 +00:00
Sanjoy Das e561fee2a4 [ValueTracking] Fix PR23011.
Summary:
`ComputeNumSignBits` returns incorrect results for `srem` instructions.
This change fixes the issue and adds a test case.

Reviewers: nadav, nicholas, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8600

llvm-svn: 233225
2015-03-25 22:33:53 +00:00
Simon Pilgrim 09f3ff9a0a [DAGCombiner] Add support for TRUNCATE + FP_EXTEND vector constant folding
This patch adds supports for the vector constant folding of TRUNCATE and FP_EXTEND instructions and tidies up the SINT_TO_FP and UINT_TO_FP instructions to match.

It also moves the vector constant folding for the FNEG and FABS instructions to use the DAG.getNode() functionality like the other unary instructions.

Differential Revision: http://reviews.llvm.org/D8593

llvm-svn: 233224
2015-03-25 22:30:31 +00:00
Andrew Kaylor 51fcf0fc5f Fix remaining MSVC warning
llvm-svn: 233220
2015-03-25 21:33:24 +00:00
Matthias Braun 5d27ef6449 RegisterCoalescer: Fix implicit def handling in register coalescer
If liveranges induced by an IMPLICIT_DEF get completely covered by a
proper liverange the IMPLICIT_DEF instructions and its corresponding
definitions have to be removed from the live ranges. This has to happen
in the subregister live ranges as well (I didn't see this case earlier
because in most programs only some subregisters are covered and the
IMPLCIT_DEF won't get removed).

No testcase, I spent hours trying to create one for one of the public
targets, but ultimately failed because I couldn't manage to properly
control the placement of COPY and IMPLICIT_DEF instructions from an .ll
file.

llvm-svn: 233217
2015-03-25 21:18:24 +00:00
Matthias Braun e962e52a45 MachineVerifier: slightly simplify code that is only called with vregs
llvm-svn: 233216
2015-03-25 21:18:22 +00:00
Krzysztof Parzyszek 6001847e8f Revert r233206
llvm-svn: 233213
2015-03-25 20:21:16 +00:00
Reid Kleckner 7e9546b378 WinEH: Create an unwind help alloca for __CxxFrameHandler3 xdata tables
We don't have any logic to emit those tables yet, so the sdag lowering
of this intrinsic is just a stub. We can see the intrinsic in the
prepared IR, though.

llvm-svn: 233209
2015-03-25 20:10:36 +00:00
Krzysztof Parzyszek 62b41b9458 [Hexagon] Keep the bare getSubtargetImpl for now
llvm-svn: 233206
2015-03-25 19:51:52 +00:00
Kit Barton 535e69de34 Add Hardware Transactional Memory (HTM) Support
This patch adds Hardware Transaction Memory (HTM) support supported by ISA 2.07
(POWER8). The intrinsic support is based on GCC one [1], but currently only the
'PowerPC HTM Low Level Built-in Function' are implemented.

The HTM instructions follows the RC ones and the transaction initiation result
is set on RC0 (with exception of tcheck). Currently approach is to create a
register copy from CR0 to GPR and comapring. Although this is suboptimal, since
the branch could be taken directly by comparing the CR0 value, it generates code
correctly on both test and branch and just return value. A possible future
optimization could be elimitate the MFCR instruction to branch directly.

The HTM usage requires a recently newer kernel with PPC HTM enabled. Tested on
powerpc64 and powerpc64le.

This is send along a clang patch to enabled the builtins and option switch.

[1] https://gcc.gnu.org/onlinedocs/gcc/PowerPC-Hardware-Transactional-Memory-Built-in-Functions.html

Phabricator Review: http://reviews.llvm.org/D8247

llvm-svn: 233204
2015-03-25 19:36:23 +00:00
Rafael Espindola 59f90b215d clang-format bits of code to make another patch readable.
llvm-svn: 233203
2015-03-25 19:24:39 +00:00
Peter Collingbourne b736065f78 DebugInfo: Permit DW_TAG_structure_type, DW_TAG_member, DW_TAG_typedef tags with empty file names.
Some languages, such as Go, have pre-defined structure types (e.g. "string"
is essentially a pointer/length pair) or pre-defined "typedef" types
(e.g. "error" is essentially a typedef for a specific interface type).
Such types do not have associated source location, so a Go frontend would
be correct not to associate a file name with such types.

This change relaxes the DIType verifier to permit unlocated types with
these tags.

Differential Revision: http://reviews.llvm.org/D8588

llvm-svn: 233200
2015-03-25 17:44:49 +00:00
Sanjay Patel 2f8f019daf [X86, AVX] improve insertion into zero element of 256-bit vector
This patch allows AVX blend instructions to handle insertion into the low
element of a 256-bit vector for the appropriate data types.

For f32, instead of:

   vblendps	$1, %xmm1, %xmm0, %xmm1 ## xmm1 = xmm1[0],xmm0[1,2,3]
   vblendps	$15, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]

we get:

   vblendps	$1, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7]

For f64, instead of:

   vmovsd	%xmm1, %xmm0, %xmm1     ## xmm1 = xmm1[0],xmm0[1]
   vblendpd	$3, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0,1],ymm0[2,3]

we get:

   vblendpd	$1, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0],ymm0[1,2,3]

For the hardware-neglected integer data types, I left a TODO comment in the
code and added regression tests for a follow-on patch.

Differential Revision: http://reviews.llvm.org/D8609

llvm-svn: 233199
2015-03-25 17:36:01 +00:00
Benjamin Kramer b4b5150dfc [APInt] Add an isSplat helper and use it in some places.
To complement getSplat. This is more general than the binary
decomposition method as it also handles non-pow2 splat sizes.

llvm-svn: 233195
2015-03-25 16:49:59 +00:00
Benjamin Kramer 327ec24b4d [Hexagon] Pattern match a CTZ loop into a call to countTrailingZeros.
No functional change intended.

llvm-svn: 233192
2015-03-25 15:36:57 +00:00
Benjamin Kramer 860323fd4f [ARM] Rewrite .save/.vsave emission with bit math
Hopefully makes it a bit easier to understand what's going on.
No functional change intended.

llvm-svn: 233191
2015-03-25 15:27:58 +00:00
Rafael Espindola f275ad8af1 Fix fixup evaluation when deciding what to relocate with.
The previous logic was to first try without relocations at all
and failing that stop on the first defined symbol.

That was inefficient and incorrect in the case part of the
expression could be simplified and another part could not
(see included test).

We now stop the evaluation when we get to a variable whose value
can change (i.e. is weak).

llvm-svn: 233187
2015-03-25 13:16:53 +00:00
Andrea Di Biagio 460948c9ab [optnone] Skip pass Float2Int on optnone functions.
Added test Float2Int/float2int-optnone.ll to verify that pass Float2Int
is not run on optnone functions.

llvm-svn: 233183
2015-03-25 12:22:37 +00:00
James Molloy cb75d92458 Reapply r233062: "float2int": Add a new pass to demote from float to int where possible.
Now with a fix for PR23008 and extra regression test.

llvm-svn: 233175
2015-03-25 10:03:42 +00:00
Craig Topper f2071f2672 [X86] Remove GetCpuIDAndInfo, GetCpuIDAndInfoEx and DetectFamilyModel functions from X86 MC layer. They haven't been used since CPU autodetection was removed from X86Subtarget.cpp.
llvm-svn: 233170
2015-03-25 04:16:50 +00:00
Lang Hames 8389b55237 [Orc] Refactor JITCompileCallbackManagerBase and CompileOnDemandLayer to support
target-independent callback management.

This is a prerequisite for adding orc-based lazy-jitting to lli.

llvm-svn: 233166
2015-03-25 02:45:50 +00:00
Duncan P. N. Exon Smith 004ced3b08 Linker: Drop function pointers for overridden subprograms
Instead of dropping subprograms that have been overridden, just set
their function pointers to `nullptr`.  This is a minor adjustment to the
stop-gap fix for PR21910 committed in r224487, and fixes the crasher
from PR22792.

The problem that r224487 put a band-aid on: how do we find the canonical
subprogram for a `Function`?  Since the backend currently relies on
`DebugInfoFinder` (which does a naive in-order traversal of compile
units and picks the first subprogram) for this, r224487 tried dropping
non-canonical subprograms.

Dropping subprograms fails because the backend *also* builds up a map
from subprogram to compile unit (`DwarfDebug::SPMap`) based on the
subprogram lists.  A missing subprogram causes segfaults later when an
inlined reference (such as in this testcase) is created.

Instead, just drop the `Function` pointer to `nullptr`, which nicely
mirrors what happens when an already-inlined `Function` is optimized
out.  We can't really be sure that it's the same definition anyway, as
the testcase demonstrates.

This still isn't completely satisfactory.  Two flaws at least that I can
think of:

  - I still haven't found a straightforward way to make this symmetric
    in the IR.  (Interestingly, the DWARF output is already symmetric,
    and I've tested for that to be sure we don't regress.)
  - Using `DebugInfoFinder` to find the canonical subprogram for a
    function is kind of crazy.  We should just attach metadata to the
    function, like this:

        define weak i32 @foo(i32, i32) !dbg !MDSubprogram(...) {

llvm-svn: 233164
2015-03-25 02:26:32 +00:00
Rafael Espindola 44cc654869 Fix warning on non-assert build.
llvm-svn: 233158
2015-03-25 00:45:41 +00:00
Rafael Espindola dbb4021b64 Produce an error instead of asserting on invalid .sleb128/.uleb128.
llvm-svn: 233155
2015-03-25 00:25:37 +00:00
Paul Robinson 284f0451cf 'optnone' should not disable DAG combiner.
Reverts the code change from r221168 and the relevant test.
It was a mistake to disable the combiner, and based on the ultimate
definition of 'optnone' we shouldn't have considered the test case
as failing in the first place.

llvm-svn: 233153
2015-03-25 00:10:24 +00:00
Philip Reames 4dbd88f3b4 !invariant.load semantics with potentially clobbering calls
A load from an invariant location is assumed to not alias any otherwise potentially aliasing stores. Our implementation only applied this rule to store instructions themselves whereas they it should apply for any memory accessing instruction. This results in both FRE and PRE becoming more effective at eliminating invariant loads.

Note that as a follow on change I will likely move this into AliasAnalysis itself. That's where the TBAA constant flag is handled and the semantics are essentially the same. I'd like to separate the semantic change from the refactoring and thus have extended the hack that's already in MemoryDependenceAnalysis for this change.

Differential Revision: http://reviews.llvm.org/D8591

llvm-svn: 233140
2015-03-24 23:54:54 +00:00
Rafael Espindola c9e7068cdd Don't be over eager in evaluating a subtraction with a weak symbol.
In a subtraction of the form A - B, if B is weak, there is no way to represent
that on ELF since all relocations add the value of a symbol.

llvm-svn: 233139
2015-03-24 23:48:44 +00:00
Reid Kleckner 11470c48d0 X86: Fix frameescape when not using an FP
We can't use TargetFrameLowering::getFrameIndexOffset directly, because
Win64 really wants the offset from the stack pointer at the end of the
prologue. Instead, use X86FrameLowering::getFrameIndexOffsetFromSP(),
which is a pretty close approximiation of that. It fails to handle cases
with interestingly large stack alignments, which is pretty uncommon on
Win64 and is TODO.

llvm-svn: 233137
2015-03-24 23:46:01 +00:00
Andrew Kaylor 5c73e1f85c Disabling warnings for MSVC build to enable /W4 use.
Differential Revision: http://reviews.llvm.org/D8572

llvm-svn: 233133
2015-03-24 23:37:10 +00:00
David Blaikie 156d46eda0 Opaque Pointer Types: GEP API migrations to specify the gep type explicitly
The changes to InstCombine (& SCEV) do seem a bit silly - it doesn't make
anything obviously better to have the caller access the pointers element
type (the thing I'm trying to remove) than the GEP itself, but it's a
helpful migration step. This will allow me to more obviously lock down
GEP (& Load, etc) API usage, then fix all the code that accesses pointer
element types except the places that need to be removed (most of the
InstCombines) anyway - at which point I'll need to just remove all that
code because it won't be meaningful anymore (there will be no pointer
types, so no bitcasts to combine)

SCEV looks like it'll need some restructuring - we'll have to do a bit
more work for GEP canonicalization, since it'll depend on how it's used
if we can even manage to canonicalize it to a non-ugly GEP. I guess we
can do some fun stuff like voting (do 2 out of 3 load from the GEP with
a certain type that gives a pretty GEP? Does every typed use of the GEP
use either a specific type or a generic type (i8*, etc)?)

llvm-svn: 233131
2015-03-24 23:34:31 +00:00
Sanjay Patel e304bea010 optimize the AVX2 (integer) version of vperm2 into a shuffle
...because this is what happens when an instruction
set puts its underwear on after its pants.

This is an extension of r232852, r233100, and 233110:
http://llvm.org/viewvc/llvm-project?view=revision&revision=232852
http://llvm.org/viewvc/llvm-project?view=revision&revision=233100
http://llvm.org/viewvc/llvm-project?view=revision&revision=233110

llvm-svn: 233127
2015-03-24 22:39:29 +00:00
David Blaikie 68d535c45f Opaque Pointer Types: GEP API migrations to specify the gep type explicitly
The changes to InstCombine do seem a bit silly - it doesn't make
anything obviously better to have the caller access the pointers element
type (the thing I'm trying to remove) than the GEP itself, but it's a
helpful migration step. This will allow me to more obviously lock down
GEP (& Load, etc) API usage, then fix all the code that accesses pointer
element types except the places that need to be removed (most of the
InstCombines) anyway - at which point I'll need to just remove all that
code because it won't be meaningful anymore (there will be no pointer
types, so no bitcasts to combine)

llvm-svn: 233126
2015-03-24 22:38:16 +00:00
Philip Reames 2b969d7010 Merge empty landing pads in SimplifyCFG
This patch tries to merge duplicate landing pads when they branch to a common shared target.

Given IR that looks like this:
lpad1:
  %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
         cleanup
  br label %shared_resume
lpad2:
  %exn2 = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
          cleanup
  br label %shared_resume
shared_resume:
  call void @fn()
  ret void
}

We can rewrite the users of both landing pad blocks to use one of them. This will generally allow the shared_resume block to be merged with the common landing pad as well.

Without this change, tail duplication would likely kick in - creating N (2 in this case) copies of the shared_resume basic block.

Differential Revision: http://reviews.llvm.org/D8297

llvm-svn: 233125
2015-03-24 22:28:45 +00:00
David Blaikie 1a6bb9fcf6 Revert "Remove an InstCombine that seems to have become redundant."
Assertion fires in compiler-rt. Guess it does fire..

This reverts commit r233116.

llvm-svn: 233121
2015-03-24 21:50:35 +00:00
Rafael Espindola 8b4817b5f7 Reset the CFA offset at the start of every FDE.
This fixes PR21515.

llvm-svn: 233120
2015-03-24 21:47:31 +00:00
Peter Collingbourne e8813e6c2c AArch64: use a different means to determine whether to byte swap relocations.
This code depended on a bug in the FindAssociatedSection function that would
cause it to return the wrong result for certain absolute expressions. Instead,
use EvaluateAsRelocatable.

llvm-svn: 233119
2015-03-24 21:47:03 +00:00
David Blaikie e37e10dc57 Remove an InstCombine that seems to have become redundant.
Assert that this doesn't fire - I'll remove all of this later, but just
leaving it in for a while in case this is firing & we just don't have
test coverage.

llvm-svn: 233116
2015-03-24 21:31:31 +00:00
Sanjay Patel 43a87fdc79 [X86, AVX] instcombine vperm2 intrinsics with zero inputs into shuffles
This is the IR optimizer follow-on patch for D8563: the x86 backend patch
that converts this kind of shuffle back into a vperm2.

This is also a continuation of the transform that started in D8486. 
In that patch, Andrea suggested that we could convert vperm2 intrinsics that
use zero masks into a single shuffle. 

This is an implementation of that suggestion.

Differential Revision: http://reviews.llvm.org/D8567

llvm-svn: 233110
2015-03-24 20:36:42 +00:00
Hans Wennborg e42c64551a Revert r233062 ""float2int": Add a new pass to demote from float to int where possible."
This caused PR23008, compiles failing with: "Use still stuck around after Def is
destroyed: %.sroa.speculated"

Also reverting follow-up r233064.

llvm-svn: 233105
2015-03-24 20:07:08 +00:00
Sanjoy Das 45dc94a856 [IRCE] Fix how IRCE checks for no-sign-overflow.
IRCE requires the induction variables it handles to not sign-overflow.
The current scheme of checking if sext({X,+,S}) == {sext(X),+,sext(S)}
fails when SCEV simplifies sext(X) too.  After this change we //also//
check no-signed-wrap by looking at the flags set on the SCEVAddRecExpr.

llvm-svn: 233102
2015-03-24 19:29:22 +00:00
Sanjoy Das 337d46b36f [IRCE] Fix a regression introduced in r232444.
IRCE should not try to eliminate range checks that check an induction
variable against a loop-varying length.

llvm-svn: 233101
2015-03-24 19:29:18 +00:00
Sanjay Patel 99d246d7d7 [X86, AVX] recognize shufflevector with zero input as a vperm2 (PR22984)
vperm2x128 instructions have the special ability (aka free hardware capability)
to shuffle zero values into a vector.

This patch recognizes that type of shuffle and generates the appropriate
control byte.

https://llvm.org/bugs/show_bug.cgi?id=22984

Differential Revision: http://reviews.llvm.org/D8563

llvm-svn: 233100
2015-03-24 19:19:07 +00:00
Duncan P. N. Exon Smith fc25da101c Verifier: Start recursing into !dbg attachments
The main verifier already recurses through the other entry points, so we
might as well descend here too.

This temporarily duplicates some work already done in
`verifyDebugInfo()`, but eventually I'll be removing the other side.

llvm-svn: 233095
2015-03-24 17:32:19 +00:00
Duncan P. N. Exon Smith f238c78c4c Verifier: !llvm.dbg.cu must point at compile units
Duplicate this check from `verifyDebugInfo()`.

llvm-svn: 233094
2015-03-24 17:18:03 +00:00
David Blaikie 19ef0d3b97 Refactor: Simplify boolean expressions in lib/Analysis
Simplify boolean expressions using `true` and `false` with `clang-tidy`

Patch by Richard Thomson.

Reviewed By: nlewycky

Differential Revision: http://reviews.llvm.org/D8528

llvm-svn: 233091
2015-03-24 16:33:19 +00:00
David Blaikie 186d2cbd1d Refactor: Simplify boolean expressions in AArch64 target
Simplify boolean expressions using `true` and `false` with `clang-tidy`

Patch by Richard Thomson.

Reviewed By: rengolin

Differential Revision: http://reviews.llvm.org/D8525

llvm-svn: 233089
2015-03-24 16:24:01 +00:00
Daniel Sanders c676f2a8bb [mips] Support 16-bit offsets for 'm' inline assembly memory constraint.
Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8435

llvm-svn: 233086
2015-03-24 15:19:14 +00:00
Marek Olsak aab1a8daee R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI
This is a candidate for stable.

llvm-svn: 233080
2015-03-24 13:40:38 +00:00
Marek Olsak 949f5dab95 R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset
llvm-svn: 233079
2015-03-24 13:40:34 +00:00
Marek Olsak 9b72868d17 R600/SI: Custom-select 32-bit S_BFE from bitwise opcodes
llvm-svn: 233078
2015-03-24 13:40:27 +00:00
Marek Olsak 63a7b084eb R600/SI: Improve BFM support
llvm-svn: 233077
2015-03-24 13:40:21 +00:00
Marek Olsak 7d77728c97 R600/SI: Use V_FRACT_F64 for faster 64-bit floor on SI
Other f64 opcodes not supported on SI can be lowered in a similar way.

v2: use complex VOP3 patterns
llvm-svn: 233076
2015-03-24 13:40:15 +00:00