Commit Graph

426364 Commits

Author SHA1 Message Date
Nikolas Klauser 42f8f55798 [libc++] Simplify type_traits and use more builtins
Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D127226
2022-06-10 22:41:40 +02:00
Eli Friedman 0ff51d5dde Fix interaction of CFI instructions with MachineOutliner.
1. When checking if a candidate contains a CFI instruction, actually
iterate over all of the instructions, instead of stopping halfway
through.
2. Make sure copied CFI directives refer to the correct instruction.

Fixes https://github.com/llvm/llvm-project/issues/55842

Differential Revision: https://reviews.llvm.org/D126930
2022-06-10 13:37:49 -07:00
Argyrios Kyrtzidis fbaa8b9ae5 [Lex] Fix `fixits` for typo-corrections of preprocessing directives within skipped blocks
The `EndLoc` parameter was always unset so no fixit was emitted. But it is also unnecessary for determining the range so we can remove it.

Differential Revision: https://reviews.llvm.org/D127251
2022-06-10 13:32:19 -07:00
Philip Reames 536095a27c [RISCV] Refine costs for i1 reductions
Our actual lowering for i1 reductions uses ctpop combined with possibly a vector negate and possibly a logic op afterwards. I believe ctpop to be low cost on all reasonable hardware.

The default costing implementation here was returning quite inconsistent costs. and/or were returning very high costs (because we seem to think moving into scalar registers is very expensive?) and others were returning lower but still too high (because of the assumed tree reduce strategy). While we should probably improve the generic costing strategy for i1 vectors, let's start by fixing the immediate problem.

Differential Revision: https://reviews.llvm.org/D127511
2022-06-10 13:21:52 -07:00
Philip Reames f7bb691d61 [RISCV] Implement isElementTypeLegalForScalableVector TTI hook
This brings us into alignment with AArch64, and in the process fixes a compiler crash bug in uniform store handling in the vectorizer.

Before the recent invalid cost bailout work, this would have also avoided crashes on invalid costs in some cases. I honestly think the vectorizer should gracefully bailout on uniform stores it can't use a scatter for, but it doesn't, so lets take the path of least resistance here. It's also possible that there are other vectorizer bugs AArch64 isn't seeing because of this hook; we don't want to be finding them either.

Differential Revision: https://reviews.llvm.org/D127514
2022-06-10 13:20:58 -07:00
Paul Robinson 0fe88f9679 [PS4/PS5] Don't inherit base class alignment 2022-06-10 13:15:17 -07:00
Philip Reames 679aa92d2e [RISCV] Minor test improvements for scalable scatter/gather tests added in 275b2e524 2022-06-10 13:13:49 -07:00
Tue Ly 2a746ebf1a [libc][Obvious] Change all __builtin_clz* calls to clz in builtin_wrappers.h. 2022-06-10 16:03:10 -04:00
Craig Topper 08ea27bf13 [RISCV] Don't require loop simplify form in RISCVGatherScatterLowering.
We need a preheader and a single latch, but we don't need a dedicated
exit.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D127513
2022-06-10 13:00:20 -07:00
Craig Topper a639e1fceb [RISCV] Add test case showing failure to convert gather/scatter to strided load/store. NFC
Our optimization pass checks for loop simplify form, before doing
the transform. The loops here aren't in loop simplify form because
the exit block has two predecessors.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D127451
2022-06-10 13:00:20 -07:00
Philip Reames 275b2e5243 [RISCV] Add cost model coverage for scalable scatter/gather 2022-06-10 12:51:26 -07:00
Mitch Phillips 35b1a64589 Add documentation of new sanitizer-specific GV attributes.
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D126922
2022-06-10 12:46:02 -07:00
Mitch Phillips 8db981d463 Add sanitizer-specific GlobalValue attributes.
Plan is the migrate the global variable metadata for sanitizers, that's
currently carried around generally in the 'llvm.asan.globals' section,
onto the global variable itself.

This patch adds the attribute and plumbs it through the LLVM IR and
bitcode formats, but is a no-op other than that so far.

Reviewed By: vitalybuka, kstoimenov

Differential Revision: https://reviews.llvm.org/D126100
2022-06-10 12:28:18 -07:00
John Ericson 0bb317b7bf Revert "[cmake] Don't export `LLVM_TOOLS_INSTALL_DIR` anymore"
This reverts commit d5daa5c5b0.
2022-06-10 19:26:12 +00:00
Dávid Bolvanský b3b08ad623 [Clang] Added missing doc for minsize attribute
Fixes https://github.com/llvm/llvm-project/issues/53226
2022-06-10 21:18:45 +02:00
Louis Dionne d00e035a42 [libc++] Make sure we install the modulemap file with install-cxx-headers 2022-06-10 15:15:35 -04:00
Sam Estep a9ad689e35 [clang][dataflow] Don't `assert` full LHS coverage in `optional` model
Followup to D127434.

Reviewed By: ymandel, sgatev

Differential Revision: https://reviews.llvm.org/D127502
2022-06-10 19:10:20 +00:00
Sunho Kim f8a9536c55 [JITLink][ELF][AArch64] Implement eh frame handling.
Implements eh frame handling by using generic EHFrame passes. The c++ exception handling works correctly with this change.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D127063
2022-06-11 04:06:14 +09:00
Philip Reames eb912411e9 [RISCV] Add cost model coverage for mask reductions requiring legalization 2022-06-10 12:04:48 -07:00
Krzysztof Drewniak a2cdb9791b [mlir][AMDGPU] Set ABI version constant when linking device libs
Currently, linking the device libraries requires setting a constant
that indicates the code object ABI version the compilation is
targeting.

This fixes the MLIR linking process by setting this constant to 400,
which is the value corresponding to the current code object ABI
default, version 4.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D126913
2022-06-10 18:40:52 +00:00
Shraiysh Vaishay f62baddac0 [OpenMP][IRBuilder] Add final clause to task
This patch adds final clause to OpenMP IR Builder.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D126626
2022-06-11 00:02:18 +05:30
Nikolas Klauser 13558334f3 [libc++] Remove uses of __two in type_traits
Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D127483
2022-06-10 19:56:59 +02:00
Mariusz Borsa a4bf361454 Revert "[Sanitizers] Cleanup handling of stat64/statfs64"
This reverts commit 6d890a0fb8.
2022-06-10 10:56:26 -07:00
Jay Foad ff85d61a6e Update *_TMPRING_SIZE.WAVESIZE for GFX11
The encoding of COMPUTE_TMPRING_SIZE.WAVESIZE and
SPI_TMPRING_SIZE.WAVESIZE has changed in GFX11: it is now in units
of 64 dwords instead of 256 dwords, and the field has been widened
from 13 bits to 15 bits.

Depends on D126989

Reviewed By: rampitec, arsenm, #amdgpu

Differential Revision: https://reviews.llvm.org/D127248
2022-06-10 13:24:00 -04:00
Thomas Raoux ed0288f7c4 [mlir][vector] Add patterns for vector distribution
Add pattern to hoist scalar code outside of warp distribute region as
those cannot be distributed and we would want to execute them on all
the lanes.
Add patterns to distribute transfer_write ops. Those operations can be
distributed in different ways and it is control by user.

Differential Revision: https://reviews.llvm.org/D127152
2022-06-10 17:46:51 +00:00
Kai Nacke b5019ffc8e [SystemZ/z/OS] Set DWARF version to 4 for z/OS.
The DWARF version was raised to 5 for all platforms which do not opt
out. Default to DWARF version to 4 for z/OS again.

Reviewed By: abhina.sreeskantharajan, uweigand

Differential Revision: https://reviews.llvm.org/D127498
2022-06-10 13:38:58 -04:00
Joe Nash ea3c9a87d3 [AMDGPU] gfx11 add bits to COMPUTE_PGM_RSRC3
Contributors:
Konstantin Zhuravlyov <kzhuravl_dev@outlook.com>

Patch 21/N for upstreaming of AMDGPU gfx11 architecture

Depends on D127143

Reviewed By: rampitec, #amdgpu, kzhuravl

Differential Revision: https://reviews.llvm.org/D127241
2022-06-10 13:07:14 -04:00
Shivam Gupta a01579ad0a [NFC] Suggest Release mode in clang GettingStarted.html
This fix https://github.com/llvm/llvm-project/issues/23841.
Lots of beginners are not of aware of this option do suggesting it here
would be helpful.
2022-06-10 11:00:05 +05:30
Christopher Di Bella f21187eb2d [clang][tablegen] adds human documentation to `WarningOption`
Building on D126796, this commit adds the infrastructure for being able
to print out descriptions of what each warning does.

Differential Revision: https://reviews.llvm.org/D126832
2022-06-10 17:23:00 +00:00
Joe Nash 78d8fdb88b [AMDGPU] NFC. Comment change to GFX10+ in AsmParser 2022-06-10 12:34:07 -04:00
Joe Nash 9175ab7746 [AMDGPU] gfx11 SRC_POPS_EXISTING_WAVE_ID is removed 2022-06-10 12:32:22 -04:00
Michael Jones 6ce490e5a6 [libc] add buffering to FILE writes
Previously all FILE objects were fully buffered, this patch adds line
buffering and unbuffered output, as well as applying them to stdout and
stderr.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D126829
2022-06-10 09:58:46 -07:00
Benjamin Kramer 6ee5baeb97 [libc][math] Add EXP_MANT_MASK when long double is double or quad 2022-06-10 18:48:31 +02:00
Sanjay Patel e247b0e5c9 [InstCombine] add narrowing transform for low-masked binop with zext operand (2nd try)
The 1st try ( afa192cfb6 ) was reverted because it could
cause an infinite loop with constant expressions.

A test for that and an extra condition to enable the transform
are added now. I also added code comments to better describe
the transform and the existing, related transform.

Original commit message:
https://alive2.llvm.org/ce/z/hRy3rE

As shown in D123408, we can produce this pattern when moving
casts around, and we already have a related fold for a binop
with a constant operand.
2022-06-10 12:42:27 -04:00
Sanjay Patel 4c3139d7b9 [InstCombine] add test for mask op with constant expression; NFC
This is reduced from the post-commit C example in:
afa192cfb6

That was reverted with:
6fedc6a2b4

This will infinite loop unless that transform or the ones
with casts that can "EvaluateInDifferentType" are limited
to ignore constant expressions.
2022-06-10 12:42:27 -04:00
Yusra Syeda 487ace4c73 [SystemZ][z/OS] Add llvm.read_register() intrinsic support for zOS
Differential Revision: https://reviews.llvm.org/D127412
2022-06-10 12:30:07 -04:00
Shao-Ce SUN 117e10304b [RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`
Fix build errors in D126794

```
ld.lld: error: undefined symbol: llvm::MachineInstr::getNumExplicitDefs() const
>>> referenced by RISCVBaseInfo.cpp
>>>               RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a

ld.lld: error: undefined symbol: llvm::MachineInstr::findRegisterDefOperandIdx(llvm::Register, bool, bool, llvm::TargetRegisterInfo const*) const
>>> referenced by RISCVBaseInfo.cpp
>>>               RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
clang-15: error: linker command failed with exit code 1 (use -v to see invocation)
```

Reviewed By: fakepaper56, craig.topper

Differential Revision: https://reviews.llvm.org/D127477
2022-06-11 00:27:53 +08:00
Jay Foad 044b8f4bc8 [AMDGPU] Restore documentation of .amdhsa_shared_vgpr_count
This was accidentally lost in D127402.
2022-06-10 17:06:08 +01:00
Shao-Ce SUN 93116374e7 Revert "[RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`"
This reverts commit e018e493c1.

There are some problems with this commit,
related revision: https://reviews.llvm.org/D127477
2022-06-11 00:03:04 +08:00
Philip Reames d459530804 [RISCV] Fix accidental deletion of test lines in 2247e4d
Apparently, update_analyze_test_checks.sh does *not* warn on conflicting CHECKs, it just silently drops those lines from the generated test.  That is.. less than helpful.
2022-06-10 09:02:41 -07:00
Paul Robinson 3dbb5cb273 [PS5] Use linker scripting to find profiling data, like PS4 2022-06-10 09:00:51 -07:00
Craig Topper e91051184c [RISCV] Mark FSIN and other math functions as Expand for scalable vectors.
This prevents them from being assumed legal by the cost model.

This matches what is done for AArch64 SVE.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D123799
2022-06-10 08:40:07 -07:00
Philip Reames 2247e4de83 [RISCV] Use common prefixes to reduce duplication in cost model tests 2022-06-10 08:36:14 -07:00
Nikita Popov 9c0a878c71 [DCE] Update tests to use opaque pointers (NFC) 2022-06-10 17:31:35 +02:00
Andrzej Warzynski 494cd9b6fc [flang][lowering] Ignore compiler directives
This patch simply replaces a `TODO` with a warning.

This is part of the upstreaming effort from the `fir-dev` branch in [1].

[1] https://github.com/flang-compiler/f18-llvm-project

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D127415
2022-06-10 15:26:49 +00:00
Guillaume Chatelet dc9c2eac98 [NFC][Alignment] Simplify code 2022-06-10 15:25:28 +00:00
Adrian Prantl d36757b511 [LLDB][Docs] Fix formatting of example code-block
Tested by building the docs-lldb-html target and
confirming the code-block renders properly with
the fix.

Patch by Michael Buch!

Differential Revision: https://reviews.llvm.org/D127437
2022-06-10 08:17:08 -07:00
Nikita Popov 04b944e230 [InstSimplify] Convert tests to opaque pointers (NFC)
The only interesting test change is in @PR31262, where the following
fold is now performed, while it previously was not:
https://alive2.llvm.org/ce/z/a5Qmr6

llvm/test/Transforms/InstSimplify/ConstProp/gep.ll has not been
updated, because there is a tradeoff between folding and inrange
preservation there that we may want to discuss.

Updates have been performed using:
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34
2022-06-10 17:16:28 +02:00
Guillaume Chatelet 95083fa3b8 [NFC] Remove deadcode 2022-06-10 15:13:42 +00:00
Philip Reames 2b83467d9e [RISCV] Broaden cost model coverage for fixed vectors w/i1 element type 2022-06-10 08:12:42 -07:00