Commit Graph

64824 Commits

Author SHA1 Message Date
Matt Arsenault 65864e3182 R600/SI: Don't assert on SCC usage
llvm-svn: 193198
2013-10-22 21:11:31 +00:00
Manman Ren 642a0acce2 Debug Info: code clean up.
Remove unnecessary creation of LexicalScope in collectDeadVariables.
The created LexicialScope was only used to get isAbstractScope, which
should be false from the creation:
"new LexicalScope(NULL, DIDescriptor(SP), NULL, false);".

We can also remove a DenseMap that holds the created LexicalScopes.

llvm-svn: 193196
2013-10-22 20:59:19 +00:00
David Blaikie 1e412eaa72 Whitespace
llvm-svn: 193194
2013-10-22 20:34:30 +00:00
David Blaikie 5ebc54d9ea DIEHashing: Provide an assert for unreachable functionality regarding friends.
Since (as of r190716) Clang no longer emits debug info for C++ friend
declarations (and it seems GCC never has/does, which was the motivation
for the Clang change), there's no actual reachable case for implementing
the part of DWARF 4, Section 7.27 part 5 that pertains to friends.

Leave an assert here so that if/when we do have a client producing
friends and using type units, we can fill in the gap and add appropriate
(unit and feature) tests.

llvm-svn: 193193
2013-10-22 20:28:55 +00:00
Bob Wilson 868e6e339f llvm-cov: Use uint32_t for loop variables to be more consistent.
The loop bounds here are uint32_t variables, so it makes sense for the
loop variables to have the same type.

Patch by Yuchen Wu!

llvm-svn: 193192
2013-10-22 20:02:36 +00:00
Bob Wilson 00928bcb72 llvm-cov: fix a typo and rename a variable.
Rename Size to EndPos, which makes more sense because the variable
stores the last location of the blocks.

Patch by Yuchen Wu!

llvm-svn: 193189
2013-10-22 19:54:32 +00:00
Tim Northover 08a8660260 ARM: provide diagnostics on more writeback LDM/STM instructions
The set of circumstances where the writeback register is allowed to be in the
list of registers is rather baroque, but I think this implements them all on
the assembly parsing side.

For disassembly, we still warn about an ARM-mode LDM even if the architecture
revision is < v7 (the required architecture information isn't available). It's
a silly instruction anyway, so hopefully no-one will mind.

rdar://problem/15223374

llvm-svn: 193185
2013-10-22 19:00:39 +00:00
Tom Stellard debb4cf5ea R600/SI: Use llvm_unreachable() for an always false assert
llvm-svn: 193183
2013-10-22 18:42:03 +00:00
Tom Stellard 8be4dd234a R600/SI: Fix warning on non-asserts build
llvm-svn: 193180
2013-10-22 18:31:45 +00:00
Tom Stellard 26a3b67b3b R600: Simplify handling of private address space
The AMDGPUIndirectAddressing pass was previously responsible for
lowering private loads and stores to indirect addressing instructions.
However, this pass was buggy and way too complicated.  The only
advantage it had over the new simplified code was that it saved one
instruction per direct write to private memory.  This optimization
likely has a minimal impact on performance, and we may be able
to duplicate it using some other transformation.

For the private address space, we now:
1. Lower private loads/store to Register(Load|Store) instructions
2. Reserve part of the register file as 'private memory'
3. After regalloc lower the Register(Load|Store) instructions to
   MOV instructions that use indirect addressing.

llvm-svn: 193179
2013-10-22 18:19:10 +00:00
Tom Stellard c460b0dcf1 R600: Remove unused InstrInfo::getMovImmInstr() function
llvm-svn: 193178
2013-10-22 18:19:01 +00:00
David Blaikie d70a055394 DWARF type hashing: pointers to members
Includes a test case/FIXME demonstrating a bug/limitation in pointer to
member hashing. To be honest I'm not sure why we don't just always use
summary hashing for referenced types... but perhaps I'm missing
something.

llvm-svn: 193175
2013-10-22 18:14:41 +00:00
Bob Wilson 68bf30a8b4 Fix llvm-cov counts to be 64-bit integers to avoid overflows.
Line counts in llvm-cov are read in as 64-bit integers but were being truncated
to 32-bit in collectLineCounts(), which caused overflow for large counts.
This patch fixes all counts to be uint64_t.

Patch by Yuchen Wu!

llvm-svn: 193172
2013-10-22 17:43:47 +00:00
Alp Toker acf49f31b6 Fix the -Werror -Wpedantic clang selfhost build
This is a stopgap fix for cast warnings introduced in r192864.

A proper fix should be investigated by the author when possible.

llvm-svn: 193160
2013-10-22 12:30:55 +00:00
Matheus Almeida eb68d9d985 [mips][msa] Direct Object Emission support for conditional branches.
These branches have a 16-bit offset (R_MIPS_PC16).

List of conditional branch instructions:
bnz.{b,h,w,d}
bnz.v
bz.{b,h,w,d}
bz.v

llvm-svn: 193157
2013-10-22 09:43:32 +00:00
Elena Demikhovsky 1f3ed4169c AVX-512: aligned / unaligned load and store for 512-bit integer vectors.
llvm-svn: 193156
2013-10-22 09:19:28 +00:00
Wan Xiaofei 2f8dc08b8c Using FoldingSet in SelectionDAG::getVTList.
VTList has a long life cycle through the module and getVTList is frequently called. In current getVTList, sequential search over a std::vector is used, this is inefficient in big module.
This patch use FoldingSet to implement hashing mechanism when searching.

Reviewer: Nadav Rotem
Test    : Pass unit tests & LNT test suite

llvm-svn: 193150
2013-10-22 08:02:02 +00:00
Anders Waldenborg 47b3bd3fbb llvm-c: Add LLVMPrintTypeToString
Differential Revision: http://llvm-reviews.chandlerc.com/D1963

llvm-svn: 193149
2013-10-22 06:58:34 +00:00
Bob Wilson 3461bedbfd Change llvm-cov output formatting to be more similar to gcov.
- Replaced tabs with proper padding
- print() takes two arguments, which are the GCNO and GCDA filenames
- Files are listed at the top of output, appended by line 0
- Stripped strings of trailing \0s
- Removed last two lines of whitespace in output

Patch by Yuchen Wu!

llvm-svn: 193148
2013-10-22 05:09:41 +00:00
Andrew Trick d5990ad9b6 Clarify SCEV comments.
We handle for(i=n; i>0; i -= s) by canonicalizing within SCEV to for(i=-n; i<0; i += s).

llvm-svn: 193147
2013-10-22 05:09:40 +00:00
Craig Topper f7290f7194 Replace (V)MOVZDI2PDIrr/rm instructions with patterns that select (V)MOVDI2PDIrr/rm.
llvm-svn: 193146
2013-10-22 04:35:20 +00:00
Jim Grosbach dba14ddd4f ARM: Thumb2 copy for GPRPair needs to use thumb instructions.
Use tMOVr instead of plain MOVr.

rdar://15193017

llvm-svn: 193139
2013-10-22 02:29:37 +00:00
Jim Grosbach 8815bef000 ARM: Clean up copyPhysReg() a bit.
No functional change, just cleaning things up for readability.

llvm-svn: 193138
2013-10-22 02:29:35 +00:00
Manman Ren f3850c0807 TBAA: fix PR17620.
We can have a struct type with a single field and the field does not start
with 0. In that case, we should correctly update the offset.

llvm-svn: 193137
2013-10-22 01:40:25 +00:00
Eric Christopher c798d8ad0a Formatting/whitespace.
llvm-svn: 193135
2013-10-22 00:22:39 +00:00
Bob Wilson 2f19d42f6e Move the printing of llvm-cov information out from collectLineCounts().
collectLineCounts() should only organize the output data. This is done in
anticipation of subsequent changes which will pass in GCNO and GCDA filenames
into the print function where it is printed similar to the gcov output.

Patch by Yuchen Wu!

llvm-svn: 193134
2013-10-22 00:09:03 +00:00
Andrew Kaylor 2fb40ce1dc FIXME comment shouldn't have been doxygen style
llvm-svn: 193131
2013-10-21 23:27:02 +00:00
Eric Christopher 874fa0f6c7 Fix spelling, grammar, and match naming convention for test files.
llvm-svn: 193130
2013-10-21 23:14:06 +00:00
David Blaikie fe3233a568 DWARF Type Hashing: Include reference and rvalue reference type in the declarable summary hashing path
More support for 7.25 Part 5.

llvm-svn: 193129
2013-10-21 23:06:19 +00:00
David Blaikie 6cf58c8980 DWARF type hashing: begin implementing Step 5, summary hashing in declarable contexts
There are several other tag types that need similar handling but to
ensure test coverage they'll be coming incrementally.

llvm-svn: 193126
2013-10-21 22:36:50 +00:00
Chad Rosier e012cb3783 [AArch64] Add the constraint to NEON scalar mla/mls instructions.
llvm-svn: 193117
2013-10-21 20:11:47 +00:00
Tom Stellard e1631ddf93 SimplifyCFG: Don't duplicate calls to functions marked noduplicate v2
v2:
  - Use CI->cannotDuplicate()

llvm-svn: 193115
2013-10-21 20:07:30 +00:00
Matt Arsenault bc4242114e Remove unused TargetLowering field.
llvm-svn: 193113
2013-10-21 20:04:01 +00:00
Matt Arsenault b768912db8 Fix CodeGen for different size address space GEPs
llvm-svn: 193111
2013-10-21 20:03:54 +00:00
Matt Arsenault 404c60a7c3 Use more type helper functions
llvm-svn: 193109
2013-10-21 19:43:56 +00:00
Matt Arsenault bbd24901cf Reuse variable
llvm-svn: 193107
2013-10-21 19:24:15 +00:00
Reid Kleckner ad65f10d75 Fix the build in DIE.cpp with MSVC 2010
llvm-svn: 193106
2013-10-21 19:18:31 +00:00
David Blaikie 980d4994b2 DWARF type hashing: Handle multiple (including recursive) references to the same type
This uses a map, keeping the type DIE numbering separate from the DIEs
themselves - alternatively we could do things the way GCC does if we
want to add an integer to the DIE type to record the numbering there.

llvm-svn: 193105
2013-10-21 18:59:40 +00:00
Matt Arsenault fa64659bd8 Teach SimplifyCFG about address spaces
llvm-svn: 193104
2013-10-21 18:55:08 +00:00
Matt Arsenault be18b8a3ca Fix creating bitcasts between address spaces in SCEV.
The test before wasn't successfully testing this
since it was missing the datalayout piece to change
the size of the second address space.

llvm-svn: 193102
2013-10-21 18:41:10 +00:00
Matt Arsenault 4ed49b5301 Remove unused SCEV functions
llvm-svn: 193097
2013-10-21 18:08:09 +00:00
Lang Hames 2783993fca X86 vector element shift-by-immediate instructions take i8 immediates. Make
the instruction defenitions and ISEL reflect this.

Prior to this patch these instructions took an i32i8imm, and the high bits were
dropped during encoding. This led to incorrect behavior for shifts by
immediates higher than 255. This patch fixes that issue by detecting large
immediate shifts and returning constant zero (for logical shifts) or capping
the shift amount at an encodable value (for arithmetic shifts).

Fixes <rdar://problem/14968098>

llvm-svn: 193096
2013-10-21 17:51:24 +00:00
Eric Christopher 691281be2f Fix up some old review feedback.
llvm-svn: 193095
2013-10-21 17:48:51 +00:00
Andrew Kaylor 4fba04942d Improving MCJIT/RuntimeDyld thread safety
llvm-svn: 193094
2013-10-21 17:42:06 +00:00
David Blaikie f244319cac DebugInfo: Put each kind of constant (form, attribute, tag, etc) into its own enum for ease of use.
This allows various variables to be more self-documenting and easier to
debug by being of specific types without overlapping enum values.

Precommit review by Eric Christopher.

llvm-svn: 193091
2013-10-21 17:28:37 +00:00
Rafael Espindola 3d7fc25c7c Optimize more linkonce_odr values during LTO.
When a linkonce_odr value that is on the dso list is not unnamed_addr
we can still look to see if anything is actually using its address. If
not, it is safe to hide it.

This patch implements that by moving GlobalStatus to Transforms/Utils
and using it in Internalize.

llvm-svn: 193090
2013-10-21 17:14:55 +00:00
David Blaikie 63bb3e1182 DebugInfo: Hash DW_FORM_GNU_str_index as a string.
Found while adding type safety to the various DWARF enumerations (form,
attribute, tag, etc) that caused Clang to warn on an incompletely
covered switch. Converting the comment to a default/unreachable
uncovered this case of an unsupported form encoding. Seems we were
skipping fission strings entirely.

llvm-svn: 193089
2013-10-21 16:37:22 +00:00
Elena Demikhovsky 665c90e184 AVX-512: MUL operation lowering for v8i64
llvm-svn: 193083
2013-10-21 13:27:34 +00:00
Matheus Almeida fe0bf9f618 [mips][msa] Direct Object Emission support for LD/ST instructions.
llvm-svn: 193082
2013-10-21 13:07:13 +00:00
Matheus Almeida 8ddad15177 [mips][msa] Direct Object Emission support for LDI instructions.
llvm-svn: 193081
2013-10-21 12:56:20 +00:00
Matheus Almeida 83d797de4a [mips][msa] Direct Object Emission support for MOVE.v.
llvm-svn: 193080
2013-10-21 12:43:54 +00:00
Matheus Almeida a591fdc63c [mips][msa] Direct Object Emission support for CTCMSA and CFCMSA.
These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon 
as GAS starts accepting them by name as that would make the assembly easier to read.

llvm-svn: 193078
2013-10-21 12:26:50 +00:00
Matheus Almeida 5798c6f3bb [mips][msa] Direct Object Emission of SPLAT instruction.
llvm-svn: 193077
2013-10-21 12:07:26 +00:00
Matheus Almeida 70fbf77546 [mips][msa] Fix definition of SLD instruction.
The second parameter of the SLD intrinsic is the number of columns (GPR) to 
slide left the source array.

llvm-svn: 193076
2013-10-21 11:47:56 +00:00
Michael Gottesman 63c63ac21e Fix the predecessor removal logic in r193045.
Additionally some small comment/stylistic fixes are included as well.

llvm-svn: 193068
2013-10-21 05:20:11 +00:00
Bill Wendling 90dd90afcb Don't eliminate a partially redundant load if it's in a landing pad.
A landing pad can be jumped to only by the unwind edge of an invoke
instruction. If we eliminate a partially redundant load in a landing pad, it
will create a basic block that violates this constraint. It then leads to other
problems down the line if it tries to merge that basic block with the landing
pad. Avoid this by not eliminating the load in a landing pad.

PR17621

llvm-svn: 193064
2013-10-21 04:09:17 +00:00
Michael Gottesman c024f3258a Teach simplify-cfg how to correctly create covered lookup tables for switches on iN with N >= 3.
One optimization simplify-cfg performs is the converting of switches to
lookup tables if the switch has > 4 cases. This is done by:

1. Finding the max/min case value and calculating the switch case range.
2. Create a lookup table basic block.
3. Perform a check in the switch's BB to see if the input value is in
the switch's case range. If the input value satisfies said predicate
branch to the lookup table BB, otherwise branch to the switch's default
destination BB using the default value as the result.

The conditional check consists of subtracting the min case value of the
table from any input iN value and then ensuring that said value is
unsigned less than the size of the lookup table represented as an iN
value.

If the lookup table is a covered lookup table, the size of the table will be N
which is 0 as an iN value. Thus the comparison will be an `icmp ult` of an iN
value against 0 which is always false yielding the incorrect result.

This patch fixes this problem by recognizing if we have a covered lookup table
and if we do, unconditionally jumps to the lookup table BB since the covering
property of the lookup table implies no input values could not be handled by
said BB.

rdar://15268442

llvm-svn: 193045
2013-10-20 07:04:37 +00:00
Peter Collingbourne e9f45e25f9 Emit prefix data after debug and EH directives.
This ensures that the prefix data is treated as part of the function for
the purpose of debug info.  This provides a better debugging experience,
among other things by allowing a debug info client to correctly look up
a function in debug info given a function pointer.

llvm-svn: 193042
2013-10-20 02:16:21 +00:00
Peter Collingbourne 588009e484 Emit DWARF line entries for all data in the instruction stream.
r182712 attempted to do this, but it failed to handle data emitted via
EmitBytes.

llvm-svn: 193041
2013-10-20 02:16:18 +00:00
Benjamin Kramer 6ddca57327 Remove unused variable.
llvm-svn: 193038
2013-10-19 16:32:15 +00:00
Bill Wendling 4fea22c63b Perform an intelligent splice of the predecessor with the single successor.
If the predecessor's being spliced into a landing pad, then we need the PHIs to
come first and the rest of the predecessor's code to come *after* the landing
pad instruction.

llvm-svn: 193035
2013-10-19 11:27:12 +00:00
Yaron Keren c98028896d Avoid duplicate search by reusing the iterator.
llvm-svn: 193034
2013-10-19 09:04:26 +00:00
Yaron Keren fb95582bf1 Added comments from Andrew Kaylor.
llvm-svn: 193033
2013-10-19 09:03:20 +00:00
Eric Christopher c2697f8390 Reformat.
llvm-svn: 193024
2013-10-19 01:04:47 +00:00
Eric Christopher 8dba0d5ae9 Fix up a few minor performance problems spotted in code review.
llvm-svn: 193023
2013-10-19 01:04:42 +00:00
Andrew Trick 768b917dc8 SCEV should use NSW to get trip count for positive nonunit stride loops.
SCEV currently fails to compute loop counts for nonunit stride
loops. This comes up frequently. It prevents loop optimization and
forces vectorization to insert extra loop checks.

For example:
void foo(int n, int *x) {
 for (int i = 0; i < n; i += 3) {
   x[i] = i;
   x[i+1] = i+1;
   x[i+2] = i+2;
 }
}

We need to properly handle the case in which limit > INT_MAX-stride. In
the above case: n > INT_MAX-3. In this case the loop counter will step
beyond the limit and overflow at the same time. However, knowing that
signed integer overlow in undefined, we can assume the loop test
behavior is arbitrary after overflow. This obeys both C undefined
behavior rules, and the more strict LLVM poison value rules.

I'm finally fixing this in response to Hal Finkel's persistence.
The most probable reason that we never optimized this before is that
we were being careful to handle case where the developer expected a
side-effect free infinite loop relying on overflow:

for (int i = 0; i < n; i += s) {
  ++j;
}
return j;

If INT_MAX+1 is a multiple of s and n > INT_MAX-s, then we might
expect an infinite loop. However there are plenty of ways to achieve
this effect without relying on undefined behavior of signed overflow.

llvm-svn: 193015
2013-10-18 23:43:53 +00:00
Nadav Rotem 7f27e0b0ce Mark some command line flags as hidden
llvm-svn: 193013
2013-10-18 23:38:13 +00:00
Michael J. Spencer e71f0475df Can we move to C++11 already?
llvm-svn: 193007
2013-10-18 23:07:01 +00:00
Michael J. Spencer c064a9abff [Support][YAML] Add support for accessing tags and tag handle substitution.
llvm-svn: 193004
2013-10-18 22:38:04 +00:00
Manman Ren 7cc6270262 Debug Info: add a newly-created DIE to a parent in the same function.
With this commit, all DIEs created in CompileUnit will be added to parents
inside the same function. Also make getOrCreateTemplateType|Value functions
private.

No functionality change.

llvm-svn: 193002
2013-10-18 21:14:19 +00:00
Manman Ren 8040bb58d3 Debug Info: simplify code a bit.
llvm-svn: 193001
2013-10-18 20:52:22 +00:00
Hans Wennborg ce69d77cec MC asm parser: allow ?'s in symbol names, and handle @'s in names in MS asm
This is another (final?) stab at making us able to parse our own asm output
on Windows.

Symbols on Windows often contain @'s and ?'s in their names. Our asm parser
didn't like this. ?'s were not allowed, and @'s were intepreted as trying to
reference PLT/GOT/etc.

We can't just add quotes around the bad names, since e.g. for MinGW, we use gas
to assemble, and it doesn't like quotes in some places (notably in .def
directives).

This commit makes us allow ?'s in symbol names, and @'s in symbol names for MS
assembly.

Differential Revision: http://llvm-reviews.chandlerc.com/D1978

llvm-svn: 193000
2013-10-18 20:46:28 +00:00
Eric Christopher 4d964a517f Revert the rest of r192749 to bring back the buildbot. These two
error messages should not be able to occur at the same time.

llvm-svn: 192985
2013-10-18 16:56:48 +00:00
Richard Barton a661b44a5d Pure refactoring change.
Patch by Artyom Skrobov.

llvm-svn: 192977
2013-10-18 14:41:50 +00:00
Bill Schmidt 3684fdd59f [PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel)
PR17168 describes a test case that fails when compiling for debug with
fast-isel.  Investigation showed that the test was failing because a DBG_VALUE
machine instruction was placed prior to a PHI.

For this problem to occur requires the following:
 * Compile for debug
 * Compile with fast-isel
 * In a block B, fast-isel must partially succeed before punting to DAG-isel
 * B must start with a PHI
 * The first unhandled node in the DAG must not generate a machine instruction
 * A debug value with an order less than that of that first node exists

When all of these circumstances apply, the existing test that an instruction
was not inserted won't fire.  Currently it tests whether the block is empty,
or whether the last instruction generated is a phi.  When fast-isel has
partially succeeded, the last instruction generated will not be a phi.
Instead, we need to check whether the current insert position is immediately
following a phi.  This patch adds that check, and adds the test case from the
PR as a regression test.

llvm-svn: 192976
2013-10-18 14:20:11 +00:00
Benjamin Kramer a9fe95b6c2 R600: Remove \ at EOL from ascii art comments.
Completely harmless, but GCC likes to warn about it even when the next line is
a comment.

llvm-svn: 192974
2013-10-18 14:12:50 +00:00
Richard Barton 87dacc38b8 Add hint disassembly syntax for 16-bit Thumb hint instructions.
Patch by Artyom Skrobov

llvm-svn: 192972
2013-10-18 14:09:49 +00:00
Chad Rosier fe2f58c8a1 [AArch64] Add support for NEON scalar extract narrow instructions.
llvm-svn: 192970
2013-10-18 14:03:24 +00:00
Ed Maste 243fbbdcfd Correct log message typo: ended ad -> ended at
(From LLDB r192897)

llvm-svn: 192968
2013-10-18 13:01:33 +00:00
Silviu Baranga 314e58fdcc Add hardware division as a default feature on Cortex-A15. Also add test cases to check this, and change diagnostics for the hwdiv-arm feature to something useful.
llvm-svn: 192963
2013-10-18 10:18:40 +00:00
David Majnemer 451b7dd1ef CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics
There are targets that support i128 sized scalars but cannot emit
instructions that modify them directly.  The proper thing to do is to
emit a libcall.

This fixes PR17481.

llvm-svn: 192957
2013-10-18 08:03:43 +00:00
Alp Toker 42235db0e9 Fix a conversion warning in the mingw32 build
gcc diagnoses this:
  warning: converting to non-pointer type 'unsigned int' from NULL

Also remove an empty statement.

No change in functionality.

llvm-svn: 192955
2013-10-18 07:53:25 +00:00
Alexey Samsonov 742e6b8efd [DebugInfo] Remove unneeded struct member and hide struct definition. No functionality change.
llvm-svn: 192954
2013-10-18 07:13:32 +00:00
Alp Toker 153675b718 Fix initialization order warning in mingw32 build
No change in functionality.

llvm-svn: 192953
2013-10-18 07:09:58 +00:00
Alexey Samsonov 5b5a7865e7 [DebugInfo] Remove dead code.
llvm-svn: 192952
2013-10-18 07:03:16 +00:00
Hans Wennborg 7ddcdc82a5 Revert "Re-commit r192758 - MC: quote tricky symbol names in asm output"
This caused the clang-native-mingw32-win7 buildbot to break.

The assembler was complaining about the following lines that were showing up
in the asm for CrashRecoveryContext.cpp:

  movl  $"__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4", 4(%eax)
  calll "_AddVectoredExceptionHandler@8"
  .def   "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4";
  "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4":
  calll "_RemoveVectoredExceptionHandler@4"

Reverting for now.

llvm-svn: 192940
2013-10-18 02:14:40 +00:00
Eric Christopher ffbc4decc2 Temporarily revert r192749 as it is causing problems for LTO and
requires a more in depth change to the IR structure.

llvm-svn: 192938
2013-10-18 01:57:30 +00:00
David Blaikie 01fae51fef DIEHash: Add more things (and remove one character) from the COLLECT_ATTR macro
Makes the uses more terse and requires that they use a semicolon at the
end that helps editors indent proceeding lines correctly.

llvm-svn: 192925
2013-10-17 22:14:08 +00:00
David Blaikie ca353be652 DIEHash: Support for simple (non-recursive, non-reused) type references
llvm-svn: 192924
2013-10-17 22:07:09 +00:00
David Peixotto 8e5abc52cb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets
This commit implements the correct lowering of the
COPY_STRUCT_BYVAL_I32 pseudo-instruction for thumb1 targets.
Previously, the lowering of COPY_STRUCT_BYVAL_I32 generated the
post-increment forms of ldr/ldrh/ldrb instructions. Thumb1 does not
have the post-increment form of these instructions so the generated
assembly contained invalid instructions.

Passing the generated assembly to gcc caused it to complain with an
error like this:

  Error: cannot honor width suffix -- `ldrb r3,[r0],#1'

and the integrated assembler would generate an object file with an
invalid instruction encoding.

This commit contains a small test case that demonstrates the problem
with thumb1 targets as well as an expanded test case that more
throughly tests the lowering of byval struct passing for arm,
thumb1, and thumb2 targets.

llvm-svn: 192916
2013-10-17 19:52:05 +00:00
David Peixotto c32e24a1b7 Refactor lowering for COPY_STRUCT_BYVAL_I32
This commit refactors the lowering of the COPY_STRUCT_BYVAL_I32
pseudo-instruction in the ARM backend. We introduce a new helper
class that encapsulates all of the operations needed during the
lowering. The operations are implemented for each subtarget in
different subclasses. Currently only arm and thumb2 subtargets are
supported.

This refactoring was done to easily implement support for thumb1
subtargets. This initial patch does not add support for thumb1, but
is only a refactoring. A follow on patch will implement the support
for thumb1 subtargets.

No intended functionality change.

llvm-svn: 192915
2013-10-17 19:49:22 +00:00
Anders Waldenborg 959f04077c llvm-c: Add LLVMIntPtrType{,ForAS}InContext
All of the Core API functions have versions which accept explicit context, in
addition to ones which work on global context. This commit adds functions
which accept explicit context to the Target API for consistency.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1912

llvm-svn: 192913
2013-10-17 18:51:01 +00:00
Rafael Espindola 045a78fa7e Rename fields of GlobalStatus to match the coding style.
llvm-svn: 192910
2013-10-17 18:18:52 +00:00
Chad Rosier 37d29173aa [AArch64] Add support for NEON scalar three register different instruction
class.  The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.

llvm-svn: 192908
2013-10-17 18:12:29 +00:00
Rafael Espindola 27797baee7 rename SafeToDestroyConstant to isSafeToDestroyConstant and clang-format.
llvm-svn: 192907
2013-10-17 18:06:32 +00:00
Rafael Espindola 026c9cbefe Simplify the interface of AnalyzeGlobal a bit and rename to analyzeGlobal.
No functionality change.

llvm-svn: 192906
2013-10-17 18:00:25 +00:00
Daniel Sanders a4eaf59f9e [mips][msa] Added lsa instruction
llvm-svn: 192895
2013-10-17 13:38:20 +00:00
Alexey Samsonov caabb0eac1 [DebugInfo] Delete dead code, simplify and fix code style for some existing code. No functionality change.
llvm-svn: 192894
2013-10-17 13:28:16 +00:00
Daniel Sanders 0390568a09 [mips][msa] Removed ldx.[bhwd] and stx.[bhwd].
These were present in a previous version of the MSA spec but are not
present in the published version. There is no hardware that uses these
instructions.

llvm-svn: 192888
2013-10-17 12:16:03 +00:00
Richard Sandiford 95f7ba988b Replace sra with srl if a single sign bit is required
E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).

llvm-svn: 192884
2013-10-17 11:16:57 +00:00