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22781 Commits

Author SHA1 Message Date
Nate Begeman 42c9e4df6f Fix a comment sabre noticed :) 
llvm-svn: 26257
 2006-02-17 06:24:31 +00:00
Nate Begeman 669ad7ea19 A couple new regression tests to make sure we always pattern match the new 
opcodes on ppc.

llvm-svn: 26256
 2006-02-17 06:16:56 +00:00
Nate Begeman 5965bd19f8 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner 9ec392b2aa Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
 2006-02-17 04:32:33 +00:00
Chris Lattner 67c21b6c46 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Jeff Cohen 0d62ebd13f Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Jeff Cohen ac8b761b62 Inform Visual Studio of deleted file. 
llvm-svn: 26251
 2006-02-17 02:11:34 +00:00
Nate Begeman 3920ce4d8d Whoops, didn't mean to check this in yet. 
llvm-svn: 26250
 2006-02-17 00:56:19 +00:00
Nate Begeman 4a0dc0c8f6 Add a missing and useful pat frag 
llvm-svn: 26249
 2006-02-17 00:51:06 +00:00
Chris Lattner 6fd136239b start of some new simplification code, not thoroughly tested, use at your own 
risk :)

llvm-svn: 26248
 2006-02-17 00:31:07 +00:00
Evan Cheng b590d3a72b Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman 7e5496d5fe Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng db1dbbe8d6 Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng eb7b3380fd pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Chris Lattner 936cc9fe53 Remove the skeleton target, it doesn't produce useful code and there are 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
 2006-02-16 23:14:50 +00:00
Evan Cheng c3dcf5a4d7 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Evan Cheng 24c461b51e 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng 3f99628939 Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Chris Lattner 3d22a090cf remove skeleton target 
llvm-svn: 26239
 2006-02-16 21:12:54 +00:00
Nate Begeman 8a77efe4f7 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Chris Lattner 4382d8e8d9 don't build the skeleton target 
llvm-svn: 26237
 2006-02-16 21:11:49 +00:00
Chris Lattner e5002f3e09 remove support for the skeleton target 
llvm-svn: 26236
 2006-02-16 21:10:57 +00:00
Chris Lattner fa335f6083 Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :) 
This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235
 2006-02-16 19:36:22 +00:00
Evan Cheng 01afec2adb MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Duraid Madina 36a2ee299e distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Evan Cheng 42c01c8d39 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Chris Lattner 471627c49d Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written 
by Nate, I'm just committing it for him.

llvm-svn: 26230
 2006-02-16 08:02:36 +00:00
Chris Lattner 1e6128254c Fix a minor makefile bug with lex/yacc handling that nate noticed. We don't 
want to copy the files when the .cpp file changes, we want to copy them
to the .cvs versions when the .l/.y file change (like the comments even say).
This avoids having bogus changes show up in diffs.

llvm-svn: 26229
 2006-02-16 05:10:48 +00:00
Jeff Cohen 55f63f1b53 Fix VC++ warning. 
llvm-svn: 26228
 2006-02-16 04:07:37 +00:00
Jeff Cohen 6388d5b2f7 Visual Studio enters the future of bisoning. 
llvm-svn: 26227
 2006-02-16 04:07:03 +00:00
Evan Cheng ae82498e81 Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
 2006-02-16 01:50:02 +00:00
Chris Lattner ff42e81028 fix a bug where we unswitched the wrong way 
llvm-svn: 26225
 2006-02-16 01:24:41 +00:00
Evan Cheng 03c1e6f48e A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Chris Lattner fdff0bb43e Implement trivial unswitching for switch stmts. This allows us to trivial 
unswitch this loop on 2 before sweating to unswitch on 1/3.

void test4(int N, int i, int C, int*P, int*Q) {
  int j;
  for (j = 0; j < N; ++j) {
    switch (C) {                // general unswitching.
    default: P[i+j] = 0; break;
    case 1: Q[i+j] = 0; break;
    case 3: P[i+j] = Q[i+j]; break;
    case 2: break;              //  TRIVIAL UNSWITCH on C==2
    }
  }
}

llvm-svn: 26223
 2006-02-15 22:52:05 +00:00
Evan Cheng 76a7775ce1 Remove an entry. 
llvm-svn: 26222
 2006-02-15 22:14:34 +00:00
Evan Cheng 93e4865d4b Remove an unused function parameter. 
llvm-svn: 26221
 2006-02-15 22:12:35 +00:00
Chris Lattner e5cb76d744 make "trivial" unswitching significantly more general. It can now handle 
this for example:

  for (j = 0; j < N; ++j) {     // trivial unswitch
    if (C)
      P[i+j] = 0;
  }

turning it into the obvious code without bothering to duplicate an empty loop.

llvm-svn: 26220
 2006-02-15 22:03:36 +00:00
Evan Cheng 6781b6e62e Turn a memcpy from string constant into a series of stores of constant values. 
llvm-svn: 26219
 2006-02-15 21:59:04 +00:00
Andrew Lenharth 47da60130a fix a bunch of alpha regressions. see bug 709 
llvm-svn: 26218
 2006-02-15 21:13:37 +00:00
Chris Lattner 6afb5587da new test 
llvm-svn: 26217
 2006-02-15 19:52:06 +00:00
Jim Laskey 2eea436192 Should not combine ISD::LOCATIONs until we have scheme to remove from 
MachineDebugInfo tables.

llvm-svn: 26216
 2006-02-15 19:34:44 +00:00
Chris Lattner 65152d80ec Checking the wrong value. This caused us to emit silly code like 
Y = seteq bool X, true
instead of just using X :)

llvm-svn: 26215
 2006-02-15 19:05:52 +00:00
Jim Laskey 1fcabe2016 Code sufficiently protected against this test. 
llvm-svn: 26213
 2006-02-15 17:20:59 +00:00
Duraid Madina 8604de8bec reverting previous change, will add support for other compilers later 
llvm-svn: 26211
 2006-02-15 07:57:42 +00:00
Chris Lattner a7c9234fde Convert over to the new way of handling lex/bison checked into cvs 
llvm-svn: 26209
 2006-02-15 07:26:07 +00:00
Chris Lattner 3e15eac81b Check the new form for bison output into CVS 
llvm-svn: 26208
 2006-02-15 07:24:01 +00:00
Chris Lattner b0240b2f4a bugfixes 
llvm-svn: 26207
 2006-02-15 07:23:05 +00:00
Chris Lattner f20e61f003 Convert this over to work with the new makefiles 
llvm-svn: 26206
 2006-02-15 07:22:58 +00:00
Chris Lattner c38a9755f1 Convert the bison-output-checked-into-cvs makefile handling stuff to work 
like the flex stuff, which actually works when people do cvs updates and
get conflicts in the updated checked in file.

llvm-svn: 26205
 2006-02-15 07:16:57 +00:00
Chris Lattner 6db414e8de Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires 
it, because this:

.bss
X:
.byte 0

results in the assembler warning: "initialization in bss segment".  Annoying.

llvm-svn: 26204
 2006-02-15 07:07:14 +00:00