b110e04851
[AVX-512] Remove masked pmovzx/pmovsx builtins and autoupgrade them to selects and native zext/sext.
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This mostly reuses earlier autoupgrade support for the sse and avx equivalents. Just needed to add the code to add the select.
llvm-svn: 286092
2016-11-07 02:12:57 +00:00
7e545335d6
[AVX-512] Remove 128/256 masked pshufb intrinsics. Autoupgrade them to legacy intrinsics and a select.
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llvm-svn: 286089
2016-11-07 00:13:39 +00:00
af9b3fe752
[AVX-512] Remove intrinsics for 128/256-bit masked shift by immediate. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.
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llvm-svn: 286072
2016-11-06 16:29:14 +00:00
c9467ed31e
[AVX-512] Remove intrinsics for 128/256-bit masked shift by single element in xmm. Instead upgrade them to a select and the older SSE/AVX2 intrinsic.
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llvm-svn: 286070
2016-11-06 16:29:08 +00:00
8ec5c7326d
[AVX-512] Remove masked pmin/pmax intrinsics and autoupgrade to native IR.
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Clang patch to replace 512-bit vector and 64-bit element versions with native IR will follow.
llvm-svn: 284955
2016-10-24 04:04:16 +00:00
af0d63d2e7
[AVX-512] Remove masked integer add/sub/mull intrinsics and upgrade to native IR.
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llvm-svn: 280611
2016-09-04 02:09:53 +00:00
dca03bebd3
AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values
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Optimized lowering of BITCAST node. The BITCAST node can be replaced with COPY_TO_REG instead of KMOV.
It allows to suppress two opposite BITCAST operations and avoid redundant "movs".
Differential Revision: https://reviews.llvm.org/D23247
llvm-svn: 277958
2016-08-07 13:05:58 +00:00
152e7c8b12
VirtRegMap: Replace some identity copies with KILL instructions.
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An identity COPY like this:
%AL = COPY %AL, %EAX<imp-def>
has no semantic effect, but encodes liveness information: Further users
of %EAX only depend on this instruction even though it does not define
the full register.
Replace the COPY with a KILL instruction in those cases to maintain this
liveness information. (This reverts a small part of r238588 but this
time adds a comment explaining why a KILL instruction is useful).
llvm-svn: 274952
2016-07-09 00:19:07 +00:00
4e96fbf3c1
[X86][AVX512] Autoupgrade the BROADCAST intrinsics
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llvm-svn: 274550
2016-07-05 13:58:47 +00:00
dbd6db0dc7
[X86][AVX512] Add support for VPALIGNR/PSHUFD/PSHUFHW/PSHUFLW masked shuffle comments
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llvm-svn: 274466
2016-07-03 15:00:51 +00:00
598bdb6bfe
[X86][AVX512] Add support for UNPCK masked shuffle comments
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llvm-svn: 274464
2016-07-03 14:26:21 +00:00
597aa42fec
[AVX512] Remove masked unpack intrinsics and autoupgrade to vectorshuffle and selects.
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llvm-svn: 273543
2016-06-23 07:37:33 +00:00
0a0fb0fda1
[AVX512] Remove the masked vpcmpeq/vcmpgt intrinsics and autoupgrade them to native icmps.
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llvm-svn: 273240
2016-06-21 03:53:24 +00:00
13cf7cac07
[AVX512] Remove maksed pshufd, pshuflw, and phufhw intrinsics and autoupgrade them to selects and shufflevector.
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llvm-svn: 272527
2016-06-13 02:36:48 +00:00
89c1761474
[AVX512] Fix shuffle comment printing to handle the masked versions of some shuffles. Previously we were printing the mask operands as the register names.
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llvm-svn: 272367
2016-06-10 04:48:05 +00:00
8537c11ff3
[X86] Fix a test I failed to re-generate in r272249.
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llvm-svn: 272250
2016-06-09 07:10:34 +00:00
33350cc406
[AVX512] Remove masked palignr intrinsics and auto-upgrade them to native IR of vector shuffle and select.
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llvm-svn: 271872
2016-06-06 06:12:54 +00:00
f10fbfa738
[AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead.
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The intrinsics will be autoupgraded to the same generic masked loads.
llvm-svn: 271478
2016-06-02 04:19:36 +00:00
50f85c22c5
[AVX512] Remove masked store intrinsics. Clang now emits generic masked store intrinsics instead.
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The intrinsics will be autoupgraded to the same generic masked stores.
llvm-svn: 271245
2016-05-31 01:50:02 +00:00
Craig Topper