maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
256,107 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

241 Commits

Author SHA1 Message Date
Simon Pilgrim ee6ef4d6dd Fix 'variable set but not used' warning when assertions are disabled. 
llvm-svn: 295585
 2017-02-19 00:03:46 +00:00
Benjamin Kramer efcf06f5f2 Move symbols from the global namespace into (anonymous) namespaces. NFC. 
llvm-svn: 294837
 2017-02-11 11:06:55 +00:00
Krzysztof Parzyszek f9015e62fd [Hexagon] Introduce Hexagon V62 
llvm-svn: 294805
 2017-02-10 23:46:45 +00:00
Krzysztof Parzyszek a72fad980c [Hexagon] Replace instruction definitions with auto-generated ones 
llvm-svn: 294753
 2017-02-10 15:33:13 +00:00
Krzysztof Parzyszek 5ea971ced5 [Hexagon] Update instruction types 
Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their
architecture counterparts.

Patch by Colin LeMahieu.

llvm-svn: 294321
 2017-02-07 17:47:37 +00:00
Krzysztof Parzyszek 0605f3fddd [Hexagon] Address ASAN and UBSAN failures after r294226 
Reinstate r294256 with a fix.

llvm-svn: 294269
 2017-02-07 02:31:53 +00:00
Krzysztof Parzyszek becf0a362a Revert "[Hexagon] Address ASAN and UBSAN failures after r294226" 
This reverts commit r294256. It seems to be causing more problems instead
of solving them.

llvm-svn: 294259
 2017-02-06 23:30:17 +00:00
Krzysztof Parzyszek 35a7838954 [Hexagon] Address ASAN and UBSAN failures after r294226 
llvm-svn: 294256
 2017-02-06 23:11:32 +00:00
Krzysztof Parzyszek 8cdfe8ecf3 [Hexagon] Update MCTargetDesc 
Changes include:
- Updates to the instruction descriptor flags.
- Improvements to the packet shuffler and checker.
- Updates to the handling of certain relocations.
- Better handling of duplex instructions.

llvm-svn: 294226
 2017-02-06 19:35:46 +00:00
Krzysztof Parzyszek d0d42f0ec8 [Hexagon] Adding opExtentBits and opExtentAlign to GPrel instructions 
Patch by Colin LeMahieu.

llvm-svn: 293933
 2017-02-02 20:35:12 +00:00
Krzysztof Parzyszek e17b0bfb24 [Hexagon] Fix relocation kind for extended predicated calls 
Patch by Sid Manning.

llvm-svn: 293931
 2017-02-02 20:21:56 +00:00
Krzysztof Parzyszek 357b048666 [Hexagon] Remove A4_ext_* pseudo instructions 
Patch by Colin LeMahieu.

llvm-svn: 293929
 2017-02-02 19:58:22 +00:00
Krzysztof Parzyszek bc4dc9b4b9 [Hexagon] Emitting individual instructions without copying them 
Patch by Colin LeMahieu.

llvm-svn: 293899
 2017-02-02 15:32:26 +00:00
Krzysztof Parzyszek f65b8f14f4 [Hexagon] Rename TypeCOMPOUND to TypeCJ 
llvm-svn: 293894
 2017-02-02 15:03:30 +00:00
Eugene Zelenko b2ca1b3f37 [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 
llvm-svn: 290925
 2017-01-04 02:02:05 +00:00
Eugene Zelenko 401f381533 [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC). 
llvm-svn: 290028
 2016-12-17 01:29:35 +00:00
Eugene Zelenko 5015689b32 [Hexagon] Fix build with enabled asserts broken in 290024 (NFC). 
llvm-svn: 290027
 2016-12-17 01:17:18 +00:00
Eugene Zelenko 58655bbc60 [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 
llvm-svn: 290024
 2016-12-17 01:09:05 +00:00
Colin LeMahieu 8170754919 [Hexagon] Changing from literal numeric value to argument since #-1 will not parse when '-' is converted to a token. 
llvm-svn: 288634
 2016-12-05 04:29:00 +00:00
Daniel Sanders 72db2a390a Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. 
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
  emission of instructions that don't satisfy their predicates. One deliberate
  use is the SYNC instruction where the version with an operand is correctly
  defined as requiring MIPS32 while the version without an operand is defined
  as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
  MCCodeEmitter infrastructure.

Patches for ARM and Mips will follow.

Depends on D25617

Reviewers: tstellarAMD, jmolloy

Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits

Differential Revision: https://reviews.llvm.org/D25618

llvm-svn: 287439
 2016-11-19 13:05:44 +00:00
Simon Pilgrim 6ba672e542 Fix spelling mistakes in Hexagon target comments. NFC. 
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287248
 2016-11-17 19:21:20 +00:00
Chandler Carruth 30e0029904 Delete a dead store found by PVS-Studio. 
Quite sad we still aren't really using aggressive dead code warnings
from Clang that we could potentially use to catch this and so many other
things.

llvm-svn: 285936
 2016-11-03 17:01:38 +00:00
Mehdi Amini f42454b94b Move the global variables representing each Target behind accessor function 
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
 2016-10-09 23:00:34 +00:00
Colin LeMahieu c69f7ff6c0 [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this restriction rather than implying it from TypeJR. 
llvm-svn: 283665
 2016-10-08 17:18:51 +00:00
Colin LeMahieu 9694825d32 [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP. 
llvm-svn: 283582
 2016-10-07 19:11:28 +00:00
Colin LeMahieu 8ed1aee9dd [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names. 
llvm-svn: 283514
 2016-10-07 00:15:07 +00:00
Mehdi Amini 36d33fc109 Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC) 
llvm-svn: 283018
 2016-10-01 06:46:33 +00:00
Krzysztof Parzyszek 0b8672269c [Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC 
llvm-svn: 279255
 2016-08-19 15:17:19 +00:00
Krzysztof Parzyszek 75e74ee699 [Hexagon] Rename the HEXAGON_MC namespace to Hexagon_MC, NFC 
llvm-svn: 279243
 2016-08-19 14:09:47 +00:00
Krzysztof Parzyszek 6421b934ec [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumpr 
llvm-svn: 279241
 2016-08-19 14:04:45 +00:00
Justin Bogner b03fd12cef Replace "fallthrough" comments with LLVM_FALLTHROUGH 
This is a mechanical change of comments in switches like fallthrough,
fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.

llvm-svn: 278902
 2016-08-17 05:10:15 +00:00
Krzysztof Parzyszek be976d4ea9 [Hexagon] Standardize pseudo-instructions for calls and returns 
- CALLv3nr        PS_call_nr
- CALLRv3nr       PS_callr_nr
- CALLstk         PS_call_stk

- TCRETURNi       PS_tailcall_i
- TCRETURNr       PS_tailcall_r

- JMPret          PS_jmpret
- JMPrett         PS_jmprett
- JMPretf         PS_jmpretf
- JMPrettnew      PS_jmprettnew
- JMPretfnew      PS_jmpretfnew
- JMPrettnewpt    PS_jmprettnewpt
- JMPretfnewpt    PS_jmpretfnewpt

llvm-svn: 278499
 2016-08-12 11:12:02 +00:00
Joel Jones 373d7d30dd MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFC 
Some targets, notably AArch64 for ILP32, have different relocation encodings
based upon the ABI. This is an enabling change, so a future patch can use the
ABIName from MCTargetOptions to chose which relocations to use. Tested using
check-llvm.

The corresponding change to clang is in: http://reviews.llvm.org/D16538

Patch by: Joel Jones

Differential Revision: https://reviews.llvm.org/D16213

llvm-svn: 276654
 2016-07-25 17:18:28 +00:00
Nirav Dave 8603062ee4 Fix branch relaxation in 16-bit mode. 
Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation
to generate jumps with 16-bit sized immediates in 16-bit mode.

This fixes PR22097.

Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight

Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D20830

llvm-svn: 275068
 2016-07-11 14:23:53 +00:00
Benjamin Kramer 4d9d2cc77f [Hexagon] Create global std::map lazily. 
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.

llvm-svn: 274437
 2016-07-02 13:05:12 +00:00
Rafael Espindola d86e8bb0ed Delete MCCodeGenInfo. 
MC doesn't really care about CodeGen stuff, so this was just
complicating target initialization.

llvm-svn: 274258
 2016-06-30 18:25:11 +00:00
Reid Kleckner 858239d5f8 Prune some includes from headers and sink some inline functions 
MCSymbol.h shouldn't pull in MCAssembler.h, just MCFragment.h.
MCLinkerOptimizationHint.h shouldn't need MCMachObjectWriter.h.  The
rest is fixing the fallout.

llvm-svn: 273507
 2016-06-22 23:23:08 +00:00
David Majnemer e61e4bfd87 Replace silly uses of 'signed' with 'int' 
llvm-svn: 273244
 2016-06-21 05:10:24 +00:00
Krzysztof Parzyszek 96bb4fe539 [Hexagon] Separate C8 and USR to avoid unwanted subregister composition 
Composing subreg_loreg with subreg_oveflow leads to strange results with
lane masks for register classes with subreg_loreg. In particular, dead
lane detection generates incorrect code.

llvm-svn: 271087
 2016-05-28 01:51:16 +00:00
David Blaikie bc744272f8 Fix -Wunused-variable in non-Asserts build 
llvm-svn: 270118
 2016-05-19 20:44:22 +00:00
David Blaikie f869d3190c Simplify conditional unreachable into an assertion 
llvm-svn: 270111
 2016-05-19 20:28:40 +00:00
Ron Lieberman 562e19eecb Fix a covnersion from string to bool issue used in an assert 
Problem Was exposed by -Wstring-conversion
    

llvm-svn: 270087
 2016-05-19 18:05:56 +00:00
Rafael Espindola 8c34dd8257 Delete Reloc::Default. 
Having an enum member named Default is quite confusing: Is it distinct
from the others?

This patch removes that member and instead uses Optional<Reloc> in
places where we have a user input that still hasn't been maped to the
default value, which is now clear has no be one of the remaining 3
options.

llvm-svn: 269988
 2016-05-18 22:04:49 +00:00
Krzysztof Parzyszek a0ea73c9af [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19900

llvm-svn: 269415
 2016-05-13 13:13:59 +00:00
Krzysztof Parzyszek e737b86f8c [Hexagon] Handle double-vector registers as new-value producers 
Patch by Colin LeMahieu.

llvm-svn: 267897
 2016-04-28 15:54:48 +00:00
Colin LeMahieu a3782da3e3 [Hexagon] Merging nops in to previous packet rather than always creating a new one. 
llvm-svn: 267798
 2016-04-27 21:37:44 +00:00
Krzysztof Parzyszek 3e28229000 [Hexagon] Few fixes for exception handling 
llvm-svn: 267469
 2016-04-25 21:05:19 +00:00
Krzysztof Parzyszek e6ee481bdf [Hexagon] Correctly set "Flags" in ELF header 
llvm-svn: 267397
 2016-04-25 12:49:47 +00:00
Craig Topper 855d182656 Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false. 
llvm-svn: 267312
 2016-04-24 02:01:25 +00:00
Krzysztof Parzyszek 64d4e2bc0d [Hexagon] Add -mv.. options to override CPU selection 
This is for compatibility with scripts that use -mv5, etc. with the
assembler.

llvm-svn: 266918
 2016-04-20 21:17:40 +00:00