Commit Graph

361961 Commits

Author SHA1 Message Date
Jonas Devlieghere 41909e9682 [lldb] Add copy ctor/assignment operator to SBCommandInterpreterRunOptions 2020-07-30 10:39:30 -07:00
Jordan Rupprecht be198e03eb [lldb][test] Move registers-target-xml-reading target to the correct test location.
This test was added in D74217 (and the `.categories` file later added in ccf1c30cde) around the same time I moved the test tree from `lldb/packages/Python/lldbsuite/test` to `lldb/test/API` (D71151). Since this got lost in the move, it isn't running. (I introduced an intentional syntax error, and `ninja check-lldb` passes).

I moved it to the correct location, and now it runs and passes -- locally, at least -- as `ninja check-lldb-api-tools-lldb-server-registers-target-xml-reading`.
2020-07-30 10:28:32 -07:00
Simon Pilgrim 4a161bd8b3 LoopUnroll.cpp - pass std::vector by const reference to needToInsertPhisForLCSSA helper. NFCI.
Avoid an unnecessary pass by value.
2020-07-30 18:17:04 +01:00
Yuanfang Chen 555cf42f38 [NewPM][PassInstrument] Add PrintPass callback to StandardInstrumentations
Problem:
Right now, our "Running pass" is not accurate when passes are wrapped in adaptor because adaptor is never skipped and a pass could be skipped. The other problem is that "Running pass" for a adaptor is before any "Running pass" of passes/analyses it depends on. (for example, FunctionToLoopPassAdaptor). So the order of printing is not the actual order.

Solution:
Doing things like PassManager::Debuglogging is very intrusive because we need to specify Debuglogging whenever adaptor is created. (Actually, right now we're not specifying Debuglogging for some sub-PassManagers. Check PassBuilder)

This patch move debug logging for pass as a PassInstrument callback. We could be sure that all running passes are logged and in the correct order.

This could also be used to implement hierarchy pass logging in legacy PM. We could also move logging of pass manager to this if we want.

The test fixes looks messy. It includes changes:
- Remove PassInstrumentationAnalysis
- Remove PassAdaptor
- If a PassAdaptor is for a real pass, the pass is added
- Pass reorder (to the correct order), related to PassAdaptor
- Add missing passes (due to Debuglogging not passed down)

Reviewed By: asbirlea, aeubanks

Differential Revision: https://reviews.llvm.org/D84774
2020-07-30 10:07:57 -07:00
Craig Topper 3632f765dc [WebAssembly] Fix GCC 5 build.
Hans' speculative fix in b7292f2db0
didn't work for me. This seems to.
2020-07-30 10:00:28 -07:00
Johannes Doerfert 4d83aa4771 [MLIR][OpenMP] Fix OpenMPIRBuilder usage after D82470 2020-07-30 11:54:57 -05:00
Jordan Rupprecht 09cb6f233d [lldb][NFC][test] Fix comment referring to FileCheck instead of yaml2obj 2020-07-30 09:47:44 -07:00
cgyurgyik e263dcc3ef [libc] Implements isdigit and isalnum. Adds a utility header to inline
functions to avoid overhead of function calls.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D84893
2020-07-30 12:37:30 -04:00
Kuba Mracek 1e8a9c3e02 [tsan] Fixup for 1260a155: Move variadic-open.cpp test into Darwin/ directory 2020-07-30 09:32:51 -07:00
Hiroshi Yamauchi 3d6f53018f [PGO] Include the mem ops into the function hash.
To avoid hash collisions when the only difference is in mem ops.
2020-07-30 09:26:20 -07:00
Joel E. Denny 3d06fc0049 [OpenMP][Docs] Mark `present` motion modifier as done 2020-07-30 12:21:37 -04:00
hsmahesha 33fd4a18e7 [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic
Get rid of all fixmes and base heuristic on `num-clustered-dwords`. The main intuition behind this is as
follows. The existing heuristic roughly summarizes as below:

* Assume, all the mem ops instructions participating in the clustering process,  loads/stores same num bytes
* If num bytes loaded by each mem op is 4 bytes, then cluster at max 5 mem ops, that is at max 20 bytes
* If num bytes loaded by each mem op is 8 bytes, then cluster at max 3 mem ops, that is at max 24 bytes
* If num bytes loaded by each mem op is 16 bytes, then cluster at max 2 mem ops, that is at max 32 bytes

So, we need to make sure that the new heuristic do not completey deviate away from the above one, and it
properly handles both the sub-word loads and the wide loads.

Reviewed By: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D84354
2020-07-30 21:41:13 +05:30
Kuba Mracek 1260a155c3 [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions)
Not matching the (real) variadic declaration makes the interceptor take garbage inputs on Darwin/AArch64.

Differential Revision: https://reviews.llvm.org/D84570
2020-07-30 09:00:47 -07:00
Louis Dionne 0a00a7d577 [libc++] Use generator expression in Linker script generation
This is an alternative to the workaround in 34a3b24a90.

Differential Revision: https://reviews.llvm.org/D68880
2020-07-30 11:59:29 -04:00
Artem Dergachev 6a043ecc0c [clang-tidy] Fix ODR violation in unittests.
Both tests define clang::tidy::test::TestCheck::registerMatchers().
This is UB and causes linker to sometimes choose the wrong overload.

Put classes into anonymous namespaces to avoid the problem.

Differential Revision: https://reviews.llvm.org/D84902
2020-07-30 08:52:47 -07:00
Jonas Devlieghere b6635b5b15 [lldb] Add SBCommandInterpreterRunOptions to LLDB.h 2020-07-30 08:46:19 -07:00
Brendon Cahoon 7b114446c3 Align store conditional address
In cases where the alignment of the datatype is smaller than
expected by the instruction, the address is aligned. The aligned
address is used for the load, but wasn't used for the store
conditional, which resulted in a run-time alignment exception.
2020-07-30 10:42:00 -05:00
Fangrui Song d2c2248722 [X86] Parse and ignore .arch directives
We parse .arch so that some `.arch i386; .code32` code can assemble. It seems
that X86AsmParser does not do a good job tracking what features are needed to
assemble instructions. GNU as's x86 port supports a very wide range of .arch
operands. Ignore the operand for now.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D84900
2020-07-30 08:30:06 -07:00
Johannes Doerfert ebad64dfe1 [OpenMP][FIX] Consistently use OpenMPIRBuilder if requested
When we use the OpenMPIRBuilder for the parallel region we need to also
use it to get the thread ID (among other things) in the body. This is
because CGOpenMPRuntime::getThreadID() and
CGOpenMPRuntime::emitUpdateLocation implicitly assumes that if they are
called from within a parallel region there is a certain structure to the
code and certain members of the OMPRegionInfo are initialized. It might
make sense to initialize them even if we use the OpenMPIRBuilder but we
would preferably get rid of such state instead.

Bug reported by Anchu Rajendran Sudhakumari.

Depends on D82470.

Reviewed By: anchu-rajendran

Differential Revision: https://reviews.llvm.org/D82822
2020-07-30 10:19:40 -05:00
Johannes Doerfert 19756ef53a [OpenMP][IRBuilder] Support allocas in nested parallel regions
We need to keep track of the alloca insertion point (which we already
communicate via the callback to the user) as we place allocas as well.

Reviewed By: fghanim, SouraVX

Differential Revision: https://reviews.llvm.org/D82470
2020-07-30 10:19:39 -05:00
Alexey Bataev 622e46156d [OPENMP]Fix PR46824: Global declare target pointer cannot be accessed in target region.
Need to map the base pointer for all directives, not only target
data-based ones.
The base pointer is mapped for array sections, array subscript, array
shaping and other array-like constructs with the base pointer. Also,
codegen for use_device_ptr clause was modified to correctly handle
mapping combination of array like constructs + use_device_ptr clause.
The data for use_device_ptr clause is emitted as the last records in the
data mapping array.

Reviewed By: ye-luo

Differential Revision: https://reviews.llvm.org/D84767
2020-07-30 11:18:33 -04:00
Kirill Bobyrev c4b7bfdff6
[clangd] NFC: Spell out types in index callback arguments 2020-07-30 17:12:29 +02:00
Alexey Bataev b69357c2f4 Revert "[OPENMP]Fix PR46824: Global declare target pointer cannot be accessed in target region."
This reverts commit 142d0d3ed8 to
investigate undefined behavior revealed by buildbots.
2020-07-30 10:57:56 -04:00
Xiangling Liao 4e6176fd91 [AIX] Temporarily disable IncrementalProcessingTest partially
Temporarily disable IncrementalProcessingTest partially until the static
initialization implementation on AIX is recovered.

Differential Revision: https://reviews.llvm.org/D84880
2020-07-30 10:41:52 -04:00
Momchil Velikov ef4e665435 [AArch64] Fix operand definitions of XPACI/XPACD
The operand to these instructions is both input and output.

These are not yet emitted by the compiler and the assembler already
works fine, so can't test in this patch.  But D75044 will use XPACI
and provide test coverage for this patch as well.

Differential Revision: https://reviews.llvm.org/D84298
2020-07-30 15:31:44 +01:00
Matt Arsenault b8c8d1b309 AMDGPU: Convert some tests to use new buffer intrinsics
The legacy not struct or raw buffer intrinsics should now all be
consolidated into the tests specifically for those intrinsics.
2020-07-30 10:30:43 -04:00
Simon Pilgrim 6316b0023e Attributor.h - remove unnecessary includes. NFCI.
Fix implicit cpp include dependencies.
2020-07-30 15:26:41 +01:00
Jinsong Ji dab8d6104b [PowerPC][AIX] Move the testcase to proper dir 2020-07-30 14:25:59 +00:00
Hans Wennborg b7292f2db0 Speculative GCC 5 build fix
It's complaining about specializing the template in a different namespace.
2020-07-30 16:12:52 +02:00
Tim Keith 38272f45fe [flang] Create HostAssoc symbols for uplevel references
To make it easier for lowering to identify which symbols from the host
are captured by internal subprograms, create HostAssocDetails for them.

In particular, if a symbol is referenced and it is contained in a
subprogram or main program that is not the same as the containing
program unit of the reference, a HostAssocDetails symbol is created
in the current scope.

Differential Revision: https://reviews.llvm.org/D84889
2020-07-30 07:12:26 -07:00
Alexey Bataev 142d0d3ed8 [OPENMP]Fix PR46824: Global declare target pointer cannot be accessed in target region.
Need to map the base pointer for all directives, not only target
data-based ones.
The base pointer is mapped for array sections, array subscript, array
shaping and other array-like constructs with the base pointer. Also,
codegen for use_device_ptr clause was modified to correctly handle
mapping combination of array like constructs + use_device_ptr clause.
The data for use_device_ptr clause is emitted as the last records in the
data mapping array.
It applies only for global pointers.

Differential Revision: https://reviews.llvm.org/D84767
2020-07-30 09:40:05 -04:00
jasonliu 04dc9691eb [XCOFF][AIX] Enable -ffunction-sections
Summary:
This patch implements -ffunction-sections on AIX.
This patch focuses on assembly generation.
Follow-on patch needs to handle:
1. -ffunction-sections implication for jump table.
2. Object file generation path and associated testing.

Differential Revision: https://reviews.llvm.org/D83875
2020-07-30 13:30:01 +00:00
Sanjay Patel f7237ee74f [ConstantFolding] add tests for abs intrinsic; NFC 2020-07-30 09:28:30 -04:00
David Green 1da0c47fa2 [LoopVectorizer] Don't create unused block masks for reductions. NFC
This removes some unneeded block masks when we don't have any
reductions. It should not have any effect on codegen as the values
created are dead anyway.

Differential Revision: https://reviews.llvm.org/D81415
2020-07-30 14:28:08 +01:00
Louis Dionne 9be1bdc240 [libc++] Add XFAIL for <float.h> and <cfloat> tests on older Clangs 2020-07-30 09:26:55 -04:00
Stephan Herhut 85defd23aa [mlir][shape] Use memref of index in shape lowering
Now that we can have a memref of index type, we no longer need to materialize shapes in i64 and then index_cast.

Differential Revision: https://reviews.llvm.org/D84938
2020-07-30 15:12:43 +02:00
Christian Sigg 13a3d88666 [MLIR] Don't pass separate LowerToLLVMOptions when we already pass a LLVMTypeConverter which contains those options already.
This also prevents passing inconsistent options.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84915
2020-07-30 14:55:23 +02:00
Abhishek Varma 76d07503f0 [MLIR] Introduce inter-procedural memref layout normalization
-- Introduces a pass that normalizes the affine layout maps to the identity layout map both within and across functions by rewriting function arguments and call operands where necessary.
-- Memref normalization is now implemented entirely in the module pass '-normalize-memrefs' and the limited intra-procedural version has been removed from '-simplify-affine-structures'.
-- Run using -normalize-memrefs.
-- Return ops are not handled and would be handled in the subsequent revisions.

Signed-off-by: Abhishek Varma <abhishek.varma@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D84490
2020-07-30 18:12:56 +05:30
Stephan Herhut e12db3ed99 [mlir] Allow index as element type of memref
Differential Revision: https://reviews.llvm.org/D84934
2020-07-30 14:35:22 +02:00
Jean Perier 67e41df4e0 [flang] Expose specific to generic intrinsic name mapping
The intrinsic lowering facility is based on the generic intrinsic names to avoid
duplicating implementations. Specific intrinsics call are re-written to call to
the generic versions by the front-end but this cannot be done when specific intrinsics
are passed as arguments (the rewrite would give illegal/ambiguous unparsed Fortran).
Solve the issue by making the specific to generic name mapping accessible to lowering
and can be later used to generate the unrestricted intrinsic functions.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D84842
2020-07-30 14:30:12 +02:00
Florian Hahn 59d6e814ce Revert "[IPConstProp] Remove and move tests to SCCP."
This reverts commit e77624a3be.

Looks like some clang tests manually invoke -ipconstprop via opt.....
2020-07-30 13:06:54 +01:00
Frederik Gossen a97940d4e0 [MLIR][Shape] Limit `shape.rank` lowering to its extent tensor variant
When lowering to the standard dialect, we currently support only the extent
tensor variant of the shape.rank operation. This change lets the conversion
pattern fail in a well-defined manner.

Differential Revision: https://reviews.llvm.org/D84852
2020-07-30 11:43:08 +00:00
Florian Hahn e77624a3be [IPConstProp] Remove and move tests to SCCP.
As far as I know, ipconstprop has not been used in years and ipsccp has
been used instead. This has the potential for confusion and sometimes
leads people to spend time finding & reporting bugs as well as
updating it to work with the latest API changes.

This patch moves the tests over to SCCP. There's one functional difference
I am aware of: ipconstprop propagates for each call-site individually, so
for functions that are called with different constant arguments it can sometimes
produce better results than ipsccp (at much higher compile-time cost).But
IPSCCP can be thought to do so as well for internal functions and as mentioned
earlier, the pass seems unused in practice (and there are no plans on working
towards enabling it anytime).

Also discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2020-July/143773.html

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D84447
2020-07-30 12:36:27 +01:00
Simon Pilgrim cc529285fd VectorUtils.h - reduce unnecessary includes. NFC.
Replace TargetLibraryInfo.h include with forward declaration and fix implicit dependencies.

Reduce SmallSet.h include to SmallVector.h include.
2020-07-30 12:27:49 +01:00
Simon Pilgrim 2dec72ba5c [X86][SSE] combineExtractWithShuffle - extend extract(truncate(x),0) for any source vector size
As long as we can extract the lowest 128-bit subvector from the pre-truncated source vector, then we don't care what size it is.

The next stage will be to support non-zero extraction indices, as long as its still coming from the lowest 128-bit subvector.
2020-07-30 12:27:49 +01:00
Kirill Bobyrev a262f0fea4
[clangd] Implement Relations request for remote index
This is the last missing bit in the core remote index implementation. The only
remaining bits are some API refactorings (replacing Optional with Expected and
being better at reporting errors).

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D84894
2020-07-30 12:57:33 +02:00
Florian Hahn 44a4ba859d [AArch64] Add machine-combiner tests with instruction level FMFs. 2020-07-30 11:41:09 +01:00
Raphael Isemann a4a0844248 [lldb] Don't use static locals for return value storage in some *AsCString functions
Let's just return a std::string to make this safe. formatv seemed overkill for formatting
the return values as they all just append an integer value to a constant string.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D84505
2020-07-30 12:17:42 +02:00
Esme-Yi 141b64a340 [NFC] Failed cases for some patterns defined in DAGCombiner.cpp 2020-07-30 10:05:04 +00:00
Aleksandr Platonov 05b1734661 [clangd] findNearbyIdentifier(): fix the word search in the token stream.
Without this patch the word occurrence search always returns the first token of the file.
Despite of that, `findNeardyIdentifier()` returns the correct result (but inefficently) until there are several matched tokens with the same value `floor(log2(<token line> - <word line>))` (e.g. several matched tokens on the same line).

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D84912
2020-07-30 12:45:58 +03:00