Commit Graph

167 Commits

Author SHA1 Message Date
Chris Lattner ab1ed2aa96 Fix an off by one error that caused PPC LLC failures last night.
llvm-svn: 26758
2006-03-14 17:56:49 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Chris Lattner 02e2c18c9c For functions that use vector registers, save VRSAVE, mark used
registers, and update it on entry to each function, then restore it on exit.

This compiles:

void func(vfloat *a, vfloat *b, vfloat *c) {
        *a = *b * *c + *c;
}

to this:

_func:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r5
        lvx v1, 0, r4
        vmaddfp v0, v1, v0, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

GCC produces this (which has additional stack accesses):

_func:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc000
        mtspr 256,r0
        lvx v0,0,r5
        lvx v1,0,r4
        lwz r12,-4(r1)
        vmaddfp v0,v0,v1,v0
        stvx v0,0,r3
        mtspr 256,r12
        blr

llvm-svn: 26733
2006-03-13 21:52:10 +00:00
Chris Lattner 51348c5f27 Several big changes:
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
   type instead of a table in the .cpp file.  Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
   algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
   accurately.

llvm-svn: 26719
2006-03-12 09:13:49 +00:00
Chris Lattner 543832d39d Change the interface for getting a target HazardRecognizer to be more clean.
llvm-svn: 26608
2006-03-08 04:25:59 +00:00
Chris Lattner 2cab13573c Implement a very very simple hazard recognizer for LSU rejects and ctr set/read
flushes

llvm-svn: 26587
2006-03-07 06:32:48 +00:00
Chris Lattner 60a60f4b1e Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668.
llvm-svn: 26450
2006-03-01 07:14:48 +00:00
Chris Lattner a1ec1ddd59 Implement selection of inline asm memory operands
llvm-svn: 26348
2006-02-24 02:13:12 +00:00
Nate Begeman 5965bd19f8 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
2006-02-17 05:43:56 +00:00
Evan Cheng 42c01c8d39 If the false case is the current basic block, then this is a self loop.
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
2006-02-16 08:27:56 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand).
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng 6dc90ca172 Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Evan Cheng bfa4b7cc75 Complex pattern isel code shouldn't select nodes.
llvm-svn: 26010
2006-02-05 08:45:01 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Chris Lattner f424a66524 Use PPCISD::CALL instead of ISD::CALL
llvm-svn: 25717
2006-01-27 23:34:02 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Chris Lattner 5bd514d7b0 Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.
llvm-svn: 25334
2006-01-15 09:02:48 +00:00
Chris Lattner 1014b38404 these cases are autogenerated
llvm-svn: 25238
2006-01-12 02:01:45 +00:00
Chris Lattner 44416f92f1 remove dead code
llvm-svn: 25237
2006-01-12 01:54:15 +00:00
Chris Lattner 20c88dfd1b Fix a compile crash building MultiSource/Applications/d with the new front-end.
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.

llvm-svn: 25114
2006-01-05 18:32:49 +00:00
Nate Begeman 9aea6e4691 Fix one of the things in the todo file, and get a bit closer to folding
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
2005-12-24 01:00:15 +00:00
Nate Begeman b11b8e44fa Pattern-match return. Includes gross hack!
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman c126397a69 Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register.  This also requires some asm printer work
to satisfy the darwin assembler.

For
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

We now produce:
_foo:
        lvx v0, 0, r3
        vaddfp v0, v0, v0
        stvx v0, 0, r3
        blr

Instead of:
_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24872
2005-12-19 23:40:42 +00:00
Nate Begeman 8e6a8af205 Convert load/store over to being pattern matched
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
Chris Lattner 2f5fb6a720 This is handled by the autogen'd code
llvm-svn: 24834
2005-12-18 21:06:11 +00:00
Nate Begeman 808f7a8abb Remove a now unused statistic.
llvm-svn: 24720
2005-12-14 22:56:16 +00:00
Nate Begeman e37cb604c1 Use the new predicate support that Evan Cheng added to remove some code
from the DAGToDAG cpp file.  This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.

Allows us to match:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  %tmp3 = add <4 x float> %tmp2, %tmp1
  store <4 x float> %tmp3, <4 x float> *%a
  ret void
}

As:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vmaddfp v0, v0, v0, v0
        stvx v0, r2, r3
        blr

Or, with llc -disable-excess-fp-precision,

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v1, v0, v0, v1
        vaddfp v0, v1, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24719
2005-12-14 22:54:33 +00:00
Nate Begeman 4e56db674c Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
2005-12-10 02:36:00 +00:00
Chris Lattner de085f0165 Silence another annoying GCC warning
llvm-svn: 24627
2005-12-06 20:56:18 +00:00
Chris Lattner efc86f5f7a The basic fneg cases are already autogen'd
llvm-svn: 24592
2005-12-04 19:04:38 +00:00
Chris Lattner f979794717 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
improvements.

llvm-svn: 24591
2005-12-04 19:01:59 +00:00
Chris Lattner fd857daa0d Finish moving uncond br over to .td file, remove from .cpp file.
llvm-svn: 24590
2005-12-04 18:48:01 +00:00
Chris Lattner df9287836e Make sure these get added into the codegenmap when appropriate
llvm-svn: 24566
2005-12-01 18:09:22 +00:00
Chris Lattner bd099102f0 Fix a regression caused by a patch earlier today
llvm-svn: 24561
2005-12-01 03:50:19 +00:00
Evan Cheng d94aa71e1a Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
llvm-svn: 24558
2005-12-01 00:41:50 +00:00
Chris Lattner e318977940 SelectNodeTo now returns N. Use it instead of return N directly.
llvm-svn: 24549
2005-11-30 22:53:06 +00:00
Nate Begeman 1064d6ec43 First chunk of actually generating vector code for packed types. These
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
2005-11-30 08:22:07 +00:00
Chris Lattner 5aba6ae3b3 Enable global address legalization, fixing a todo and allowing the removal
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.

llvm-svn: 24397
2005-11-17 18:26:56 +00:00
Chris Lattner 0fe88e3f32 Teach the selector to fold lo(g) into load instruction immediate fields
llvm-svn: 24396
2005-11-17 18:02:16 +00:00
Chris Lattner 595088aa0f Add an initial hack at legalizing GlobalAddress into the appropriate nodes
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390
2005-11-17 07:30:41 +00:00
Chris Lattner b7025749e1 When lowering direct calls, lower them to use a targetglobaladress directly
instead of a globaladdress.  This has no effect on the generated code at all.

llvm-svn: 24386
2005-11-17 05:56:14 +00:00
Nate Begeman a171f6b20c Patch to clean up function call pseudos and support the BLA instruction,
which branches to an absolute address.  This is required to support objc
direct dispatch.

llvm-svn: 24370
2005-11-16 00:48:01 +00:00
Chris Lattner 7ca53a5783 Don't emit "32" for unordered comparison
llvm-svn: 24073
2005-10-28 22:58:07 +00:00
Chris Lattner f8899a6877 add a hack to get code with ordered comparisons working. This hack is
tracked as PR642

llvm-svn: 24068
2005-10-28 20:49:47 +00:00
Chris Lattner 5d6cb604de add support for branch on ordered/unordered.
llvm-svn: 24067
2005-10-28 20:32:44 +00:00
Chris Lattner 81ff73ec46 autogen undef
llvm-svn: 23991
2005-10-25 21:03:41 +00:00
Chris Lattner 261009a4df Autogen fsel
llvm-svn: 23987
2005-10-25 20:55:47 +00:00
Chris Lattner cd7f101c9a Autogen a few new ppc-specific nodes
llvm-svn: 23985
2005-10-25 20:41:46 +00:00
Chris Lattner 26ee5953f7 The dag isel generator generates this now
llvm-svn: 23984
2005-10-25 20:36:10 +00:00
Chris Lattner c0a201c318 Be a bit more paranoid about calling SelectNodeTo
llvm-svn: 23982
2005-10-25 20:26:41 +00:00