Commit Graph

108 Commits

Author SHA1 Message Date
Evan Cheng 7f8e563a69 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Bill Wendling 3e5409df77 We need to verify that the machine instruction we're using as a replacement for
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>

llvm-svn: 141830
2011-10-12 23:03:40 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Eli Friedman 5401962643 Re-revert r130877; it's apparently causing a regression on 197.parser,
possibly related to cbnz formation.

llvm-svn: 130977
2011-05-06 05:23:07 +00:00
Eli Friedman 2311bdfa7b Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.
llvm-svn: 130925
2011-05-05 16:18:11 +00:00
Eli Friedman 0fe4608af2 Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
Original message:

Teach MachineCSE how to do simple cross-block CSE involving physregs.  This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .

llvm-svn: 130877
2011-05-04 22:10:36 +00:00
Eli Friedman 3bd79ba856 Back out r130862; it appears to be breaking bootstrap.
llvm-svn: 130867
2011-05-04 20:48:42 +00:00
Eli Friedman a16fc2fec0 Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130862
2011-05-04 19:54:24 +00:00
Evan Cheng fe917efc8b Fix a couple of places where changes are made but not tracked.
llvm-svn: 129287
2011-04-11 18:47:20 +00:00
Chris Lattner 6c8b8dd522 fit in 80 cols and use MBB::isSuccessor instead of a hand
rolled std::find.

llvm-svn: 123164
2011-01-10 07:51:31 +00:00
Jakob Stoklund Olesen 2fb5b31578 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155
2011-01-10 02:58:51 +00:00
Evan Cheng 6eb516dbea Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Cameron Zwarich 18f164f7c9 Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for
a 28% speedup of MachineCSE time on 403.gcc.

llvm-svn: 122735
2011-01-03 04:07:46 +00:00
Evan Cheng b7ff5a0f20 Teach machine cse to commute instructions.
llvm-svn: 121903
2010-12-15 22:16:21 +00:00
Evan Cheng 2b3f25e031 Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
llvm-svn: 117745
2010-10-29 23:36:03 +00:00
Owen Anderson 6c18d1aac0 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820
2010-10-19 17:21:58 +00:00
Owen Anderson 8ac477ffb5 Begin adding static dependence information to passes, which will allow us to
perform initialization without static constructors AND without explicit initialization
by the client.  For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve.  I hope to be able to relax
the latter requirement in the future.

llvm-svn: 116334
2010-10-12 19:48:12 +00:00
Owen Anderson df7a4f2515 Now with fewer extraneous semicolons!
llvm-svn: 115996
2010-10-07 22:25:06 +00:00
Jakob Stoklund Olesen 18842783cc Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875
2010-10-06 23:54:39 +00:00
Evan Cheng b08377e0db Machine CSE was forgetting to clear some data structures.
llvm-svn: 114222
2010-09-17 21:59:42 +00:00
Evan Cheng 0dcd3362bd Fix a potential bug that can cause miscomparison with and without debug info.
llvm-svn: 114220
2010-09-17 21:56:26 +00:00
Evan Cheng e0db9d01d9 Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before.
llvm-svn: 111281
2010-08-17 20:57:42 +00:00
Owen Anderson a7aed18624 Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Owen Anderson bda59bd247 Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson 755aceb5d0 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Owen Anderson a57b97e7e7 Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
llvm-svn: 109045
2010-07-21 22:09:45 +00:00
Jakob Stoklund Olesen 37c42a3d02 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Jakob Stoklund Olesen 00264624a9 Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

llvm-svn: 107879
2010-07-08 16:40:22 +00:00
Jakob Stoklund Olesen 4c82a9e7d0 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547
2010-07-03 00:04:37 +00:00
Evan Cheng a03e6f85fe Re-apply 105308 with fix.
llvm-svn: 105502
2010-06-04 23:28:13 +00:00
Bob Wilson 30093b5d8b Revert 105308.
llvm-svn: 105399
2010-06-03 18:28:31 +00:00
Evan Cheng a2da22734f Enable machine cse of instructions which define physical registers.
llvm-svn: 105308
2010-06-02 01:08:27 +00:00
Eric Christopher 53ff992dde Make this LookAheadLimit, not the uninitialized LookAheadLeft.
Evan please verify!

llvm-svn: 104408
2010-05-21 23:40:03 +00:00
Evan Cheng 2c8bdead9e Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.
llvm-svn: 104385
2010-05-21 21:22:19 +00:00
Dan Gohman 7767d2747b Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.

llvm-svn: 103726
2010-05-13 19:24:00 +00:00
Evan Cheng 4b2ef56ad2 Rewrite machine cse to avoid recursion.
llvm-svn: 101964
2010-04-21 00:21:07 +00:00
Evan Cheng 4019d571d9 Typo.
llvm-svn: 101914
2010-04-20 17:27:38 +00:00
Evan Cheng 604bc162da After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted.
rdar://7819990

llvm-svn: 100170
2010-04-02 02:21:24 +00:00
Evan Cheng cf7be39e24 dbg_value may end a block.
llvm-svn: 99378
2010-03-24 01:50:28 +00:00
Evan Cheng c7d721aa03 Code clean up.
llvm-svn: 99319
2010-03-23 20:33:48 +00:00
Dale Johannesen 197bd3eee9 Fix debug_value handling.
llvm-svn: 98224
2010-03-11 02:10:24 +00:00
Evan Cheng 4c5f7a7f5e Add a couple more heuristics to neuter machine cse some more.
1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled.
2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure.

Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again.

Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64.

llvm-svn: 98121
2010-03-10 02:12:03 +00:00
Evan Cheng 51063739a4 Allow more cross-rc coalescing.
llvm-svn: 98048
2010-03-09 06:38:17 +00:00
Jakob Stoklund Olesen 7c699f92cd Don't do illegal cross-class coalescing.
llvm-svn: 98044
2010-03-09 03:56:06 +00:00
Evan Cheng 19e44b4510 - Make the machine cse dumb coalescer (as opposed to the more awesome simple
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
  range splitting, avoid cse when an expression has PHI use and the would be
  new use is in a BB where the expression wasn't already being used.

llvm-svn: 98043
2010-03-09 03:21:12 +00:00
Evan Cheng c9e8621268 Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason.
llvm-svn: 98009
2010-03-08 23:49:12 +00:00
Evan Cheng 6ec41ee33c Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
llvm-svn: 98007
2010-03-08 23:28:08 +00:00
Evan Cheng 0f5f54784a Don't update physical register def.
llvm-svn: 97861
2010-03-06 01:14:19 +00:00
Evan Cheng 1abd1a9f4b Avoid cse load instructions unless they are known to be invariant loads.
llvm-svn: 97747
2010-03-04 21:18:08 +00:00
Evan Cheng 36f8aabb2c Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86.
llvm-svn: 97706
2010-03-04 01:33:55 +00:00
Evan Cheng 2922641a7e Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression.
llvm-svn: 97688
2010-03-03 23:59:08 +00:00
Evan Cheng 0abbb399c9 Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization.
llvm-svn: 97678
2010-03-03 23:27:36 +00:00
Dan Gohman a791914e2c Revert 97667. It broke a bunch of tests.
llvm-svn: 97673
2010-03-03 22:40:03 +00:00
Evan Cheng 0dd0c47b7e Move DenseMapInfo for MachineInstr* to MachineInstr.h
llvm-svn: 97667
2010-03-03 21:47:16 +00:00
Evan Cheng b386cd3871 Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way.
llvm-svn: 97664
2010-03-03 21:20:05 +00:00
Evan Cheng 4eab008b5a Work in progress. Finding some cse now.
llvm-svn: 97635
2010-03-03 02:48:20 +00:00
Evan Cheng 10194a425c Fix typo.
llvm-svn: 97577
2010-03-02 19:02:27 +00:00
Evan Cheng 036aa49d2e Add skeleton of a machine level cse pass.
llvm-svn: 97543
2010-03-02 02:38:24 +00:00