Commit Graph

1130 Commits

Author SHA1 Message Date
Gabor Buella a052016ef2 [x86] wbnoinvd intrinsic
The WBNOINVD instruction writes back all modified
cache lines in the processor’s internal cache to main memory
but does not invalidate (flush) the internal caches.

Reviewers: craig.topper, zvi, ashlykov

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D43817

llvm-svn: 329848
2018-04-11 20:09:09 +00:00
Gabor Buella 8701b18a25 [X86] Split up -march=icelake to -client & -server
Reviewers: craig.topper, zvi, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45056

llvm-svn: 329741
2018-04-10 18:58:26 +00:00
Gabor Buella 5966507c4e [X86] Disable SGX for Skylake Server - CPP test
Summary: Fix test case - corresponding to r329701

Reviewers: craig.topper, davezarzycki

Reviewed By: davezarzycki

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45488

llvm-svn: 329710
2018-04-10 15:03:03 +00:00
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Shiva Chen 4891dbf557 [PATCH] [RISCV] Extend getTargetDefines for RISCVTargetInfo
Summary:
This patch extend getTargetDefines and implement handleTargetFeatures
and hasFeature. and define corresponding marco for those features.

Reviewers: asb, apazos, eli.friedman

Differential Revision: https://reviews.llvm.org/D44727

Patch by Kito Cheng.

llvm-svn: 329278
2018-04-05 12:54:00 +00:00
Richard Trieu b402580616 Fix some handling of AST nodes with diagnostics.
The diagnostic system for Clang can already handle many AST nodes.  Instead
of converting them to strings first, just hand the AST node directly to
the diagnostic system and let it handle the output.  Minor changes in some
diagnostic output.

llvm-svn: 328688
2018-03-28 04:16:13 +00:00
Hans Wennborg 1bbe00e0ca [ms] Parse #pragma optimize and ignore it behind its own flag
This allows users to turn off warnings about this pragma specifically,
while still receiving warnings about other ignored pragmas.

Differential Revision: https://reviews.llvm.org/D44630

llvm-svn: 327959
2018-03-20 08:53:11 +00:00
Sjoerd Meijer 50944d642e [AAch64] Tests for ACLE FP16 macros
This adds some missing tests for the AArch64 FP16 macros.

Differential Revision: https://reviews.llvm.org/D44512

llvm-svn: 327623
2018-03-15 13:36:30 +00:00
Sjoerd Meijer a7463df6e2 [ARM] ACLE FP16 feature test macros
This is a partial recommit of r327189 that was reverted
due to test issues. I.e., this recommits minimal functional
change, the FP16 feature test macros, and adds tests that 
were missing in the original commit.

llvm-svn: 327455
2018-03-13 22:11:06 +00:00
Matthew Voss 0a6a701f36 Correct the alignment for the PS4 target
https://reviews.llvm.org/D44218

llvm-svn: 326942
2018-03-07 20:48:16 +00:00
Mandeep Singh Grang ac24bb53bb [RISCV] Enable __int128_t and __uint128_t through clang flag
Summary:
If the flag -fforce-enable-int128 is passed, it will enable support for __int128_t and __uint128_t types.
This flag can then be used to build compiler-rt for RISCV32.

Reviewers: asb, kito-cheng, apazos, efriedma

Reviewed By: asb, efriedma

Subscribers: shiva0217, efriedma, jfb, dschuff, sdardis, sbc100, jgravelle-google, aheejin, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, cfe-commits

Differential Revision: https://reviews.llvm.org/D43105

llvm-svn: 326045
2018-02-25 03:58:23 +00:00
Craig Topper 94a940d2b4 [X86] Disable CLWB in Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43459

llvm-svn: 325655
2018-02-21 00:16:50 +00:00
Keith Walker 167961f6dc [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D42569

llvm-svn: 325492
2018-02-19 12:40:26 +00:00
Saleem Abdulrasool fd4db5331e Support `#pragma comment(lib, "name")` in the frontend for ELF
This adds the frontend support required to support the use of the
comment pragma to enable auto linking on ELFish targets. This is a
generic ELF extension supported by LLVM. We need to change the handling
for the "dependentlib" in order to accommodate the previously discussed
encoding for the dependent library descriptor. Without the custom
handling of the PCK_Lib directive, the -l prefixed option would be
encoded into the resulting object (which is treated as a frontend
error).

llvm-svn: 324438
2018-02-07 01:46:46 +00:00
Walter Lee 637aafc451 [Myriad] Define __ma2x5x and __ma2x8x
Summary: Add architecture defines for ma2x5x and ma2x8x.

Reviewers: jyknight

Subscribers: fedor.sergeev, MartinO

Differential Revision: https://reviews.llvm.org/D42882

llvm-svn: 324420
2018-02-06 22:39:47 +00:00
Alex Bradbury 3e1478f866 [RISCV] Create a LinuxTargetInfo when targeting Linux
Previously, RISCV32TargetInfo or RISCV64TargetInfo were created 
unconditionally. Use LinuxTargetInfo<RISCV??TargetInfo> to ensure that the 
proper OS-specific defines are present.

This patch only adds logic to instantiate LinuxTargetInfo and leaves a TODO, 
as I'm reluctant to add logic for other targets (e.g. FreeBSD, RTEMS) until 
I've produced and tested at least one binary for that OS+target combo.

Thanks to @mgrang to reporting the issue.

llvm-svn: 324170
2018-02-03 11:56:11 +00:00
Craig Topper ace5c37c57 [X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.
gcc recently fixed this bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83546

llvm-svn: 323552
2018-01-26 19:34:45 +00:00
Craig Topper 3672f00e01 [X86] Define __IBT__ when -mibt is specified.
llvm-svn: 323543
2018-01-26 18:31:14 +00:00
Craig Topper 8cdb94901d [X86] Add rdpid command line option and intrinsics.
Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already been made.

Reviewers: RKSimon, spatel, zvi, AndreiGrischenko

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42272

llvm-svn: 323047
2018-01-20 18:36:52 +00:00
Craig Topper c0b4aba786 [X86] Add missing check for RDSEED to ICL, CNL, SKX sections of test/Preprocessor/predefined-arch-macros.c
llvm-svn: 322912
2018-01-19 00:28:42 +00:00
Erich Keane cec95ec1a7 Revert 319303: Add _Float128 as alias to __float128 to enable compilations on Fedora27/glibc2
Differential Revision: https://reviews.llvm.org/D40673

llvm-svn: 322518
2018-01-15 21:16:25 +00:00
Alex Bradbury 71f45455e1 [RISCV] Add the RISCV target and compiler driver
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver 
support (RV64 to follow).

Differential Revision: https://reviews.llvm.org/D39963

llvm-svn: 322276
2018-01-11 13:36:56 +00:00
Steven Wu b96a3a4fe5 Preserve unknown STDC pragma through preprocessor
Summary:
#pragma STDC FP_CONTRACT handler is only registered in parser so we
should keep the unknown STDC pragma through preprocessor and we also
should not emit warning for unknown STDC pragma during preprocessor.

rdar://problem/35724351

Reviewers: efriedma, rsmith, arphaman

Reviewed By: efriedma

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41780

llvm-svn: 321909
2018-01-05 22:45:03 +00:00
Hubert Tong 7d96b79194 Use backslash escape, replacing xargs -0 in test macro-multiline.c
Summary:
xargs supports escaping of newline characters with backslash.
xargs -0 is neither part of POSIX nor the LSB.

This patch removes the -0 option and adjusts the input to xargs
accordingly; that is, the input is a text file not ending in an
incomplete line, and the newline of interest is preceded by a backslash.

Note: The treatment of escaped newline characters is not as clearly
specified by POSIX as for escaped blank characters; however, the same
can be said for escaped backslashes. It is slightly more clear for the
case where the -I option is used; however, -I is also of limited
portability.

Reviewers: bruno

Reviewed By: bruno

Subscribers: bruno, rcraik, cfe-commits

Differential Revision: https://reviews.llvm.org/D41544

llvm-svn: 321828
2018-01-04 22:58:30 +00:00
Craig Topper d2fe244a6a Revert r321504 "[X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake."
I based that commit on what was in Intel's public documentation here https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

Which specifically said CLWB wasn't until Icelake.

But I've since cross checked with SDE and it thinks these features exist on CNL and ICL. So now I don't know what to believe.

I've added test coverage of the current behavior as part of the revert so at least now have proof of what we're doing.

llvm-svn: 321547
2017-12-29 06:39:16 +00:00
Benjamin Kramer 3a13ed60ba Avoid int to string conversion in Twine or raw_ostream contexts.
Some output changes from uppercase hex to lowercase hex, no other functionality change intended.

llvm-svn: 321526
2017-12-28 16:58:54 +00:00
Craig Topper 520d055f66 [X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake.
We have cannonlake and icelake inheriting from skylake server in a switch using fallthroughs. But they aren't perfect supersets of skylake server.

llvm-svn: 321504
2017-12-27 22:26:01 +00:00
Craig Topper 5bd93e99e2 [X86] Test that -march=skx enables PKU.
llvm-svn: 321503
2017-12-27 22:26:00 +00:00
Craig Topper b36447d346 [X86] Enable avx512vpopcntdq and clwb for icelake.
Per table 1-1 of the October 2017 edition of Intel® Architecture Instruction Set Extensions and Future Features Programming Reference

llvm-svn: 321502
2017-12-27 22:25:59 +00:00
Coby Tayree a09663a5c1 [x86][icelake][vbmi2]
added vbmi2 feature recognition
added intrinsics support for vbmi2 instructions
_mm[128,256,512]_mask[z]_compress_epi[16,32]
_mm[128,256,512]_mask_compressstoreu_epi[16,32]
_mm[128,256,512]_mask[z]_expand_epi[16,32]
_mm[128,256,512]_mask[z]_expandloadu_epi[16,32]
_mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64]
_mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64]
matching a similar work on the backend (D40206)
Differential Revision: https://reviews.llvm.org/D41557

llvm-svn: 321487
2017-12-27 11:25:07 +00:00
Coby Tayree 3d9c88cfec [x86][icelake][vnni]
added vnni feature recognition
added intrinsics support for VNNI instructions
_mm256_mask_dpbusd_epi32
_mm256_maskz_dpbusd_epi32
_mm256_dpbusd_epi32
_mm256_mask_dpbusds_epi32
_mm256_maskz_dpbusds_epi32
_mm256_dpbusds_epi32
_mm256_mask_dpwssd_epi32
_mm256_maskz_dpwssd_epi32
_mm256_dpwssd_epi32
_mm256_mask_dpwssds_epi32
_mm256_maskz_dpwssds_epi32
_mm256_dpwssds_epi32
_mm128_mask_dpbusd_epi32
_mm128_maskz_dpbusd_epi32
_mm128_dpbusd_epi32
_mm128_mask_dpbusds_epi32
_mm128_maskz_dpbusds_epi32
_mm128_dpbusds_epi32
_mm128_mask_dpwssd_epi32
_mm128_maskz_dpwssd_epi32
_mm128_dpwssd_epi32
_mm128_mask_dpwssds_epi32
_mm128_maskz_dpwssds_epi32
_mm128_dpwssds_epi32
_mm512_mask_dpbusd_epi32
_mm512_maskz_dpbusd_epi32
_mm512_dpbusd_epi32
_mm512_mask_dpbusds_epi32
_mm512_maskz_dpbusds_epi32
_mm512_dpbusds_epi32
_mm512_mask_dpwssd_epi32
_mm512_maskz_dpwssd_epi32
_mm512_dpwssd_epi32
_mm512_mask_dpwssds_epi32
_mm512_maskz_dpwssds_epi32
_mm512_dpwssds_epi32
matching a similar work on the backend (D40208)
Differential Revision: https://reviews.llvm.org/D41558

llvm-svn: 321484
2017-12-27 10:37:51 +00:00
Coby Tayree 2268576fa0 [x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564

llvm-svn: 321483
2017-12-27 10:01:00 +00:00
Coby Tayree cf96c876c6 [x86][icelake][vpclmulqdq]
added vpclmulqdq feature recognition
added intrinsics support for vpclmulqdq instructions
  _mm256_clmulepi64_epi128
  _mm512_clmulepi64_epi128
matching a similar work on the backend (D40101)
Differential Revision: https://reviews.llvm.org/D41573

llvm-svn: 321480
2017-12-27 09:00:31 +00:00
Coby Tayree f4811ebc39 [x86][icelake][gfni]
added gfni feature recognition
added intrinsics support for gfni instructions
  _mm_gf2p8affineinv_epi64_epi8
  _mm_mask_gf2p8affineinv_epi64_epi8
  _mm_maskz_gf2p8affineinv_epi64_epi8
  _mm256_gf2p8affineinv_epi64_epi8
  _mm256_mask_gf2p8affineinv_epi64_epi8
  _mm256_maskz_gf2p8affineinv_epi64_epi8
  _mm512_gf2p8affineinv_epi64_epi8
  _mm512_mask_gf2p8affineinv_epi64_epi8
  _mm512_maskz_gf2p8affineinv_epi64_epi8
  _mm_gf2p8affine_epi64_epi8
  _mm_mask_gf2p8affine_epi64_epi8
  _mm_maskz_gf2p8affine_epi64_epi8
  _mm256_gf2p8affine_epi64_epi8
  _mm256_mask_gf2p8affine_epi64_epi8
  _mm256_maskz_gf2p8affine_epi64_epi8
  _mm512_gf2p8affine_epi64_epi8
  _mm512_mask_gf2p8affine_epi64_epi8
  _mm512_maskz_gf2p8affine_epi64_epi8
  _mm_gf2p8mul_epi8
  _mm_mask_gf2p8mul_epi8
  _mm_maskz_gf2p8mul_epi8
  _mm256_gf2p8mul_epi8
  _mm256_mask_gf2p8mul_epi8
  _mm256_maskz_gf2p8mul_epi8
  _mm512_gf2p8mul_epi8
  _mm512_mask_gf2p8mul_epi8
  _mm512_maskz_gf2p8mul_epi8
matching a similar work on the backend (D40373)
Differential Revision: https://reviews.llvm.org/D41582

llvm-svn: 321477
2017-12-27 08:37:47 +00:00
Coby Tayree a1e5f0c339 [x86][icelake][vaes]
added vaes feature recognition
added intrinsics support for vaes instructions, matching a similar work on the backend (D40078)
  _mm256_aesenc_epi128
  _mm512_aesenc_epi128
  _mm256_aesenclast_epi128
  _mm512_aesenclast_epi128
  _mm256_aesdec_epi128
  _mm512_aesdec_epi128
  _mm256_aesdeclast_epi128
  _mm512_aesdeclast_epi128

llvm-svn: 321474
2017-12-27 08:16:54 +00:00
Craig Topper 921aff6e90 [X86] Add missing check lines for the silvermont cases in predefined-arch-macros.c test.
llvm-svn: 321343
2017-12-22 05:09:38 +00:00
Craig Topper 66b110edce [X86] Add 'prfchw' to the correct CPUs to match the backend.
llvm-svn: 321341
2017-12-22 04:51:00 +00:00
Alex Lorenz 3b288c6e1b __is_target_environment: Check the environment after parsing it
This ensures that target triples with environment versions can still work with
__is_target_environment.

llvm-svn: 320854
2017-12-15 20:07:53 +00:00
Alex Lorenz 268759e58f __is_target_arch: Check the arch and subarch instead of the arch name
This ensures that when compiling for "arm64" __is_target_arch will succeed for
both "arm64" and "aarch64".

Thanks to Bob Wilson who pointed this out!

llvm-svn: 320853
2017-12-15 19:58:38 +00:00
Alex Lorenz 2cfa11a524 Commit missing tests for r320734
llvm-svn: 320735
2017-12-14 19:22:41 +00:00
Krzysztof Parzyszek cc5cd2c013 [Hexagon] Add front-end support for Hexagon V65
llvm-svn: 320579
2017-12-13 13:48:07 +00:00
Erich Keane 6c4835978a Revert 320391: Certain targets are failing, pulling back to diagnose.
llvm-svn: 320398
2017-12-11 18:14:51 +00:00
Erich Keane bb322555af For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is available
As reported in llvm bugzilla 32377.
Here’s a patch to add preinclude of stdc-predef.h.

The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.” See https://gcc.gnu.org/gcc-4.8/porting_to.html;

The preinclude is inhibited with –ffreestanding.

Basically I fixed the failing test cases by adding –ffreestanding which inhibits this behavior.

I fixed all the failing tests, including some in extra/test, there's a separate patch for that which is linked here

Note: this is a recommit after a test failure took down the original (r318669)

Patch By: mibintc
Differential Revision: https://reviews.llvm.org/D34158

llvm-svn: 320391
2017-12-11 17:36:42 +00:00
Aaron Ballman 1c30924420 Add a test that the __STDC_VERSION__ macro reports the correct value for -std=c17.
llvm-svn: 320131
2017-12-08 02:39:26 +00:00
Aaron Ballman 7c18159bb5 Correct line endings that got mixed up in r320088; NFC.
llvm-svn: 320115
2017-12-07 23:10:09 +00:00
Aaron Ballman 48f5f4d895 Add support for the __has_c_attribute builtin preprocessor macro.
This behaves similar to the __has_cpp_attribute builtin macro in that it allows users to detect whether an attribute is supported with the [[]] spelling syntax, which can be enabled in C with -fdouble-square-bracket-attributes.

llvm-svn: 320088
2017-12-07 21:37:49 +00:00
Taewook Oh cebac48bf7 Stringizing raw string literals containing newline
Summary: This patch implements 4.3 of http://open-std.org/jtc1/sc22/wg21/docs/papers/2014/n4220.pdf. If a raw string contains a newline character, replace each newline character with the \n escape code. Without this patch, included test case (macro_raw_string.cpp) results compilation failure.

Reviewers: rsmith, doug.gregor, jkorous-apple

Reviewed By: jkorous-apple

Subscribers: jkorous-apple, vsapsai, cfe-commits

Differential Revision: https://reviews.llvm.org/D39279

llvm-svn: 319904
2017-12-06 17:00:53 +00:00
Ed Schouten 1382a32a73 Add __WINT_MAX__.
This definition is similar to __WCHAR_MAX__, except that it applies to
wint_t. It's also documented as being supported by GCC 4.5 and later.

llvm-svn: 319746
2017-12-05 09:13:18 +00:00
Erich Keane 45cf85b415 Add _Float128 as alias to __float128 to enable compilations on Fedora27/glibc2-26
Fedora27 is using a new version of glibc that refers to the _Float128 type. This
patch adds that name as an alias to float128. I also added some predefined macro
values for the digits, mantissa, epilon, etc (FloatMacros). For the test case, I
copied an existing float128 test. This functionality needs work long term, but 
it should be sufficient to tread water for a while. At Intel we have test
servers running our LLVM compiler with various open source workloads, the server
has been upgraded to Fedora27 so many workloads are failing due to _Float128.

Patch-By: mibintc
Differential Revision: https://reviews.llvm.org/D40673

llvm-svn: 319703
2017-12-04 21:58:43 +00:00
Sven van Haastregt d141e4806b [OpenCL] Define __IMAGE_SUPPORT__ macro for SPIR
Add #define __IMAGE_SUPPORT__ 1 for SPIR targets to indicate that SPIR
supports images.

Patch by Dmitry Borisenkov.

Differential Revision: https://reviews.llvm.org/D40252

llvm-svn: 319658
2017-12-04 15:01:08 +00:00
Keith Walker c5bbd11406 Revert [ARM] disable FPU features when using soft floating point.
This reverts r319420
It is failing the test Driver/arm-mfpu.c so reverting while I investigate the failure.

llvm-svn: 319425
2017-11-30 12:05:18 +00:00
Keith Walker a4097075e2 [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D40256

llvm-svn: 319420
2017-11-30 11:38:56 +00:00
Martell Malone c950c651a4 Toolchain: Normalize dwarf, sjlj and seh eh
This is a re-apply of r319294.

adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

-fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319297
2017-11-29 07:25:12 +00:00
Martell Malone 2fa25706ed Revert "Toolchain: Normalize dwarf, sjlj and seh eh"
This reverts rL319294.
The windows sanitizer does not like seh on x86.
Will re apply with None type for x86

llvm-svn: 319295
2017-11-29 06:51:27 +00:00
Martell Malone 390cfcb0b1 Toolchain: Normalize dwarf, sjlj and seh eh
adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

clang cc1 assumes dwarf is the default if none is passed
and -fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319294
2017-11-29 06:25:13 +00:00
Oren Ben Simhon fec21ec0c6 Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)
Shadow stack solution introduces a new stack for return addresses only.
The stack has a Shadow Stack Pointer (SSP) that points to the last address to which we expect to return.
If we return to a different address an exception is triggered.
This patch includes shadow stack intrinsics as well as the corresponding CET header.
It includes CET clang flags for shadow stack and Indirect Branch Tracking.

For more information, please see the following:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

Differential Revision: https://reviews.llvm.org/D40224

Change-Id: I79ad0925a028bbc94c8ecad75f6daa2f214171f1
llvm-svn: 318995
2017-11-26 12:34:54 +00:00
Martell Malone 051e966e49 [MINGW] normalize WIN32 macros
move _WIN64 and _WIN32 defines to lib/Basic/Targets/OSTargets.h
move WIN32, WIN64 and __MINGW64__ to addMinGWDefines

fixes __MINGW64__ not being defined for aarch64
adds WIN32 definition for x64

Reviewers: mstorsjo

Differential Revision: https://reviews.llvm.org/D40285

llvm-svn: 318755
2017-11-21 11:28:29 +00:00
Martell Malone dca72fc4ea [MS] add an init test for thumbv7-windows-msvc
llvm-svn: 318736
2017-11-21 08:09:59 +00:00
Reid Kleckner 13a3d9eb7b [MS] Increase default new alignment for win64 and test it
Summary:
This raises __STDCPP_DEFAULT_NEW_ALIGNMENT__ from 8 to 16 on Win64.
This matches platforms that follow the usual `2 * sizeof(void*)`
alignment requirement for malloc. We might want to consider making that
the default rather than relying on long double alignment.

Fixes PR35356

Reviewers: STL_MSFT, rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40277

llvm-svn: 318723
2017-11-21 01:25:56 +00:00
Erich Keane 523edb0a3a Revert r318669/318694
Broke some libclang tests, so reverting for now.

llvm-svn: 318698
2017-11-20 21:46:29 +00:00
Erich Keane 5c086c7626 For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is available
As reported in llvm bugzilla 32377.
Here’s a patch to add preinclude of stdc-predef.h.

The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.” 
See https://gcc.gnu.org/gcc-4.8/porting_to.html;

The preinclude is inhibited with –ffreestanding.

Basically I fixed the failing test cases by adding –ffreestanding which inhibits
this behavior.

I fixed all the failing tests, including some in extra/test, there's a separate
patch for that which is linked here

Patch By: mibintc

Differential Revision: https://reviews.llvm.org/D34158

llvm-svn: 318669
2017-11-20 17:57:42 +00:00
Craig Topper 546cee4170 [X86] Add icelake CPU support for -march.
llvm-svn: 318617
2017-11-19 02:55:15 +00:00
Craig Topper 222c1725cd [X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.
This is the resolution we came to in D38824.

llvm-svn: 318616
2017-11-19 02:55:14 +00:00
Martin Storsjo ec82128971 [MinGW] Define __ARM_DWARF_EH__ for MinGW/ARM
Since SVN r318510, the MinGW/ARM configuration defaults to
dwarf exception handling.

Differential Revision: https://reviews.llvm.org/D39533

llvm-svn: 318511
2017-11-17 08:06:49 +00:00
Craig Topper a2b907a469 [X86] Define i586 and pentium preprocessor defines for -march=lakemont to match GCC
llvm-svn: 317069
2017-11-01 02:18:49 +00:00
Saleem Abdulrasool 1924b24aca Basic: improve coverage for Darwin targets and fix ABI
The existing coverage for the Darwin targets wasn't enough to catch all
the variations.  Improve the coverage a bit further and fix a few cases
for Darwin targets.

llvm-svn: 316826
2017-10-28 06:00:43 +00:00
Saleem Abdulrasool 418a816cdc ARM: centralise SizeType, PtrDiffType, and IntPtrType
Centralise the definitions of these compiler vended types to aid
inspection to ensure that they are defined similarly.  The one case that
stands out is the Darwin case where the types do not match up.  This
fixes the API conformance for APCS-GNU as well.

llvm-svn: 316810
2017-10-27 23:04:27 +00:00
Craig Topper a6021e3bc1 [X86] Make -march=i686 an alias of -march=pentiumpro
I think the only reason they are different is because we don't set tune_i686 for -march=i686 to match GCC. But GCC 4.9.0 seems to have changed this behavior and they do set it now. So I think they can aliases now.

Differential Revision: https://reviews.llvm.org/D39349

llvm-svn: 316712
2017-10-26 23:06:19 +00:00
Craig Topper 009cebfed8 [X86] Add avx512vpopcntdq to Knights Mill
As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017.

llvm-svn: 316593
2017-10-25 17:10:58 +00:00
Saleem Abdulrasool e5696580aa Basic: restore {,u}intptr_t on NetBSD/ARM
NetBSD uses `long int` for `intptr_t` on ARM.  This was changed in SVN
r316046, referenced against other compilers.  However, NetBSD's
reference was incorrect as the current clang behaviour is more
up-to-date.  Restore the original behaviour for that target.

llvm-svn: 316204
2017-10-20 04:11:28 +00:00
Richard Smith daae9528b7 Revert r316193.
This patch breaks users using -fno-canonical-prefixes, for whom resolving
symlinks is not acceptable.

llvm-svn: 316195
2017-10-20 00:25:07 +00:00
Peter Wu 90161dad75 Try to shorten system header paths when using -MD depfiles
GCC tries to shorten system headers in depfiles using its real path
(resolving components like ".." and following symlinks). Mimic this
feature to ensure that the Ninja build tool detects the correct
dependencies when a symlink changes directory levels, see
https://github.com/ninja-build/ninja/issues/1330

An option to disable this feature is added in case "these changed header
paths may conflict with some compilation environments", see
https://gcc.gnu.org/ml/gcc-patches/2012-09/msg00287.html

Note that the original feature request for GCC
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52974) also included paths
preprocessed output (-E) and diagnostics. That is not implemented now
since I am not sure if it breaks something else.

Differential Revision: https://reviews.llvm.org/D37954

llvm-svn: 316193
2017-10-19 23:53:27 +00:00
Jan Vesely cda72c9c3c AMDGPU: Parse r600 CPU name early and expose FMAF capability
Improve amdgcn macro test
Differential Revision: https://reviews.llvm.org/D38667

llvm-svn: 316181
2017-10-19 20:40:13 +00:00
Sumanth Gundapaneni 57098f5ac3 [Hexagon] Handling of new HVX flags and target-features
This patch has the following changes
A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector.
Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b"

The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag
is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx
or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The 
-mhvx flag adds the target-feature "+hvxv{hvx_version}"

The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is
still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag.

The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees
them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B"

The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag

The macro HVX_LENGTH is defined and is set to the length of the vector. 
Eg: #define HVX_LENGTH 64

The macro HVX_ARCH is defined and is set to the version of the HVX. 
Eg: #define HVX_ARCH 62

Differential Revision: https://reviews.llvm.org/D38852

llvm-svn: 316102
2017-10-18 18:10:13 +00:00
Saleem Abdulrasool 8d799f8ef9 Basic: fix __{,U}INTPTR_TYPE__ on ARM
Darwin and OpenBSD are the only platforms which use `long int` for
`__INTPTR_TYPE__`.  The other platforms use `int` in 32-bit, and `long
int` on 64-bit (except for VMS and Windows which are LLP64).  Adjust the
type definitions to match the platform definitions.  We now generate the
same definition as GCC on all the targets.

llvm-svn: 316046
2017-10-18 00:00:50 +00:00
Saleem Abdulrasool f78f7c05d4 Basic: fix `__INTPTR_TYPE__` for Windows ARM
The `IntPtrType` for Windows ARM should be `int` as per MSVC.  Adjust
the type accordingly.

llvm-svn: 316042
2017-10-17 22:49:53 +00:00
Reid Kleckner 400a64e81b Don't print end-of-directive tokens in -E output
This comes up when pre-processing standalone .s files containing
hash-prefixed comments. The pre-processor should skip the unknown
directive and not emit an extra newline as we were doing.

Fixes PR34950

llvm-svn: 315953
2017-10-16 23:07:15 +00:00
Faisal Vali 1826842865 [c++2a] Implement P0306 __VA_OPT__ (Comma omission and comma deletion)
This patch implements an extension to the preprocessor:

__VA_OPT__(contents) --> which expands into its contents if variadic arguments are supplied to the parent macro, or behaves as an empty token if none.

  - Currently this feature is only enabled for C++2a (this could be enabled, with some careful tweaks, for other dialects with the appropriate extension or compatibility warnings)

  - The patch was reviewed here: https://reviews.llvm.org/D35782 and asides from the above (and moving some of the definition and expansion recognition logic into the corresponding state machines), I believe I incorporated all of Richard's suggestions.

A few technicalities (most of which were clarified through private correspondence between rsmith, hubert and thomas) are worth mentioning.  Given:

    #define F(a,...) a #__VA_OPT__(a ## a)  a ## __VA_OPT__(__VA_ARGS__)

    - The call F(,) Does not supply any tokens for the variadic arguments and hence VA_OPT behaves as a placeholder.
    - When expanding VA_OPT (for e.g. F(,1) token pasting occurs eagerly within its contents if the contents need to be stringified.
    - A hash or a hashhash prior to VA_OPT does not inhibit expansion of arguments if they are the first token within VA_OPT.
    - When a variadic argument is supplied, argument substitution occurs within the contents as does stringification - and these resulting tokens are inserted back into the macro expansions token stream just prior to the entire stream being rescanned and concatenated.

See wg21.link/P0306 for further details on the feature.


Acknowledgment: This patch would have been poorer if not for Richard Smith's usual thoughtful analysis and feedback.
llvm-svn: 315840
2017-10-15 01:26:26 +00:00
Craig Topper 9c6a31ae1d [X86] Remove 'knm' defines from predefined-arch-macros.c test.
Direction seems to be that we dont' want to keep adding these, but I forgot to remove it from the test before I committed r315723.

llvm-svn: 315729
2017-10-13 18:38:10 +00:00
Craig Topper f8c10aa3a3 [X86] Add skeleton support for knm cpu
This adds support Knights Mill CPU. Preprocessor defines match gcc's implementation.

Differential Revision: https://reviews.llvm.org/D38813

llvm-svn: 315723
2017-10-13 18:14:24 +00:00
Craig Topper dfdafa2d32 [X86] Remove a few unnecessary check lines from the predefined-arch-macros test.
These were testing OS macros and clang/llvm macros.

llvm-svn: 315547
2017-10-12 02:06:17 +00:00
Saleem Abdulrasool 729379a1e1 Driver: hoist the `wchar_t` handling to the driver
Move the logic for determining the `wchar_t` type information into the
driver.  Rather than passing the single bit of information of
`-fshort-wchar` indicate to the frontend the desired type of `wchar_t`
through a new `-cc1` option of `-fwchar-type` and indicate the
signedness through `-f{,no-}signed-wchar`.  This replicates the current
logic which was spread throughout Basic into the
`RenderCharacterOptions`.

Most of the changes to the tests are to ensure that the frontend uses
the correct type.  Add a new test set under `test/Driver/wchar_t.c` to
ensure that we calculate the proper types for the various cases.

llvm-svn: 315126
2017-10-06 23:09:55 +00:00
Walter Lee fc7f8f25f3 Add support for Myriad ma2x8x series of CPUs
Summary:
Also:
- Add support for some older Myriad CPUs that were missing.
- Fix some incorrect compiler defines for exisitng CPUs.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D37551

llvm-svn: 314706
2017-10-02 18:50:57 +00:00
Eli Friedman 16fee08410 [Preprocessor] Preserve #pragma clang assume_nonnull in preprocessed output
Patch by Zbigniew Sarbinowski!

Differential Revision: https://reviews.llvm.org/D37861

llvm-svn: 314364
2017-09-27 23:29:37 +00:00
Michael Zuckerman 35731a0b84 [Clang] Adding missing feature to goldmont
Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c
llvm-svn: 314104
2017-09-25 13:49:32 +00:00
Sjoerd Meijer c05609ca36 This adds the _Float16 preprocessor macro definitions.
Differential Revision: https://reviews.llvm.org/D34695

llvm-svn: 313152
2017-09-13 15:23:19 +00:00
Petar Jovanovic 5076511ed6 [mips] Introducing option -mabs=[legacy/2008]
In patch r205628 using abs.[ds] instruction is forced, as they should behave
in accordance with flags Has2008 and ABS2008. Unfortunately for revisions
prior mips32r6 and mips64r6, abs.[ds] is not generating correct result when
working with NaNs. To generate a sequence which always produce a correct
result but also to allow user more control on how his code is compiled,
option -mabs is added where user can choose legacy or 2008.
By default legacy mode is used on revisions prior R6. Mips32r6 and mips64r6
use abs2008 mode by default.

Patch by Aleksandar Beserminji

Differential Revision: https://reviews.llvm.org/D35982

llvm-svn: 311669
2017-08-24 16:06:30 +00:00
Kuba Mracek 5b57633a45 [clang] Get rid of "%T" expansions
The %T lit expansion expands to a common directory shared between all the tests in the same directory, which is unexpected and unintuitive, and more importantly, it's been a source of subtle race conditions and flaky tests. In https://reviews.llvm.org/D35396, it was agreed that it would be best to simply ban %T and only keep %t, which is unique to each test. When a test needs a temporary directory, it can just create one using mkdir %t.

This patch removes %T in clang.

Differential Revision: https://reviews.llvm.org/D36437

llvm-svn: 310950
2017-08-15 19:47:06 +00:00
Martin Storsjo 31cac7a67c [AArch64] Add support for a MinGW AArch64 target
Differential Revision: https://reviews.llvm.org/D36364

llvm-svn: 310798
2017-08-13 19:42:17 +00:00
Stefan Maksimovic 76391b101d Revert r310057
Bring back changes which r304953 introduced since
they were in fact not the cause of failures described
in r310057 commit message.

llvm-svn: 310702
2017-08-11 11:03:54 +00:00
Martin Storsjo ba4431e842 [test] Remove an unintentional -x cl flag in an aarch64-windows test
This test was only intended to test compiling C, not OpenCL.

Differential Revision: https://reviews.llvm.org/D36363

llvm-svn: 310222
2017-08-06 19:57:49 +00:00
Yaxun Liu 39195062c2 Add OpenCL 2.0 atomic builtin functions as Clang builtin
OpenCL 2.0 atomic builtin functions have a scope argument which is ideally
represented as synchronization scope argument in LLVM atomic instructions.

Clang supports translating Clang atomic builtin functions to LLVM atomic
instructions. However it currently does not support synchronization scope
of LLVM atomic instructions. Without this, users have to use LLVM assembly
code to implement OpenCL atomic builtin functions.

This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin
functions, which supports generating LLVM atomic instructions with
synchronization scope operand.

Currently only constant memory scope argument is supported. Support of
non-constant memory scope argument will be added later.

Differential Revision: https://reviews.llvm.org/D28691

llvm-svn: 310082
2017-08-04 18:16:31 +00:00
Stefan Maksimovic 5c7aaa5ff3 Revert r304953 for release 5.0.0
This is causing failures when compiling clang with -O3
as one of the structures used by clang is passed by
value and uses the fastcc calling convention.

Faliures manifest for stage2 mips build.

llvm-svn: 310057
2017-08-04 12:37:34 +00:00
Walter Lee 4e93a6986e Define _GNU_SOURCE for RTEMS c++
Summary: This is required by the libc++ locale support.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D36121

llvm-svn: 309815
2017-08-02 14:36:52 +00:00
Martin Storsjo 588a3e5e6c [AArch64] Don't define __LP64__ when targeting Windows
Windows/ARM64 is a LLP64 environment, so don't set this default
define.

Differential Revision: https://reviews.llvm.org/D36098

llvm-svn: 309619
2017-07-31 20:40:53 +00:00
Martin Storsjo 42927caae1 [test] Fix mistagged CHECK-NOT-lines for AARCH64-DARWIN in Preprocessor/init.c
Differential Revision: https://reviews.llvm.org/D36099

llvm-svn: 309618
2017-07-31 20:40:48 +00:00
Brad Smith 76e6c98f33 Fix a typo.
llvm-svn: 309522
2017-07-30 20:33:06 +00:00
Erich Keane 2b9657b570 Remove Bitrig: Clang Changes
Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned.

Differential Revision: https://reviews.llvm.org/D35708

llvm-svn: 308797
2017-07-21 22:46:31 +00:00
Ulrich Weigand 76976a7920 [SystemZ] Add support for IBM z14 processor (2/3)
This patch extends the -fzvector language feature to enable the new
"vector float" data type when compiling at -march=z14.  This matches
the updated extension definition implemented by other compilers for
the platform, which is indicated to applications by pre-defining
__VEC__ to 10302 (instead of 10301).

llvm-svn: 308198
2017-07-17 17:46:47 +00:00
Ulrich Weigand cac24ab04c [SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor.  This part includes:
- Basic support for the new processor and its features.
- Support for low-level builtins mapped to new LLVM intrinsics.

Support for the -fzvector extension to vector float and the new
high-level vector intrinsics is provided by separate patches.

llvm-svn: 308197
2017-07-17 17:45:57 +00:00