Commit Graph

3124 Commits

Author SHA1 Message Date
Erik Pilkington a7641d97a7 NFC: Merge KEYOBJC and KEYARC
We used to only define ARC keywords in -fobjc-arc mode, but now that we define
them in ObjC mode, there isn't any reason to keep them seperate.

llvm-svn: 345646
2018-10-30 20:51:28 +00:00
Erik Pilkington fa98390b3c NFC: Remove the ObjC1/ObjC2 distinction from clang (and related projects)
We haven't supported compiling ObjC1 for a long time (and never will again), so
there isn't any reason to keep these separate. This patch replaces
LangOpts::ObjC1 and LangOpts::ObjC2 with LangOpts::ObjC.

Differential revision: https://reviews.llvm.org/D53547

llvm-svn: 345637
2018-10-30 20:31:30 +00:00
Bryan Chan 223307b3dc [AArch64] Implement FP16FML intrinsics
Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now).
Add two new type modifiers to NeonEmitter to handle the new prototypes.
Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the
intrinsics with the macro in arm_neon.h.

Based on a patch by Gao Yiling.

Differential Revision: https://reviews.llvm.org/D53633

llvm-svn: 345344
2018-10-25 23:47:00 +00:00
Erich Keane 19a8adc9bd Implement Function Multiversioning for Non-ELF Systems.
Similar to how ICC handles CPU-Dispatch on Windows, this patch uses the
resolver function directly to forward the call to the proper function.
This is not nearly as efficient as IFuncs of course, but is still quite
useful for large functions specifically developed for certain
processors.

This is unfortunately still limited to x86, since it depends on
__builtin_cpu_supports and __builtin_cpu_is, which are x86 builtins.

The naming for the resolver/forwarding function for cpu-dispatch was
taken from ICC's implementation, which uses the unmodified name for this
(no mangling additions).  This is possible, since cpu-dispatch uses '.A'
for the 'default' version.

In 'target' multiversioning, this function keeps the '.resolver'
extension in order to keep the default function keeping the default
mangling.

Change-Id: I4731555a39be26c7ad59a2d8fda6fa1a50f73284

Differential Revision: https://reviews.llvm.org/D53586

llvm-svn: 345298
2018-10-25 18:57:19 +00:00
Tim Renouf 632f35d495 Add gfx909 to GPU Arch
Subscribers: jholewinski, cfe-commits

Differential Revision: https://reviews.llvm.org/D53558

llvm-svn: 345198
2018-10-24 21:19:02 +00:00
Konstantin Zhuravlyov 06570954e2 AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMap
+ add required tests

llvm-svn: 345181
2018-10-24 19:07:56 +00:00
Aaron Ballman ad672ffb64 Support accepting __gnu__ as a scoped attribute namespace that aliases to gnu.
This is useful in libstdc++ to avoid clashes with identifiers in the user's namespace.

llvm-svn: 345132
2018-10-24 12:26:23 +00:00
Yaxun Liu 83b5f35d85 Add gfx904 and gfx906 to GPU Arch
Differential Revision: https://reviews.llvm.org/D53472

llvm-svn: 344996
2018-10-23 02:05:31 +00:00
Craig Topper 9ad1e8a93b [X86] Remove 'rtm' feature from KNL.
I'm unsure if KNL has this feature, but the backend never thought it did, only clang did. The predefined-arch-macros test lost the check for __RTM__ on KNL when it was removed Skylake CPUs in r344117.

I think we want to drop it from KNL for consistency with Skylake anyway regardless of how we got here.

llvm-svn: 344978
2018-10-23 00:15:37 +00:00
Krzysztof Parzyszek 57e6706e56 [Hexagon] Remove support for V4
llvm-svn: 344786
2018-10-19 15:36:45 +00:00
Eli Friedman 39ceea326d [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.
"aarch64-none-elf" is commonly used for AArch64 baremetal toolchains.

Differential Revision: https://reviews.llvm.org/D53348

llvm-svn: 344710
2018-10-17 21:07:11 +00:00
Ulrich Weigand 2927071750 [SystemZ] Actually enable -mzvector keywords
It appears when initially committing the support for the IBM Z vector
extension language, one critical line was lost, causing the specific
keywords __vector, __bool, and vec_step to not actually be enabled.
(Note that this does not affect "vector" and "bool"!)

Unfortunately, this was not caught by any tests either.  (All existing
Z vector tests just use the regular "vector" and "bool" keywords ...)

Fixed by adding the missing line and updating the tests.

llvm-svn: 344611
2018-10-16 14:57:20 +00:00
Simon Atanasyan db81c7b9c9 [mips] Fix handling of GNUABIN32 environment in a target triple
The `GNUABIN32` environment in a target triple implies using the N32
ABI. This patch adds support for this environment and switches on N32
ABI if necessary.

Patch by Patch by YunQiang Su.

Differential revision: https://reviews.llvm.org/D51464

llvm-svn: 344570
2018-10-15 22:43:23 +00:00
Patrick Lyster 3fe9e396f4 Add support for 'dynamic_allocators' clause on 'requires' directive. Differential Revision: https://reviews.llvm.org/D53079
llvm-svn: 344249
2018-10-11 14:41:10 +00:00
Jonas Devlieghere fc51490baf Lift VFS from clang to llvm (NFC)
This patch moves the virtual file system form clang to llvm so it can be
used by more projects.

Concretely the patch:
 - Moves VirtualFileSystem.{h|cpp} from clang/Basic to llvm/Support.
 - Moves the corresponding unit test from clang to llvm.
 - Moves the vfs namespace from clang::vfs to llvm::vfs.
 - Formats the lines affected by this change, mostly this is the result of
   the added llvm namespace.

RFC on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/126657.html

Differential revision: https://reviews.llvm.org/D52783

llvm-svn: 344140
2018-10-10 13:27:25 +00:00
Craig Topper 153b53adfa [X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz

This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.

Matches https://reviews.llvm.org/D53041

Patch by Thiago Macieira

Reviewers: erichkeane, craig.topper

Reviewed By: craig.topper

Subscribers: lebedev.ri, cfe-commits

Differential Revision: https://reviews.llvm.org/D53042

llvm-svn: 344117
2018-10-10 07:43:45 +00:00
Ali Tamur bc1cd929bf Introduce code_model macros
Summary:
gcc defines macros such as __code_model_small_ based on the user passed command line flag -mcmodel. clang accepts a flag with the same name and similar effects, but does not generate any macro that the user can use. This cl narrows the gap between gcc and clang behaviour.

However, achieving full compatibility with gcc is not trivial: The set of valid values for mcmodel in gcc and clang are not equal. Also, gcc defines different macros for different architectures. In this cl, we only tackle an easy part of the problem and define the macro only for x64 architecture. When the user does not specify a mcmodel, the macro for small code model is produced, as is the case with gcc.

Reviewers: compnerd, MaskRay

Reviewed By: MaskRay

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D52920

llvm-svn: 344000
2018-10-08 22:25:20 +00:00
Patrick Lyster 6bdf63bd32 [OPENMP] Add reverse_offload clause to requires directive
llvm-svn: 343711
2018-10-03 20:07:58 +00:00
Patrick Lyster 4a370b9f63 Add support for unified_shared_memory clause on requires directive
llvm-svn: 343472
2018-10-01 13:47:43 +00:00
Fangrui Song 1d38c13f6e Use the container form llvm::sort(C, ...)
There are a few leftovers of rC343147 that are not (\w+)\.begin but in
the form of ([-[:alnum:]>.]+)\.begin or spanning two lines. Change them
to use the container form in this commit. The 12 occurrences have been
inspected manually for safety.

llvm-svn: 343425
2018-09-30 21:41:11 +00:00
Craig Topper 6ad9220067 [X86] Add the movbe instruction intrinsics from icc.
These intrinsics exist in icc. They can be found on the Intel Intrinsics Guide website.

All the backend support is in place to pattern match a load+bswap or a bswap+store pattern to the MOVBE instructions. So we just need to get the frontend to emit the correct IR. The pointer arguments in icc are declared as void so I had to jump through a packed struct to forcing a specific alignment on the load/store. Same trick we use in the unaligned vector load/store intrinsics

Differential Revision: https://reviews.llvm.org/D52586

llvm-svn: 343343
2018-09-28 17:09:51 +00:00
Sam Parker d476cd304b [ARM] Prevent DSP and SIM32 being set for v6m
My previous change (rL340911) set the two features for architectures
>= 6, which wrongly includes v6m. Now set to >= 6 and not Cortex-M.

Differential Revision: https://reviews.llvm.org/D52644

llvm-svn: 343309
2018-09-28 10:18:02 +00:00
Fangrui Song 55fab260ca llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.

Reviewers: rsmith, #clang, dblaikie

Reviewed By: rsmith, #clang

Subscribers: mgrang, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D52576

llvm-svn: 343147
2018-09-26 22:16:28 +00:00
Oliver Stannard a30b48d020 [ARM/AArch64][v8.5A] Add Armv8.5-A target
This patch allows targetting Armv8.5-A from Clang. Most of the
implementation is in TargetParser, so this is mostly just adding tests.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52491

llvm-svn: 343111
2018-09-26 14:20:29 +00:00
Kelvin Li 1408f91a25 [OPENMP] Add support for OMP5 requires directive + unified_address clause
Add support for OMP5.0 requires directive and unified_address clause.
Patches to follow will include support for additional clauses.

Differential Revision: https://reviews.llvm.org/D52359

llvm-svn: 343063
2018-09-26 04:28:39 +00:00
Artem Belevich 44ecb0e3c2 [CUDA] Added basic support for compiling with CUDA-10.0
llvm-svn: 342924
2018-09-24 23:10:44 +00:00
Eric Liu 495847ad77 [VFS] Use llvm::StringMap instead of std::map. NFC
llvm-svn: 342889
2018-09-24 14:52:11 +00:00
Bruno Ricci 366ba73018 [AST] Various optimizations + refactoring in DeclarationName(Table)
Introduce the following optimizations in DeclarationName(Table):

 1. Store common kinds inline in DeclarationName instead of
    DeclarationNameExtra. Currently the kind of C++ constructor, destructor,
    conversion function and overloaded operator names is stored in
    DeclarationNameExtra. Instead store it inline in DeclarationName.
    To do this align IdentifierInfo, CXXSpecialName, DeclarationNameExtra
    and CXXOperatorIdName to 8 bytes so that we can use the lower 3 bits of
    DeclarationName::Ptr. This is already the case on 64 bits archs anyway.
    This also allow us to remove DeclarationNameExtra from CXXSpecialName
    and CXXOperatorIdName, which shave off a pointer from CXXSpecialName. 

 2. Synchronize the enumerations DeclarationName::NameKind,
    DeclarationName::StoredNameKind and Selector::IdentifierInfoFlag.
    This makes DeclarationName::getNameKind much more efficient since we can
    replace the switch table by a single comparison and an addition.

 3. Put the overloaded operator names inline in DeclarationNameTable to remove
    an indirection. This increase the size of DeclarationNameTable a little
    bit but this is not important since it is only used in ASTContext, and
    never copied nor moved from. This also get rid of the last dynamic
    allocation in DeclarationNameTable.

Altogether these optimizations cut the run time of parsing all of Boost by
about 0.8%. While we are at it, do the following NFC modifications:

 1. Put the internal classes CXXSpecialName, CXXDeductionGuideNameExtra,
    CXXOperatorIdName, CXXLiteralOperatorIdName and DeclarationNameExtra
    in a namespace detail since these classes are only meant to be used by
    DeclarationName and DeclarationNameTable. Make this more explicit by making
    the members of these classes private and friending DeclarationName(Table).

 2. Make DeclarationName::getFETokenInfo a non-template since every users are
    using it to get a void *. It was supposed to be used with a type to avoid
    a subsequent static_cast.

 3. Change the internal functions DeclarationName::getAs* to castAs* since when
    we use them we already know the correct kind. This has no external impact
    since all of these are private.

Reviewed By: erichkeane, rjmccall

Differential Revision: https://reviews.llvm.org/D52267

llvm-svn: 342729
2018-09-21 12:53:22 +00:00
Saleem Abdulrasool 6183c6316d Basic: correct `__WINT_TYPE__` on Windows
Windows uses `unsigned short` for `wint_t`.  Correct the type definition as
vended by the compiler.  This type is defined in corecrt.h and is
unconditionally typedef'ed.  cl does not have an equivalent to `__WINT_TYPE__`
which is why this was never detected.

llvm-svn: 342557
2018-09-19 16:18:55 +00:00
Bruno Cardoso Lopes e7240f024f [Modules] Add platform and environment features to requires clause
Allows module map writers to add build requirements based on
platform/os. This helps when target features and language dialects
aren't enough to conditionalize building a module, among other things,
it allow module maps for different platforms to live in the same file.

rdar://problem/43909745

Differential Revision: https://reviews.llvm.org/D51910

llvm-svn: 342499
2018-09-18 17:11:13 +00:00
Sam McCall 0ae00567ba [VFS] vfs::directory_iterator yields path and file type instead of full Status
Summary:
Most callers I can find are using only `getName()`. Type is used by the
recursive iterator.

Now we don't have to call stat() on every listed file (on most platforms).
Exceptions are e.g. Solaris where readdir() doesn't include type information.
On those platforms we'll still stat() - see D51918.

The result is significantly faster (stat() can be slow).
My motivation: this may allow us to improve clang IO on large TUs with long
include search paths. Caching readdir() results may allow us to skip many stat()
and open() operations on nonexistent files.

Reviewers: bkramer

Subscribers: fedor.sergeev, cfe-commits

Differential Revision: https://reviews.llvm.org/D51921

llvm-svn: 342232
2018-09-14 12:47:38 +00:00
Richard Smith 841dbda3ba When we leave a module header, make that header visible in its
includer's context, even if its overall module is unavailable.

llvm-svn: 342096
2018-09-12 23:09:23 +00:00
Erich Keane 7582222691 Move AESNI generation to Skylake and Goldmont
The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "Intel® AES New Instructions" "No".

This matches GCC commit
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html

[1] https://en.wikipedia.org/wiki/AES_instruction_set

Patch By: thiagomacieira
Differential Revision: https://reviews.llvm.org/D51510

llvm-svn: 341862
2018-09-10 21:12:21 +00:00
Eric Liu cea78e3a19 [VFS] Cache the current working directory for the real FS.
Reviewers: sammccall

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51641

llvm-svn: 341455
2018-09-05 09:45:27 +00:00
Ilya Biryukov d5554c512d Adding HardLink Support to VirtualFileSystem.
Summary:
Added support of creating a hardlink from one file to another file.
After a hardlink is added between two files, both file will have the same:
  1. UniqueID (inode)
  2. Size
  3. Buffer

This will bring replay of compilation closer to the actual compilation. There are instances where clang checks for the UniqueID of the file/header to be loaded which leads to a different behavior during replay as all files have different UniqueIDs.

Patch by Utkarsh Saxena!

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51359

llvm-svn: 341366
2018-09-04 14:15:53 +00:00
Stephen Kelly b8e0886006 Add dump() method for SourceRange
Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D50662

llvm-svn: 341140
2018-08-30 23:10:52 +00:00
Sam Parker 96d4872899 [ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
ARM_FEATURE_DSP is already set for targets with the +dsp feature. In
the backend, this target feature is also used to represent the
availability of the of the instructions that the ACLE guard through
the __ARM_FEATURE_SIMD32 macro. We don't have any cores that
implement one and not the other, so set this macro for cores later
than V6 or for Cortex-M cores that the target parser, or user, reports
that the 'dsp' instructions are supported.

Differential Revision: https://reviews.llvm.org/D51093

llvm-svn: 340911
2018-08-29 10:39:03 +00:00
Hans Wennborg b4278895a4 Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets."
As reported on http://lists.llvm.org/pipermail/cfe-dev/2018-August/058760.html,
this broke i386-freebsd11 due to its lack of atomic 64 bit primitives.

While that's not really this commit's fault, let's revert back to the old
behaviour until this can be fixed. This means generating cmpxchg8b etc for i386
and i486 which don't technically support those, but that's been the behaviour
for a long time, so a little longer probably doesn't hurt that much.

> Adjust MaxAtomicInlineWidth for i386/i486 targets.
>
> This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6.
> Currently, all  MaxAtomicInlineWidth of x86-32 targets are set to 64. However,
> i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg.
> So in this patch MaxAtomicInlineWidth is reset as follows:
> For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported.
> For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg.
> For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b.
>
> Differential Revision: https://reviews.llvm.org/D42154

llvm-svn: 340666
2018-08-24 22:46:33 +00:00
Eric Liu 8e44a8e7a0 Fix build bot after r340598.
Revert to the original behavior: only calculate real file path when
file is opened and avoid using InterndPath for real path calculation.

llvm-svn: 340602
2018-08-24 09:53:44 +00:00
Eric Liu 411e710074 [FileManager] Do not call 'real_path' in getFile().
Summary:
This partially rolls back the change in D48903:
89aa7f45a1 (diff-0025af005307891b5429b6a834823d5eR318)

`real_path` can be very expensive on real file systems, and calling it on each
opened file can slow down the compilation. This also slows down deserialized
ASTs for which real paths need to be recalculated for each input files again.

For clangd code completion latency (using preamble):
Before
{F7039629}
After
{F7039630}

Reviewers: ilya-biryukov, simark

Reviewed By: ilya-biryukov

Subscribers: kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51159

llvm-svn: 340598
2018-08-24 08:59:54 +00:00
Chandler Carruth ae0cafece8 [x86/retpoline] Split the LLVM concept of retpolines into separate
subtarget features for indirect calls and indirect branches.

This is in preparation for enabling *only* the call retpolines when
using speculative load hardening.

I've continued to use subtarget features for now as they continue to
seem the best fit given the lack of other retpoline like constructs so
far.

The LLVM side is pretty simple. I'd like to eventually get rid of the
old feature, but not sure what backwards compatibility issues that will
cause.

This does remove the "implies" from requesting an external thunk. This
always seemed somewhat questionable and is now clearly not desirable --
you specify a thunk the same way no matter which set of things are
getting retpolines.

I really want to keep this nicely isolated from end users and just an
LLVM implementation detail, so I've moved the `-mretpoline` flag in
Clang to no longer rely on a specific subtarget feature by that name and
instead to be directly handled. In some ways this is simpler, but in
order to preserve existing behavior I've had to add some fallback code
so that users who relied on merely passing -mretpoline-external-thunk
continue to get the same behavior. We should eventually remove this
I suspect (we have never tested that it works!) but I've not done that
in this patch.

Differential Revision: https://reviews.llvm.org/D51150

llvm-svn: 340515
2018-08-23 06:06:38 +00:00
Stefan Maksimovic eb63256095 [clang][mips] Set __mips_fpr correctly for -mfpxx
Set __mips_fpr to 0 if o32 ABI is used with either -mfpxx
or none of -mfp32, -mfpxx, -mfp64 being specified.

Introduce additional checks:
-mfpxx is only to be used in conjunction with the o32 ABI.
report an error when incompatible options are provided.

Formerly no errors were raised when combining n32/n64 ABIs
with -mfp32 and -mfpxx.

There are other cases when __mips_fpr should be set to 0
that are not covered, ex. using o32 on a mips64 cpu
which is valid but not supported in the backend as of yet.

Differential Revision: https://reviews.llvm.org/D50557

llvm-svn: 340391
2018-08-22 09:26:25 +00:00
Matt Arsenault b666e73dd9 AMDGPU: Move target code into TargetParser
llvm-svn: 340292
2018-08-21 16:13:29 +00:00
Matt Arsenault 89e833c662 AMDGPU: Correct errors in device table
llvm-svn: 339934
2018-08-16 20:19:47 +00:00
Stephen Kelly 3124ce724a Add a newline to SourceLocation dump output
Summary:
Migrate callers to print().

dump() should be useful to downstreams and third parties as a debugging
aid.  Everyone trips up on this and creates confusing output.

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D50661

llvm-svn: 339810
2018-08-15 20:32:06 +00:00
Matt Arsenault 45bc148093 AMDGPU: Fix enabling denormals by default on pre-VI targets
Fast FMAF is not a sufficient condition to enable denormals.
Before VI, enabling denormals caused F32 instructions to
run at F64 speeds.

llvm-svn: 339278
2018-08-08 17:48:37 +00:00
Volodymyr Sapsai c1bf7aad49 [NFC][VFS] Fix typos in comments.
llvm-svn: 339215
2018-08-08 01:28:37 +00:00
Volodymyr Sapsai 3aa88b5bd9 [VFS] Unify iteration code for VFSFromYamlDirIterImpl, NFC intended.
First and subsequent iteration steps are similar, capture this similarity.

Reviewers: bruno, benlangmuir

Reviewed By: bruno

Subscribers: dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D50118

llvm-svn: 339199
2018-08-07 23:00:40 +00:00
Volodymyr Sapsai 3b2f6a4b29 [VFS] Emit an error when entry at root level uses a relative path.
Entries with only a filename prevent us from building a file system tree and
cause the assertion

> Assertion failed: (NewParentE && "Parent entry must exist"), function uniqueOverlayTree, file clang/lib/Basic/VirtualFileSystem.cpp, line 1303.

Entries with a relative path are simply not discoverable during header search.

rdar://problem/28990865

Reviewers: bruno, benlangmuir

Reviewed By: bruno

Subscribers: dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D49518

llvm-svn: 339164
2018-08-07 19:05:41 +00:00
Matt Arsenault 31c895ecdf AMDGPU: Add builtin for s_dcache_wb
llvm-svn: 339110
2018-08-07 07:49:13 +00:00