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42099 Commits

Author SHA1 Message Date
Evan Cheng 412e37bd34 Code refactoring. 
llvm-svn: 116002
 2010-10-07 23:12:15 +00:00
Chris Lattner 1c090c00bc Reduce casting in various tables by defining the table 
with the right types.

llvm-svn: 116001
 2010-10-07 23:08:41 +00:00
Chris Lattner 70a7b54f97 simplify code: don't build up vector only to assert it is empty. 
llvm-svn: 115997
 2010-10-07 22:26:19 +00:00
Owen Anderson df7a4f2515 Now with fewer extraneous semicolons! 
llvm-svn: 115996
 2010-10-07 22:25:06 +00:00
Jim Grosbach 91029094e0 Trivial MC code emitter shell. No instruction forms actually handled yet. 
llvm-svn: 115993
 2010-10-07 22:12:50 +00:00
Evan Cheng 139edad73a Correctly check if a path is a directory. Fix by Brian Korver. 
llvm-svn: 115991
 2010-10-07 22:05:57 +00:00
Devang Patel 3a24f9230a Provie a clearner interface so that FE can decide whether a function has prototype or not. 
llvm-svn: 115988
 2010-10-07 22:03:01 +00:00
Jim Grosbach 8aed386d82 Include the auto-generated bits for machine encoding. 
llvm-svn: 115987
 2010-10-07 21:57:55 +00:00
Eric Christopher 3e1e447ca2 Remember to promote load/store types for stack to register size. 
llvm-svn: 115984
 2010-10-07 21:40:18 +00:00
Chris Lattner f5c60d8156 convert test to use the existing classes that the multipatterns 
use.  Since TEST is completely different than all other binops,
don't define a multipattern for it.

This completes factorization of binops.

llvm-svn: 115982
 2010-10-07 21:31:03 +00:00
Chris Lattner ae8d67d3bb convert cmp to use a multipattern 
llvm-svn: 115978
 2010-10-07 20:56:25 +00:00
Evan Cheng 5c31bf0619 Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
llvm-svn: 115977
 2010-10-07 20:50:20 +00:00
Jim Grosbach 07b5b1802e ARM instruction don't have instruction prefixes, so remove the helper functions 
for them from the MCCodeEmitter.

llvm-svn: 115975
 2010-10-07 20:41:30 +00:00
Dan Gohman 0df7ea4c24 Move tool_output_file into its own file. 
llvm-svn: 115973
 2010-10-07 20:32:40 +00:00
Owen Anderson 9786868939 Add initialization routines for Instrumentation. 
llvm-svn: 115971
 2010-10-07 20:17:24 +00:00
Chris Lattner a8c0bbb869 reduce redundancy between pattern copies. 
llvm-svn: 115968
 2010-10-07 20:14:23 +00:00
Chris Lattner 9fece2bea2 the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument. 
llvm-svn: 115967
 2010-10-07 20:06:24 +00:00
Owen Anderson 546c11c72f Improve comment. 
llvm-svn: 115966
 2010-10-07 20:05:18 +00:00
Owen Anderson f7ef5dfccc Add initialization routines to InstCombine. 
llvm-svn: 115965
 2010-10-07 20:04:55 +00:00
Chris Lattner 752b60bc01 convert adc/sbb to a multipattern. Because the adde/sube nodes 
are not defined as returning EFLAGS (like add_flag and friends),
the entire multipattern and several of the subclasses need to be
cloned.

This could be handled through better instantiation support in tblgen,
but it isn't meta enough.

llvm-svn: 115964
 2010-10-07 20:01:55 +00:00
Owen Anderson 44621e4306 Add initialization routines for VMCore. 
llvm-svn: 115963
 2010-10-07 19:51:21 +00:00
Owen Anderson e9d5d0736c Add initialization routines for Target. 
llvm-svn: 115957
 2010-10-07 18:50:11 +00:00
Jakob Stoklund Olesen c6a6e9ba7c Fix obvious mistake pointed out by Michael Spencer. 
llvm-svn: 115952
 2010-10-07 18:47:10 +00:00
Jakob Stoklund Olesen 9bfd9679f9 Print more loop info. 
llvm-svn: 115951
 2010-10-07 18:47:07 +00:00
Jakob Stoklund Olesen 7c31730053 Print out MBB number when rewriting. 
llvm-svn: 115950
 2010-10-07 18:47:05 +00:00
Owen Anderson 80fc0762f3 Add initialization routines for CodeGen. 
llvm-svn: 115949
 2010-10-07 18:41:20 +00:00
Owen Anderson 98eb3ec6c5 Add an implementation of the initialization routine for IPA. 
llvm-svn: 115947
 2010-10-07 18:31:27 +00:00
Owen Anderson 6875c2ea26 Add initialization routines for Analysis and IPA. 
llvm-svn: 115946
 2010-10-07 18:31:00 +00:00
Owen Anderson bf70a035f0 Add an initialization routine for libLLVMipo.a 
llvm-svn: 115933
 2010-10-07 18:09:59 +00:00
Jakob Stoklund Olesen 49715fd494 Cache interval iterators in SplitEditor::addTruncSimpleRange so we only have to 
do one find().

llvm-svn: 115929
 2010-10-07 17:56:39 +00:00
Jakob Stoklund Olesen 9575af4b06 Clean up debug printing. 
llvm-svn: 115928
 2010-10-07 17:56:35 +00:00
Owen Anderson 4698c5d7f7 Next step on the getting-rid-of-static-ctors train: begin adding per-library 
initialization functions that initialize the set of passes implemented in
that library.  Add C bindings for these functions as well.

llvm-svn: 115927
 2010-10-07 17:55:47 +00:00
Owen Anderson 82d38df40c Fix a warning when building with clang++. 
llvm-svn: 115924
 2010-10-07 17:04:18 +00:00
Kalle Raiskila ac1ffa27b6 Add the missing cases to the type->registerclass conversion function. 
llvm-svn: 115921
 2010-10-07 16:32:42 +00:00
Kalle Raiskila a845022ddd Implement two virtual functions in SPUTargetLowering. 
Before the implementation of isLegalAddressingMode, some rare cases 
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a 
bad TargetLowering, or if the bug is elsewhere and this patch just 
hides it.

llvm-svn: 115919
 2010-10-07 16:24:35 +00:00
NAKAMURA Takumi 87002b592e Minor cosmetic change: fix DOSish \r\n. 
llvm-svn: 115910
 2010-10-07 07:21:04 +00:00
Michael J. Spencer 1666b61357 MC-COFF: Fix symbol aliases. Fixes PR8251. 
llvm-svn: 115909
 2010-10-07 06:29:33 +00:00
Eric Christopher a2583ea9f2 Use the correct register class for load instructions - fixes 
compilation of MultiSource/Benchmarks/Bullet.

llvm-svn: 115907
 2010-10-07 05:50:44 +00:00
Eric Christopher 76a9752d45 Use the correct register class here. 
llvm-svn: 115906
 2010-10-07 05:39:19 +00:00
Eric Christopher a98be90efe Use the thumb2 conditional move instruction. 
llvm-svn: 115905
 2010-10-07 05:31:49 +00:00
Eric Christopher 6d74673366 Remove in-progress assertion, add TODO. 
llvm-svn: 115904
 2010-10-07 05:14:08 +00:00
Owen Anderson 5e19bfcde3 Move the pass initialization helper functions into the llvm namespace, and add 
a header declaring them all.  This is also where we will declare per-library pass-set
initializer functions down the road.

llvm-svn: 115900
 2010-10-07 04:13:08 +00:00
Evan Cheng 1958cefd69 Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc. 
llvm-svn: 115898
 2010-10-07 01:50:48 +00:00
Chris Lattner 67677515ac add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS, 
allowing us to convert ADD over.  deletes 160 lines of .td file.

llvm-svn: 115897
 2010-10-07 01:37:01 +00:00
Chris Lattner 4fc52f6fa0 Fix a few issues in ArithBinOpEFLAGS that made it specific to and. 
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.

This removes 500 lines from the .td file.  Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.

llvm-svn: 115896
 2010-10-07 01:26:27 +00:00
Chris Lattner 26d6a0449a Convert 'and' to single instance of a multipattern 
which instantiates the 34 versions of and all in one
swoop.  The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.

No change in the generated .inc files.

llvm-svn: 115893
 2010-10-07 01:10:20 +00:00
Jim Grosbach 5b255c2dd6 Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode. 
llvm-svn: 115890
 2010-10-07 00:53:56 +00:00
Chris Lattner b71a77d7b8 add a new BinOpAI class to represent the immediate form that directly acts on EAX. 
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.

llvm-svn: 115885
 2010-10-07 00:43:39 +00:00
Jim Grosbach 742adc328a Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Chris Lattner 894d2e6146 add a bunch of classes for other common patterns. 
As usual, no change in generated .inc files.

llvm-svn: 115882
 2010-10-07 00:35:28 +00:00