Commit Graph

15803 Commits

Author SHA1 Message Date
Chad Rosier 4106917355 [avx] Add patterns for combining vextractf128 + vmovaps/vmovups/vmobdqu to
vextractf128 with 128-bit mem dest.

Combines

	vextractf128 $0, %ymm0, %xmm0
	vmovaps %xmm0, (%rdi)

to

    vextractf128 $0, %ymm0, (%rdi)

rdar://11082570

llvm-svn: 153139
2012-03-20 21:43:40 +00:00
Jim Grosbach 1283317db4 Assembler should accept redefinitions of unused variable symbols.
rdar://11027851

llvm-svn: 153137
2012-03-20 21:33:21 +00:00
Andrew Trick f7711010e1 LoopSimplify bug fix. Handle indirect loop back edges.
Do not call SplitBlockPredecessors on a loop preheader when one of the
predecessors is an indirectbr. Otherwise, you will hit this assert:
!isa<IndirectBrInst>(Preds[i]->getTerminator()) && "Cannot split an edge from an IndirectBrInst"

llvm-svn: 153134
2012-03-20 21:24:52 +00:00
Andrew Trick 9c45706baf LSR: teach isSimplifiedLoopNest to handle PHI IVUsers.
llvm-svn: 153132
2012-03-20 21:24:44 +00:00
Andrew Trick 3660735e18 LSR: fix IVUsers isSimplifiedLoopNest to perform a full domtree walk
instead of skipping the current loop.

My prior fix was incomplete because of an overzealous compile-time optimization:
Better fix for: <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce

llvm-svn: 153131
2012-03-20 21:24:40 +00:00
Chad Rosier 5a6011267a [avx] Move the vextractf128 patterns closer to the vextractf128 def. Remove
whitespace from test case.  No functional change intended.

llvm-svn: 153103
2012-03-20 18:24:55 +00:00
Kevin Enderby 816ca27ef6 Fix assembling ARM vst2 instructions with double-spaced registers.
llvm-svn: 153099
2012-03-20 17:41:51 +00:00
Jim Grosbach 997614f597 ARM non-scattered MachO relocations for movw/movt.
Needed when building -mdynamic-no-pic code.

rdar://10459256

llvm-svn: 153097
2012-03-20 17:25:45 +00:00
Chad Rosier 58a7c9fd3e Fix test.
llvm-svn: 153095
2012-03-20 17:20:46 +00:00
Chad Rosier 07a4cb9382 [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.
This results in things such as

	vmovups	16(%rdi), %xmm0
	vinsertf128	$1, %xmm0, %ymm0, %ymm0

to be combined to

    vinsertf128	$1, 16(%rdi), %ymm0, %ymm0

rdar://11076953

llvm-svn: 153092
2012-03-20 17:08:51 +00:00
Silviu Baranga 32a49333ec The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
llvm-svn: 153089
2012-03-20 15:54:56 +00:00
Bill Wendling 7315c4b9cd It's possible to have a constant expression who's size is quite big (e.g.,
i128). In that case, we may not be able to print out the MCExpr as an
expression. For instance, we could have an MCExpr like this:

    0xBEEF0000BEEF0000 | (0xBEEF0000BEEF0000 << 64)

The MCExpr printer handles sizes up to 64-bits, but this expression would
require 128-bits. In this situation, try to evaluate the constant expression and
emit that as the value into 64-bit chunks.
<rdar://problem/11070338>

llvm-svn: 153081
2012-03-20 08:56:43 +00:00
Anton Korobeynikov 3edd854d64 Perform mul combine when multiplying wiht negative constants.
Patch by Weiming Zhao!
This fixes PR12212

llvm-svn: 153049
2012-03-19 19:19:50 +00:00
NAKAMURA Takumi bed1cb1e13 llvm/test/DebugInfo: Move two tests to DebugInfo/X86. They are X86-dependent.
llvm-svn: 153038
2012-03-19 16:16:03 +00:00
Preston Gurd 48ccc4df0b This patch adds X86 instruction itineraries for non-pseudo opcodes in
X86InstrCompiler.td.
 
It also adds –mcpu-generic to the legalize-shift-64.ll test so the test
will pass if run on an Intel Atom CPU, which would otherwise
produce an instruction schedule which differs from that which the test expects.

llvm-svn: 153033
2012-03-19 14:10:12 +00:00
Nick Lewycky fa30607eca Factor out the multiply analysis code in ComputeMaskedBits and apply it to the
overflow checking multiply intrinsic as well.

Add a test for this, updating the test from grep to FileCheck.

llvm-svn: 153028
2012-03-18 23:28:48 +00:00
Jim Grosbach 2c8e0ac85c MC asm parser macro argument count was wrong when empty.
evaluated to '1' when the argument list was empty (should be '0').

rdar://11057257

llvm-svn: 152967
2012-03-17 00:11:42 +00:00
Jim Grosbach 905686a82a ARM ldm/stm register lists can be out of order.
It's not a good style idea, as the registers will be laid down in memory in
numerical order, not the order they're in the list, but it's legal. vldm/vstm
are stricter.

rdar://11064740

llvm-svn: 152943
2012-03-16 20:48:38 +00:00
Bill Wendling 55b6b2b6a9 Revert r152907.
llvm-svn: 152935
2012-03-16 18:20:54 +00:00
Bill Wendling a2a26b546c The alignment of the pointer part of the store instruction may have an
alignment. If that's the case, then we want to make sure that we don't increase
the alignment of the store instruction. Because if we increase it to be "more
aligned" than the pointer, code-gen may use instructions which require a greater
alignment than the pointer guarantees.
<rdar://problem/11043589>

llvm-svn: 152907
2012-03-16 07:40:08 +00:00
Chandler Carruth b37fc13a36 Rip out support for 'llvm.noinline'. This thing has a strange history...
It was added in 2007 as the first cut at supporting no-inline
attributes, but we didn't have function attributes of any form at the
time. However, it was added without any mention in the LangRef or other
documentation.

Later on, in 2008, Devang added function notes for 'inline=never' and
then turned them into proper function attributes. From that point
onward, as far as I can tell, the world moved on, and no one has touched
'llvm.noinline' in any meaningful way since.

It's time has now come. We have had better mechanisms for doing this for
a long time, all the frontends I'm aware of use them, and this is just
holding back progress. Given that it was never a documented feature of
the IR, I've provided no auto-upgrade support. If people know of real,
in-the-wild bitcode that relies on this, yell at me and I'll add it, but
I *seriously* doubt anyone cares.

llvm-svn: 152904
2012-03-16 06:10:15 +00:00
Andrew Trick 070e540a3e LSR fix: Add isSimplifiedLoopNest to IVUsers analysis.
Only record IVUsers that are dominated by simplified loop
headers. Otherwise SCEVExpander will crash while looking for a
preheader.

I previously tried to work around this in LSR itself, but that was
insufficient. This way, LSR can continue to run if some uses are not
in simple loops, as long as we don't attempt to analyze those users.

Fixes <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce

llvm-svn: 152892
2012-03-16 03:16:56 +00:00
Eli Friedman e06535b2f6 In InstCombiner::visitOr, make sure we reverse the operand swap used for checking for or-of-xor operations after those checks; a later check expects that any constant will be in Op1. PR12234.
llvm-svn: 152884
2012-03-16 00:52:42 +00:00
Jim Grosbach 7cb9a13b02 ARM optional operand on MRC/MCR assembly instructions.
rdar://11058464

llvm-svn: 152883
2012-03-16 00:45:58 +00:00
Jim Grosbach 24d90e2ddc ARM vmrs system registers mvfr0 and mvfr1 handling.
rdar://11058464

llvm-svn: 152881
2012-03-16 00:27:18 +00:00
Eric Christopher a4a0cf8394 Do the right thing on NULL uint64 fields.
Patch by Clemens Hammacher!

Fixes PR12243

llvm-svn: 152880
2012-03-16 00:21:54 +00:00
Eric Christopher 7734ca2891 For types with a parent of the compile unit make sure and emit
the DECL information.

rdar://10855921

llvm-svn: 152876
2012-03-15 23:55:40 +00:00
Chad Rosier 26d05887d9 [fast-isel] Address Eli's comments for r152847. Specifically, add a test case
and still allow immediate encoding, just not with cmn.
rdar://11038907

llvm-svn: 152869
2012-03-15 22:54:20 +00:00
Jim Grosbach d28888dd77 ARM case-insensitive checking for APSR_nzcv.
rdar://11056591

llvm-svn: 152846
2012-03-15 21:34:14 +00:00
Matt Beaumont-Gay 18abf74edd line endings
llvm-svn: 152832
2012-03-15 20:24:29 +00:00
Lang Hames c35ee8b54a Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
register allocation by allowing all 32 D-registers to be used. Patch by Cameron
Zwarich.

llvm-svn: 152824
2012-03-15 18:49:02 +00:00
Kristof Beyls 327d2f9da5 Fix VCVT decoding (between floating-point and fixed-point, Floating-point). Patch by Richard Barton.
llvm-svn: 152814
2012-03-15 17:50:29 +00:00
Rafael Espindola f58927855b Short term fix for pr12270 before we change dominates to handle unreachable
code.
While here, reduce indentation.

llvm-svn: 152803
2012-03-15 15:52:59 +00:00
Nadav Rotem 6fd1d32c63 When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.
llvm-svn: 152784
2012-03-15 08:49:06 +00:00
Eric Christopher 7dd54fb695 Revert the removal of DW_AT_MIPS_linkage_name when we aren't putting
out the DW_AT_name. Older gdbs unfortunately still use it to
disambiguate member functions in templated classes (gdb.cp/templates.exp).

rdar://11043421 (which is now deferred for a bit)

llvm-svn: 152782
2012-03-15 08:19:33 +00:00
Chad Rosier b9b73170e3 [avx] Add patterns for VINSERTF128rm.
This results in things such as

	vmovaps	-96(%rbx), %xmm1
	vinsertf128	$1, %xmm1, %ymm0, %ymm0

to be combined to
         
	vinsertf128	$1, -96(%rbx), %ymm0, %ymm0

rdar://10643481

llvm-svn: 152762
2012-03-15 00:45:30 +00:00
Aaron Ballman a733297fa6 Fixed a transform crash when setting a negative size value for memset. Fixes PR12202.
llvm-svn: 152756
2012-03-15 00:05:31 +00:00
Chandler Carruth 4d1d34fbfc Extend the inline cost calculation to account for bonuses due to
correlated pairs of pointer arguments at the callsite. This is designed
to recognize the common C++ idiom of begin/end pointer pairs when the
end pointer is a constant offset from the begin pointer. With the
C-based idiom of a pointer and size, the inline cost saw the constant
size calculation, and this provides the same level of information for
begin/end pairs.

In order to propagate this information we have to search for candidate
operations on a pair of pointer function arguments (or derived from
them) which would be simplified if the pointers had a known constant
offset. Then the callsite analysis looks for such pointer pairs in the
argument list, and applies the appropriate bonus.

This helps LLVM detect that half of bounds-checked STL algorithms
(such as hash_combine_range, and some hybrid sort implementations)
disappear when inlined with a constant size input. However, it's not
a complete fix due the inaccuracy of our cost metric for constants in
general. I'm looking into that next.

Benchmarks showed no significant code size change, and very minor
performance changes. However, specific code such as hashing is showing
significantly cleaner inlining decisions.

llvm-svn: 152752
2012-03-14 23:19:53 +00:00
Dan Gohman 532fb8131b When an invoke is marked with metadata indicating its unwind edge
should be ignored by ARC optimization, don't insert new ARC runtime
calls in the unwind destination.

llvm-svn: 152748
2012-03-14 23:05:06 +00:00
Eric Christopher a9916d0296 Remove the DW_AT_MIPS_linkage name attribute when we don't need it
output (we're emitting a specification already and the information
isn't changing).

Saves 1% on the debug information for a build of llvm.

Fixes rdar://11043421

llvm-svn: 152697
2012-03-14 02:59:17 +00:00
Evan Cheng 7bf83096df DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
(i16 load $addr+c*sizeof(i16)) and replace uses of (i32 vextract) with the
i16 load. It should issue an extload instead: (i32 extload $addr+c*sizeof(i16)).

rdar://11035895

llvm-svn: 152675
2012-03-13 22:00:52 +00:00
Kevin Enderby 1ef22f33d0 Change the X86 assembler to not require a segment register on string
instruction's destination operand like it does for the source operand.
Also fix a typo in the comment for X86AsmParser::isSrcOp().

llvm-svn: 152654
2012-03-13 19:47:55 +00:00
Chris Lattner 87fa77bd8a enhance jump threading to preserve TBAA information when PRE'ing loads,
fixing rdar://11039258, an issue that came up when inspecting clang's 
bootstrapped codegen.

llvm-svn: 152635
2012-03-13 18:07:41 +00:00
Dan Gohman eab06fa3c9 Teach globalopt how to evaluate an invoke with a non-void return type.
llvm-svn: 152634
2012-03-13 18:01:37 +00:00
Duncan Sands 395ac42dd2 Generalize the "trunc(ptrtoint(x)) - trunc(ptrtoint(y)) ->
trunc(ptrtoint(x-y))" optimization introduced by Chandler.

llvm-svn: 152626
2012-03-13 14:07:05 +00:00
Eli Friedman c8cbd06947 Fix regression from r151466: an we can't replace uses of an instruction reachable from the entry block with uses of an instruction not reachable from the entry block. PR12231.
llvm-svn: 152595
2012-03-13 01:06:07 +00:00
Kevin Enderby 987cef1fe2 Change the second line of the test added for r152414 to use CHECK-NEXT.
Suggestion by Bill Wendling!

llvm-svn: 152582
2012-03-12 21:38:09 +00:00
Kevin Enderby fb3110b5d2 Added a missing error check for X86 assembly with mismatched base and index
registers not both being 64-bit or both being 32-bit registers.

llvm-svn: 152580
2012-03-12 21:32:09 +00:00
Kostya Serebryany afbb65dee7 [asan] move x86-specific test to a separate X86 directory with a custom lit.local.cfg file
llvm-svn: 152567
2012-03-12 18:49:11 +00:00
Chandler Carruth 595fda8466 When inlining a function and adding its inner call sites to the
candidate set for subsequent inlining, try to simplify the arguments to
the inner call site now that inlining has been performed.

The goal here is to propagate and fold constants through deeply nested
call chains. Without doing this, we loose the inliner bonus that should
be applied because the arguments don't match the exact pattern the cost
estimator uses.

Reviewed on IRC by Benjamin Kramer.

llvm-svn: 152556
2012-03-12 11:19:33 +00:00