Commit Graph

425540 Commits

Author SHA1 Message Date
Hendrik Greving a92ed167f2 [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.
Adds MVT::v128i2, MVT::v64i4, and implied MVT::i2, MVT::i4.

Keeps MVT::i2, MVT::i4 lowering actions as expand, which should be
removed once targets set this explicitly.

Adjusts 11 lit tests to reflect slightly different behavior during
DAG combine.

Differential Revision: https://reviews.llvm.org/D125247
2022-06-02 00:49:11 +00:00
Fangrui Song 8d3dda7624 [Polly] Fix -Wreorder-ctor. NFC 2022-06-01 17:33:14 -07:00
Quentin Colombet 1a155ee7de [RegisterClassInfo] Invalidate cached information if ignoreCSRForAllocationOrder changes
Even if CSR list is same between functions, we could have had a different
allocation order if ignoreCSRForAllocationOrder is evaluated differently.
Hence invalidate cached register class information if
ignoreCSRForAllocationOrder changes.

Patch by Srividya Karumuri <srividya_karumuri@apple.com>

Differential Revision: https://reviews.llvm.org/D126565
2022-06-01 17:15:51 -07:00
Fangrui Song 2108f7a243 [Object] Fix namespace style issues in D122069
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-implement-previously-declared-functions
2022-06-01 17:04:58 -07:00
Shilei Tian eb673be5ac [OMPIRBuilder] Add the support for compare capture
This patch adds the support for `compare capture` in `OMPIRBuilder`.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D120007
2022-06-01 19:53:43 -04:00
Philip Reames f15add7d93 [RISCV] Split fixed-vector-strided-load-store.ll so it can be autogened
I've gotten tired of updating register allocation changes by hand, let's just autogen this even if we have to duplicate it.
2022-06-01 16:12:35 -07:00
Alexey Bataev 73020b4540 Revert "[SLP]Improve shuffles cost estimation where possible."
This reverts commit fd5a6ce9dc to fix
a crash detected by a buildbot
https://lab.llvm.org/buildbot/#/builders/179/builds/3805/steps/11/logs/stdio.
2022-06-01 15:44:51 -07:00
Joseph Huber afd2f7e991 [Binary] Promote OffloadBinary to inherit from Binary
We use the `OffloadBinary` to create binary images of offloading files
and their corresonding metadata. This patch changes this to inherit from
the base `Binary` class. This allows us to create and insepect these
more generically. This patch includes all the necessary glue to
implement this as a new binary format, along with added the magic bytes
we use to distinguish the offloading binary to the `file_magic`
implementation.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D126812
2022-06-01 18:40:57 -04:00
Craig Topper 909a78b3a4 [RISCV] Use MachineRegisterInfo::use_instr_begin instead of use_begin+getParent. NFCI 2022-06-01 15:37:48 -07:00
David Tenty 8c8a2679a2 [clang][AIX] add option mdefault-visibility-export-mapping
The option mdefault-visibility-export-mapping is created to allow
mapping default visibility to an explicit shared library export
(e.g. dllexport). Exactly how and if this is manifested is target
dependent (since it depends on how they map dllexport in the IR).

Three values are provided for the option:

* none: the default and behavior without the option, no additional export linkage information is created.
* explicit: add the export for entities with explict default visibility from the source, including RTTI
* all: add the export for all entities with default visibility

This option is useful for targets which do not export symbols as part of
their usual default linkage behaviour (e.g. AIX), such targets
traditionally specified such information in external files (e.g. export
lists), but this mapping allows them to use the visibility information
typically used for this purpose on other (e.g. ELF) platforms.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D126340
2022-06-01 18:07:17 -04:00
Matthias Springer 6232a8f3d6 [mlir][sparse][NFC] Switch InitOp to bufferization::AllocTensorOp
Now that we have an AllocTensorOp (previously InitTensorOp) in the bufferization dialect, the InitOp in the sparse dialect is no longer needed.

Differential Revision: https://reviews.llvm.org/D126180
2022-06-02 00:03:52 +02:00
Chris Bieneman 902360d21d Temporarily disabling this test on arm
This is failing on an arm32 builder, and it is going to take me a while
to debug. To not block further progress I'm disabling this test on
arm32 configuraitons.
2022-06-01 16:46:04 -05:00
wren romano b364c76683 [mlir][sparse] Using non-empty function name suffix for OverheadType::kIndex
The trick of using an empty token in the `FOREVERY_O` x-macro relies on preprocessor behavior which is only standard since C99 6.10.3/4 and C++11 N3290 16.3/4 (whereas it was undefined behavior up through C++03 16.3/10).  Since the `ExecutionEngine/SparseTensorUtils.cpp` file is required to be compile-able under C++98 compatibility mode (unlike the C++11 used elsewhere in MLIR), we shouldn't rely on that behavior.

Also, using a non-empty suffix helps improve uniformity of the API, since all other primary/overhead suffixes are also non-empty.  I'm using the suffix `0` since that's the value used by the `SparseTensorEncoding` attribute for indicating the index overhead-type.

Depends On D126720

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126724
2022-06-01 14:18:42 -07:00
Florian Hahn 08482830eb
[LV] Update var name to Exiting, in line with terminology (NFC)
Recently the terminology used has been changed from Exit->Exiting in
line with common LLVM loop terminology. Update a remaining use of the
old terminology.
2022-06-01 22:13:29 +01:00
Huan Nguyen 38fb7d56e5 [BOLT][TEST] Replace cache+ option with ext-tsp
Replace "cache+" with "ext-tsp" in all BOLT tests

Test Plan:
```
ninja check-bolt
grep -rnw . -e "cache+"
```
no more tests containing "cache+"
"cache+" and "ext-tsp" are aliases

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126714
2022-06-01 14:00:16 -07:00
Nicolai Hähnle d53de9b7ac update_mir_test_checks: Better handling of common prefixes
Support the pattern where a test file uses multiple prefixes per run line:
one prefix that is unique to the run line, and additional prefixes that are
common with other run lines.

Decide on a per-function basis which prefix(es) to emit, based on which run
lines have the same output.

Move the renaming of vregs earlier, so that we can compare the output as it
would actually be printed in check lines.

Differential Revision: https://reviews.llvm.org/D126411
2022-06-01 15:53:32 -05:00
Benjamin Kramer d9de52819d [bazel] Add a missing dependency after f3bdb56d61 2022-06-01 22:52:06 +02:00
Chris Bieneman 7b759d6d87 Temporarily disabling this test on arm
This is failing on an arm32 builder, and it is going to take me a while
to debug. To not block further progress I'm disabling this test on
arm32 configuraitons.
2022-06-01 15:50:39 -05:00
Peter Klausler f2ee0a3f2c [flang][NFC] Document intentional non-support for an extension
F18 doesn't accept INTEGER operands to the intrinsic LOGICAL operations;
some compilers do.  This usage is not portable, and not just because it's
non-conforming -- the bit representations of LOGICAL also vary between
compilers and options.  The "MIL-STD" bit intrinsics IAND() & al. have been
avaiable since the late 70's and should be used instead.

Differential Revision: https://reviews.llvm.org/D126798
2022-06-01 13:50:26 -07:00
Maksim Panchenko 0426100ff4 [BOLT][NFC] Remove unused variable
Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D126808
2022-06-01 13:43:10 -07:00
LLVM GN Syncbot 4bc63858fc [gn build] Port 129c056d62 2022-06-01 20:34:21 +00:00
Chris Bieneman 129c056d62 [ObjectYAML][DX] Support yaml2dxcontainer
This patch adds a the first bits of support for a yaml representation
of dxcontainer files.

Since the YAML representation's primary purpose is testing
infrastructure, the yaml representation supports both verbose and a
more friendly format by making computable sizes and offsets optional.
If provided they are validated to be correct, otherwise they are
computed on the fly during emission.

As I expand the format I'll be able to make more size fields optional,
and I will continue to make the format easier to work with.

Depends on D124804

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D124944
2022-06-01 15:34:00 -05:00
Paul Robinson 8869ba3662 [PS5] Add PS5OSTargetInfo class, update affected tests 2022-06-01 13:30:29 -07:00
Paul Robinson 5d005d8256 Refactor PS4OSTargetInfo into a base class and PS4 subclass; prep for PS5 2022-06-01 13:30:29 -07:00
Hendrik Greving e9d05cc7d8 Revert "[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4."
This reverts commit 430ac5c302.

Due to failures in Clang tests.

Differential Revision: https://reviews.llvm.org/D125247
2022-06-01 13:27:49 -07:00
Florian Hahn 72aca94b90
[LV] Add additional tests for pointer select support.
Additional test cases for D114487.
2022-06-01 21:19:03 +01:00
Chris Bieneman 9e3919dac4 [Object][DX] Parse DXContainer Parts
DXContainer files are structured as parts. This patch adds support for
parsing out the file part offsets and file part headers.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D124804
2022-06-01 14:55:36 -05:00
Hendrik Greving 430ac5c302 [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.
Adds MVT::v128i2, MVT::v64i4, and implied MVT::i2, MVT::i4.

Keeps MVT::i2, MVT::i4 lowering actions as `expand`, which should be
removed once targets set this explicitly.

Adjusts 11 lit tests to reflect slightly different behavior during
DAG combine.

Differential Revision: https://reviews.llvm.org/D125247
2022-06-01 12:48:01 -07:00
Adrian Prantl d951ca5439 Revert "[Driver] Enable to use C++20 standalne by -fcxx-modules"
This reverts commit a544710cd4.

See discussion in D120540.

This breaks C++ Clang modules on Darwin and also more than a dozen
tests in the LLDB testsuite.  I think we need to be more careful to
separate out the enabling of Clang C++ modules and C++20
modules. Either by having -fmodules-ts control the HaveModules flag,
or by adding a way to explicitly turn them off.
2022-06-01 12:11:57 -07:00
Adrian Prantl c84b9bbac1 Revert "[NFC] Use %clang instead of %clang++ in tests"
This reverts commit 738c20e6df as a dependency of D120540.
2022-06-01 12:11:56 -07:00
Adrian Prantl 128ffb332b Revert "[Driver][Modules] Remove dependence on linking support from clang/test/Driver/modules.cpp"
This reverts commit 35b1cfc76f as a dependency of D120540.
2022-06-01 12:11:56 -07:00
Mark de Wever 10c4eec278 [NFC][libc++][format] Improves naming.
Based on review comments in D110499.

Depends on D110499

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D125610
2022-06-01 21:05:31 +02:00
Nico Weber 815825f442 [lld/mac] clang-format after f5709066e3 2022-06-01 14:53:08 -04:00
Michael Eisel f5709066e3 [lld/mac] Cache file IDs of symbols in emitStabs for faster sorting
This reduces the time emitStabs() takes by about 275ms, or 3% of overall
linking time for the project I'm on. Although the parent function is run in
parallel, it's one of the slowest tasks in that concurrent batch (I have
another optimization for another slow task as well).

Differential Revision: https://reviews.llvm.org/D126785
2022-06-01 14:51:34 -04:00
Rob Suderman f3bdb56d61 [mlir][math] Add math.ctlz expansion to control flow + arith operations
Ctlz is an intrinsic in LLVM but does not have equivalent operations in SPIR-V.
Including a decomposition gives an alternative path for these platforms.

Reviewed By: NatashaKnk

Differential Revision: https://reviews.llvm.org/D126261
2022-06-01 11:45:04 -07:00
Yang Keao 02f640672e [Polly] Migrate -polly-mse to the new pass manager.
This patch implements the `MaximalStaticExpansion` and its printer in NPM.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D125870
2022-06-01 13:37:58 -05:00
Nathaniel McVicar a4425cc914 [ccache] Add Windows support
Windows builds can't receive environment variables on the command line or make use of RULE_LAUNCH_COMPILE with ccache.

Reviewed By: stella.stamenova, Ericson2314

Differential Revision: https://reviews.llvm.org/D126575
2022-06-01 11:34:56 -07:00
Stella Laurenzo 3bb7999339 [mlir] Add global_load and global_store ops to ml_program.
* Adds simple, non-atomic, non-volatile, non-synchronized direct load/store ops.

Differential Revision: https://reviews.llvm.org/D126230
2022-06-01 11:32:15 -07:00
Aaron Ballman aaf04c7215 Fix an incorrect bit-width for storing attribute syntax information
This field corresponds to the Syntax enumeration, and that gained
another entry in 1fdf952dee. However,
the bit-field for storing the syntax used was not adjusted to handle
the extra field.

This turns out to be unobservable for HLSL attributes at the moment, so
there is no test coverage. But it's also not really an NFC change
either.
2022-06-01 14:24:51 -04:00
Alexander Belyaev f711785e61 [mlir] Add conversion and tests for complex.[sqrt|atan2] to Arith.
Differential Revision: https://reviews.llvm.org/D126799
2022-06-01 20:21:51 +02:00
Anders Waldenborg 86f9cf88cb [clang] Add tests for (const) weak variables
This adds tests checking the behavior of const variables declared with
weak attribute.

Both checking that they can not be used in places where a constant
expression is required and that a dynamic initializer is emitted when
used as an initializer expression.

Differential Revision: https://reviews.llvm.org/D126578
2022-06-01 20:18:54 +02:00
bixia1 548f0841cd [mlir][sparse] Enable the test for operator expm1.
Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126732
2022-06-01 11:18:17 -07:00
Stanislav Mekhanoshin c9e242f6dd [AMDGPU] Change GISel error handling for TFE on GFX90A
Differential Revision: https://reviews.llvm.org/D126797
2022-06-01 11:07:25 -07:00
Alexey Bataev fd5a6ce9dc [SLP]Improve shuffles cost estimation where possible.
Improved/fixed cost modeling for shuffles by providing masks, improved
cost model for non-identity insertelements.

Differential Revision: https://reviews.llvm.org/D115462
2022-06-01 11:01:37 -07:00
Andrew Browne 31d12df3b9 [DFSan] Remove deprecated flag from build-libc-list.py
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D126429
2022-06-01 11:00:13 -07:00
Siva Chandra Reddy ad89cf4e2d [libc] Keep all thread state information separate from the thread structure.
The state is now stored on the thread's stack memory. This enables
implementing pthread API like pthread_detach which takes the pthread_t
structure argument by value.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D126716
2022-06-01 17:36:58 +00:00
Adrian Prantl 62b4482175 Revert "Adapt LLDB for D120540."
This reverts commit ca73de4374.

That patch was just hiding the problem, instead of fixing it.
2022-06-01 10:33:53 -07:00
Joseph Huber f4f23de1a4 [Libomptarget] Add basic support for dynamic shared memory on AMDGPU
This patchs adds the arguments necessary to allocate the size of the
dynamic shared memory via the `LIBOMPTARGET_SHARED_MEMORY_SIZE`
environment variable. This patch only allocates the memory, AMDGPU has a
limitation that shared memory can only be accessed from the kernel
directly. So this will currently only work with optimizations to inline
the accessor function.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D125252
2022-06-01 13:32:50 -04:00
Yi Kong 716d428ab5 [BOLT] Add `-o` option to merge-fdata
Differential Revision: https://reviews.llvm.org/D126788
2022-06-02 01:29:04 +08:00
Fangrui Song 241e645036 ar_to_bc.sh: Ignore non-bitcode files in archives
The script uses llvm-link to link LLVM bitcode files.
5426da8ffa used -DLLVM_DISABLE_ASSEMBLY_FILES=ON
to ignore object files compiled from lib/Support/BLAKE3/*.S.

A better approach (which fits Bazel better) is to ignore non-bitcode files.

Reviewed By: akyrtzi

Differential Revision: https://reviews.llvm.org/D126728
2022-06-01 10:28:14 -07:00