Commit Graph

50770 Commits

Author SHA1 Message Date
Jim Grosbach 4e380354a9 ARM parse parenthesized expressions for label references.
Partial fix for rdar://10348687.

llvm-svn: 143063
2011-10-26 21:14:08 +00:00
Rafael Espindola 66393c127d This commit introduces two fake instructions MORESTACK_RET and
MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively.  Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV).  It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.

Patch by Sanjoy Das.

llvm-svn: 143062
2011-10-26 21:12:27 +00:00
Lang Hames c47e283430 Make sure short memsets on ARM lower to stores, even when optimizing for size.
llvm-svn: 143055
2011-10-26 20:56:52 +00:00
Duncan Sands ba286d7c73 The maximum power of 2 dividing a power of 2 is itself. This occurs
in 403.gcc and was spotted by my super-optimizer.

llvm-svn: 143054
2011-10-26 20:55:21 +00:00
Owen Anderson bc14bd3bfb Add support for scattered relocations to the MachO relocatation pretty printer.
llvm-svn: 143051
2011-10-26 20:42:54 +00:00
Nick Lewycky 1a62d78325 On an ELF system, ".debug_str" is mergeable and contains null terminated strings
composed of one byte characters.

llvm-svn: 143044
2011-10-26 18:44:32 +00:00
Owen Anderson 90c49c037e The order of the two symbol listings in a Macho x86_64 subtractor relocation is reversed from what seems intuitive to me.
llvm-svn: 143035
2011-10-26 17:28:49 +00:00
Jim Grosbach 25d4707c4d Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
llvm-svn: 143034
2011-10-26 17:28:15 +00:00
Owen Anderson 04e46b6ae4 Include the full 64 bits of relocation data in the type info for MachO relocations, so that we can recognize scattered relocations.
llvm-svn: 143033
2011-10-26 17:10:22 +00:00
Owen Anderson 7be76590e6 Expand relocation type field to 64 bits. MachO scattered relocations require 33 bits of type info.
llvm-svn: 143032
2011-10-26 17:08:49 +00:00
Owen Anderson b92de2de71 Improve pretty printing of GOT relocations in MachO on x86_64.
llvm-svn: 143031
2011-10-26 17:05:20 +00:00
Duncan Sands 1d2bb9882d My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1).  This occurs in 464.h264ref.

llvm-svn: 143028
2011-10-26 15:31:51 +00:00
Duncan Sands dce448c642 Simplify SplitVecRes_UnaryOp by removing all the code that is
trying to legalize the operand types when only the result type
is required to be legalized - the type legalization machinery
will get round to the operands later if they need legalizing.
There can be a point to legalizing operands in parallel with
the result: when this saves compile time or results in better
code.  There was only one case in which this was true: when
the operand is also split, so keep the logic for that bit.
As a result of this change, additional operand legalization
methods may need to be introduced to handle nodes where the
result and operand types can differ, like SIGN_EXTEND, but
the testsuite doesn't contain any tests where this is the case.
In any case, it seems better to require such methods (and die
with an assert if they doesn't exist) than to quietly produce
wrong code if we forgot to special case the node in
SplitVecRes_UnaryOp.

llvm-svn: 143026
2011-10-26 14:11:18 +00:00
James Molloy dd9137aa56 Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
llvm-svn: 143023
2011-10-26 08:53:19 +00:00
Bill Wendling 1414bc5a14 Use a worklist to prevent the iterator from becoming invalidated because of the 'removeSuccessor' call. Noticed in a Release+Asserts+Check buildbot.
llvm-svn: 143018
2011-10-26 07:16:18 +00:00
Eric Christopher ff37313f12 Remove unused variable.
llvm-svn: 143011
2011-10-26 03:47:16 +00:00
Jakob Stoklund Olesen e8261a22f1 Don't use floating point to do an integer's job.
This code makes different decisions when compiled into x87 instructions
because of different rounding behavior.  That caused phase 2/3
miscompares on 32-bit Linux when the phase 1 compiler was built with gcc
(using x87), and the phase 2 compiler was built with clang (using SSE).

This fixes PR11200.

llvm-svn: 143006
2011-10-26 01:47:48 +00:00
Evan Cheng 7313337c85 Disable LICM speculation in high register pressure situation again now that Devang has fixed other issues.
llvm-svn: 143003
2011-10-26 01:26:57 +00:00
Evan Cheng 043c9d3f7a Revert part of r142530. The patch potentially hurts performance especially
on Darwin platforms where -Os means optimize for size without hurting
performance.

llvm-svn: 143002
2011-10-26 01:17:44 +00:00
Bill Wendling 9b9932229d Reapply r142920 with fix:
An MBB which branches to an EH landing pad shouldn't be considered for tail merging.

In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 143001
2011-10-26 01:10:25 +00:00
Mon P Wang 6ebf401412 The bitcode reader can create an shuffle with a place holder mask which it will
fix up later. For this special case, allow such a mask to be considered valid.
<rdar://problem/8622574>

llvm-svn: 142992
2011-10-26 00:34:48 +00:00
Michael J. Spencer 6e080ddb31 Object/Archive: Cleanup anon namespace.
llvm-svn: 142983
2011-10-25 22:31:11 +00:00
Michael J. Spencer 9aaa852336 Object/Archive: Add BSD style long file name support and skip internal members.
llvm-svn: 142981
2011-10-25 22:30:42 +00:00
Owen Anderson 377137e2ed Remove extraneous printing of "-PC".
llvm-svn: 142970
2011-10-25 20:44:00 +00:00
Owen Anderson fa3e5200b8 Add support for the notion of "hidden" relocations. On MachO, these are relocation entries that are used as additional information for other, real relocations, rather than being relocations themselves.
I'm not familiar enough with ELF or COFF to know if they should have any relocations marked hidden.

llvm-svn: 142961
2011-10-25 20:35:53 +00:00
Eli Friedman 3e9ef907e0 Remove a couple redundant checks.
llvm-svn: 142959
2011-10-25 20:34:22 +00:00
Jim Grosbach a40f8c432a Make assert() message more informative.
PR11217.

llvm-svn: 142956
2011-10-25 20:30:48 +00:00
Owen Anderson 52cd8acafc Teach the MachO relocation pretty-printer to interpret ARM half-relocations.
llvm-svn: 142938
2011-10-25 18:48:41 +00:00
Bruno Cardoso Lopes 82b077ec22 This is the first of several patches for Mips direct object generation.
This first patch is for expression variable kinds.

Patch by Jack Carter!

llvm-svn: 142934
2011-10-25 18:13:20 +00:00
Bruno Cardoso Lopes c0ecd1f7ed Corrects previously incorrect $sp change in MipsCompilationCallback.
The address for $sp, and addresses for sdc1/ldc1 must be 8-byte aligned

Patch by Petar Jovanovic.

llvm-svn: 142930
2011-10-25 17:30:47 +00:00
Duncan Sands 6ca458e49a Revert commit 142891. Takumi bisected the tablegen miscompiles
down to this commit.  Original commit message:

An MBB which branches to an EH landing pad shouldn't be considered for tail merging.

In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 142920
2011-10-25 12:30:22 +00:00
Duncan Sands a370f3e34e Restore commits 142790 and 142843 - they weren't breaking the build
bots.  Original commit messages:
- Reapply r142781 with fix. Original message:

  Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

- Now that we look at all the header PHIs, we need to consider all the header PHIs
  when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
  torture testsuite!

llvm-svn: 142919
2011-10-25 12:28:52 +00:00
Chandler Carruth 32f46e7c07 Fix the API usage in loop probability heuristics. It was incorrectly
classifying many edges as exiting which were in fact not. These mainly
formed edges into sub-loops. It was also not correctly classifying all
returning edges out of loops as leaving the loop. With this match most
of the loop heuristics are more rational.

Several serious regressions on loop-intesive benchmarks like perlbench's
loop tests when built with -enable-block-placement are fixed by these
updated heuristics. Unfortunately they in turn uncover some other
regressions. There are still several improvemenst that should be made to
loop heuristics including trip-count, and early back-edge management.

llvm-svn: 142917
2011-10-25 09:47:41 +00:00
Duncan Sands 805c5b92c8 Speculatively revert commits 142790 and 142843 to see if it fixes
the dragonegg and llvm-gcc self-host buildbots.  Original commit
messages:
- Reapply r142781 with fix. Original message:

  Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

- Now that we look at all the header PHIs, we need to consider all the header PHIs
when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
torture testsuite!

llvm-svn: 142916
2011-10-25 09:26:43 +00:00
Nick Lewycky d75675ab3b Remove dead enum value. There is no DIESectionOffset.
llvm-svn: 142912
2011-10-25 07:05:26 +00:00
Eric Christopher fe15841044 Remove unused forward decl.
llvm-svn: 142892
2011-10-25 00:55:35 +00:00
Bill Wendling 38ced995f6 An MBB which branches to an EH landing pad shouldn't be considered for tail merging.
In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 142891
2011-10-25 00:54:05 +00:00
Jim Grosbach 17ec1a19e5 ARM assembly parsing and encoding for VLD1 with writeback.
Four entry register lists.

llvm-svn: 142882
2011-10-25 00:14:01 +00:00
Dan Gohman b43c36f391 Remove the Blackfin backend.
llvm-svn: 142880
2011-10-25 00:05:42 +00:00
Dan Gohman dfc96aea90 Remove the SystemZ backend.
llvm-svn: 142878
2011-10-24 23:48:32 +00:00
Jim Grosbach 30c39c8bf2 Nuke dead code. Nothing generates the VLD1d64QPseudo_UPD instruction.
llvm-svn: 142877
2011-10-24 23:40:46 +00:00
Jim Grosbach 92fd05ecdc ARM assembly parsing and encoding for VLD1 w/ writeback.
Three entry register list variation.

llvm-svn: 142876
2011-10-24 23:26:05 +00:00
Owen Anderson 171f485f15 More fixes and improvements to MachO relocation pretty-printing, particular for x86 and x86_64 relocations with addends.
llvm-svn: 142875
2011-10-24 23:20:07 +00:00
Eli Friedman a5e244c08d Don't crash on variable insertelement on ARM. PR10258.
llvm-svn: 142871
2011-10-24 23:08:52 +00:00
Bill Wendling 57e3aaad89 Check the visibility of the global variable before placing it into the stubs
table. A hidden variable could potentially end up in both lists.
<rdar://problem/10336715>

llvm-svn: 142869
2011-10-24 23:05:43 +00:00
Evan Cheng f33bfbbace ARMConstantPoolMBB::print should print BB number.
llvm-svn: 142867
2011-10-24 23:01:03 +00:00
Jim Grosbach 3ea0657d54 ARM assembly parsing and encoding for VLD1 w/ writeback.
One and two length register list variants.

llvm-svn: 142861
2011-10-24 22:16:58 +00:00
Jim Grosbach 2098cb1e6f ARM refactor am6offset usage for VLD1.
Split am6offset into fixed and register offset variants so the instruction
encodings are explicit rather than relying an a magic reg0 marker.
Needed to being able to parse these.

llvm-svn: 142853
2011-10-24 21:45:13 +00:00
Owen Anderson c8c94da8c8 Get relocation parsing/dumping to a mostly-working state for MachO files.
llvm-svn: 142852
2011-10-24 21:44:00 +00:00
Nick Lewycky a58fb48a55 Now that we look at all the header PHIs, we need to consider all the header PHIs
when deciding that the loop has stopped evolving. Fixes miscompile in the gcc
torture testsuite!

llvm-svn: 142843
2011-10-24 21:02:38 +00:00
Eli Friedman b72d55353a Add support to the old JIT for acquire/release loads and stores on x86. PR11207.
llvm-svn: 142841
2011-10-24 20:24:21 +00:00
Owen Anderson 953af053eb Stub out some of the MachO relocation decoding hooks.
llvm-svn: 142840
2011-10-24 20:19:18 +00:00
Douglas Gregor 0cc574eee7 Really unbreak CMake build
llvm-svn: 142822
2011-10-24 18:10:52 +00:00
Douglas Gregor d0800fda95 Unbreak CMake build
llvm-svn: 142821
2011-10-24 18:09:23 +00:00
Owen Anderson 295b1e84ce Fix a NEON disassembly case that was broken in the recent refactorings. As more of this code gets refactored, a lot of these manual decoding hooks should get smaller and/or go away entirely.
llvm-svn: 142817
2011-10-24 18:04:29 +00:00
Dan Gohman e2ff95e327 Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handle
physreg dependencies, and upcoming codegen changes will require proper
physreg dependence handling.

llvm-svn: 142816
2011-10-24 18:01:06 +00:00
Dan Gohman d78fc160cc Delete the Latency scheduling preference.
llvm-svn: 142815
2011-10-24 17:56:48 +00:00
Dan Gohman 4ed1afa51d Change this overloaded use of Sched::Latency to be an overloaded
use of Sched::ILP instead, as Sched::Latency is going away.

llvm-svn: 142813
2011-10-24 17:55:11 +00:00
Dan Gohman 2c9bda1512 Remove the explicit request for "Latency" scheduling from MSP430,
as the Latency scheduler is going away.

llvm-svn: 142811
2011-10-24 17:53:16 +00:00
Dan Gohman c32af340fc Change the default scheduler from Latency to ILP, since Latency
is going away.

llvm-svn: 142810
2011-10-24 17:45:02 +00:00
Jim Grosbach 1b5e49a35a Thumb2 LDM instructions can target PC. Make sure to encode it.
PR11220

llvm-svn: 142801
2011-10-24 17:16:24 +00:00
Bill Wendling 38f86c505c Cleanup. Get rid of the old SjLj EH lowering code. No functionality change.
llvm-svn: 142800
2011-10-24 17:12:36 +00:00
Chandler Carruth 30b63c6430 Sink an otherwise unused variable's initializer into the asserts that
used it. Fixes an unused variable warning from GCC on release builds.

llvm-svn: 142799
2011-10-24 16:51:55 +00:00
Chandler Carruth 7111f4564c Remove return heuristics from the static branch probabilities, and
introduce no-return or unreachable heuristics.

The return heuristics from the Ball and Larus paper don't work well in
practice as they pessimize early return paths. The only good hitrate
return heuristics are those for:
 - NULL return
 - Constant return
 - negative integer return

Only the last of these three can possibly require significant code for
the returning block, and even the last is fairly rare and usually also
a constant. As a consequence, even for the cold return paths, there is
little code on that return path, and so little code density to be gained
by sinking it. The places where sinking these blocks is valuable (inner
loops) will already be weighted appropriately as the edge is a loop-exit
branch.

All of this aside, early returns are nearly as common as all three of
these return categories, and should actually be predicted as taken!
Rather than muddy the waters of the static predictions, just remain
silent on returns and let the CFG itself dictate any layout or other
issues.

However, the return heuristic was flagging one very important case:
unreachable. Unfortunately it still gave a 1/4 chance of the
branch-to-unreachable occuring. It also didn't do a rigorous job of
finding those blocks which post-dominate an unreachable block.

This patch builds a more powerful analysis that should flag all branches
to blocks known to then reach unreachable. It also has better worst-case
runtime complexity by not looping through successors for each block. The
previous code would perform an N^2 walk in the event of a single entry
block branching to N successors with a switch where each successor falls
through to the next and they finally fall through to a return.

Test case added for noreturn heuristics. Also doxygen comments improved
along the way.

llvm-svn: 142793
2011-10-24 12:01:08 +00:00
Nick Lewycky 9be7f277e4 Reapply r142781 with fix. Original message:
Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
  loop header when computing the trip count.

  With this, we now constant evaluate:
    struct ListNode { const struct ListNode *next; int i; };
    static const struct ListNode node1 = {0, 1};
    static const struct ListNode node2 = {&node1, 2};
    static const struct ListNode node3 = {&node2, 3};
    int test() {
      int sum = 0;
      for (const struct ListNode *n = &node3; n != 0; n = n->next)
        sum += n->i;
      return sum;
    }

llvm-svn: 142790
2011-10-24 06:57:05 +00:00
Nick Lewycky 8e904dee82 PHI nodes not in the loop header aren't part of the loop iteration initial
state. Furthermore, they might not have two operands. This fixes the underlying
issue behind the crashes introduced in r142781.

llvm-svn: 142788
2011-10-24 05:51:01 +00:00
Nick Lewycky dd1d3df524 A dead malloc, a free(NULL) and a free(undef) are all trivially dead
instructions.

This doesn't introduce any optimizations we weren't doing before (except
potentially due to pass ordering issues), now passes will eliminate them sooner
as part of their own cleanups.

llvm-svn: 142787
2011-10-24 04:35:36 +00:00
Nick Lewycky 9d28c26d77 Speculatively revert r142781. Bots are showing
Assertion `i_nocapture < OperandTraits<PHINode>::operands(this) && "getOperand() out of range!"' failed.
coming out of indvars.

llvm-svn: 142786
2011-10-24 04:00:25 +00:00
NAKAMURA Takumi 66c9e4ffd5 Windows/Path.inc: [PR8460] Get rid of ScopedNullTerminator. Thanks to Zvi Rackover!
llvm-svn: 142785
2011-10-24 03:27:19 +00:00
Chandler Carruth 7a0094a673 Simplify the design of BranchProbabilityInfo by collapsing it into
a single class. Previously it was split between two classes, one
internal and one external. The concern seemed to center around exposing
the weights used, but those can remain confined to the implementation
file.

Having a single class to maintain the state and analyses in use will
also simplify several of the enhancements I want to make to our static
heuristics.

llvm-svn: 142783
2011-10-24 01:40:45 +00:00
Nick Lewycky 1700007ecc Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the
loop header when computing the trip count.

With this, we now constant evaluate:
  struct ListNode { const struct ListNode *next; int i; };
  static const struct ListNode node1 = {0, 1};
  static const struct ListNode node2 = {&node1, 2};
  static const struct ListNode node3 = {&node2, 3};
  int test() {
    int sum = 0;
    for (const struct ListNode *n = &node3; n != 0; n = n->next)
      sum += n->i;
    return sum;
  }

llvm-svn: 142781
2011-10-23 23:43:14 +00:00
Chandler Carruth 24cee10fb1 Tidy up a loop to be more idiomatic for LLVM's codebase, and remove some
extraneous whitespace. Trying to clean-up this pass as much as I can
before I start making functional changes.

llvm-svn: 142780
2011-10-23 22:40:13 +00:00
Craig Topper b05d9e9bea Add X86 SARX, SHRX, and SHLX instructions.
llvm-svn: 142779
2011-10-23 22:18:24 +00:00
Chandler Carruth 1c8ace0e89 Teach the BranchProbabilityInfo pass to print its results, and use that
to bring it under direct test instead of merely indirectly testing it in
the BlockFrequencyInfo pass.

The next step is to start adding tests for the various heuristics
employed, and to start fixing those heuristics once they're under test.

llvm-svn: 142778
2011-10-23 21:21:50 +00:00
Chandler Carruth fd7475e906 Now that we have comparison on probabilities, add some static functions
to get important constant branch probabilities and use them for finding
the best branch out of a set of possibilities.

llvm-svn: 142762
2011-10-23 20:10:34 +00:00
Chandler Carruth 446210b616 Remove a commented out line of code that snuck by my auditing.
llvm-svn: 142761
2011-10-23 20:10:30 +00:00
Benjamin Kramer cc0ed6ba04 Print branch probabilities as percentages.
50% is much more readable than 5.000000e-01.

llvm-svn: 142752
2011-10-23 11:32:54 +00:00
Benjamin Kramer 929f53f65c Add compare operators to BranchProbability and use it to determine if an edge is hot.
llvm-svn: 142751
2011-10-23 11:19:14 +00:00
Chandler Carruth bd1be4d01c Completely re-write the algorithm behind MachineBlockPlacement based on
discussions with Andy. Fundamentally, the previous algorithm is both
counter productive on several fronts and prioritizing things which
aren't necessarily the most important: static branch prediction.

The new algorithm uses the existing loop CFG structure information to
walk through the CFG itself to layout blocks. It coalesces adjacent
blocks within the loop where the CFG allows based on the most likely
path taken. Finally, it topologically orders the block chains that have
been formed. This allows it to choose a (mostly) topologically valid
ordering which still priorizes fallthrough within the structural
constraints.

As a final twist in the algorithm, it does violate the CFG when it
discovers a "hot" edge, that is an edge that is more than 4x hotter than
the competing edges in the CFG. These are forcibly merged into
a fallthrough chain.

Future transformations that need te be added are rotation of loop exit
conditions to be fallthrough, and better isolation of cold block chains.
I'm also planning on adding statistics to model how well the algorithm
does at laying out blocks based on the probabilities it receives.

The old tests mostly still pass, and I have some new tests to add, but
the nested loops are still behaving very strangely. This almost seems
like working-as-intended as it rotated the exit branch to be
fallthrough, but I'm not convinced this is actually the best layout. It
is well supported by the probabilities for loops we currently get, but
those are pretty broken for nested loops, so this may change later.

llvm-svn: 142743
2011-10-23 09:18:45 +00:00
Craig Topper 980d59832a Add X86 RORX instruction
llvm-svn: 142741
2011-10-23 07:34:00 +00:00
Cameron Zwarich 057fbb1a10 The element insertion code in scalar replacement doesn't handle incorrect
element types, even though the element extraction code does. It is surprising
that this bug has been here for so long. Fixes <rdar://problem/10318778>.

llvm-svn: 142740
2011-10-23 07:02:10 +00:00
Craig Topper e94d277db8 Add X86 MULX instruction for disassembler.
llvm-svn: 142738
2011-10-23 00:33:32 +00:00
Craig Topper 7412aa9886 Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 multiply instructions.
llvm-svn: 142737
2011-10-22 23:13:53 +00:00
Nick Lewycky 32f8051d66 A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store
elimination on them too.

llvm-svn: 142735
2011-10-22 21:59:35 +00:00
Nick Lewycky a6674c7fc9 Make SCEV's brute force analysis stronger in two ways. Firstly, we should be
able to constant fold load instructions where the argument is a constant.
Second, we should be able to watch multiple PHI nodes through the loop; this
patch only supports PHIs in loop headers, more can be done here.

With this patch, we now constant evaluate:
  static const int arr[] = {1, 2, 3, 4, 5};
  int test() {
    int sum = 0;
    for (int i = 0; i < 5; ++i) sum += arr[i];
    return sum;
  }

llvm-svn: 142731
2011-10-22 19:58:20 +00:00
Benjamin Kramer 0d6d098841 Move various generated tables into read-only memory, fixing up const correctness along the way.
llvm-svn: 142726
2011-10-22 16:50:00 +00:00
Nadav Rotem e649d66552 Fix pr11193.
SHL inserts zeros from the right, thus even when the original
sign_extend_inreg value was of 1-bit, we need to sra.

llvm-svn: 142724
2011-10-22 12:39:25 +00:00
Bill Wendling 94e6643fce The different flavors of ARM have different valid subsets of registers. Check
that the set of callee-saved registers is correct for the specific platform.
<rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2

llvm-svn: 142706
2011-10-22 00:29:28 +00:00
Jim Grosbach 11c0b347c6 Assembly parsing for 4-register sequential variant of VLD2.
llvm-svn: 142704
2011-10-21 23:58:57 +00:00
Jim Grosbach 118b38cbf1 Assembly parsing for 2-register sequential variant of VLD2.
llvm-svn: 142691
2011-10-21 22:21:10 +00:00
Bill Wendling b1c430886b Make sure that the landing pads themselves have no PHI instructions in them.
The assumption in the back-end is that PHIs are not allowed at the start of the
landing pad block for SjLj exceptions.
<rdar://problem/10313708>

llvm-svn: 142689
2011-10-21 22:08:56 +00:00
Benjamin Kramer 606a50a9f8 Extend the floating point heuristic to consider NaN checks unlikely.
llvm-svn: 142687
2011-10-21 21:13:47 +00:00
Eli Friedman 688db1d6d0 Remap blockaddress correctly when inlining a function. Fixes PR10162.
llvm-svn: 142684
2011-10-21 20:45:19 +00:00
Owen Anderson 500ebeb87f Use LLVMBool for a function that logically returns a boolean value.
llvm-svn: 142683
2011-10-21 20:35:58 +00:00
Jim Grosbach 846bcff7c7 Assembly parsing for 4-register variant of VLD1.
llvm-svn: 142682
2011-10-21 20:35:01 +00:00
Benjamin Kramer 1e731a10d0 BranchProbabilityInfo: floating point equality is unlikely.
This is from the same paper from Ball and Larus as the rest of the currently implemented heuristics.

llvm-svn: 142677
2011-10-21 20:12:47 +00:00
Jim Grosbach c4360fe575 Assembly parsing for 3-register variant of VLD1.
llvm-svn: 142675
2011-10-21 20:02:19 +00:00
Owen Anderson cef5641982 STABS symbols are debug symbols.
llvm-svn: 142673
2011-10-21 19:26:54 +00:00
Eli Friedman 303c81c773 Minor simplification: use ShuffleVectorInst::getMaskValue instead of a more expensive helper.
llvm-svn: 142672
2011-10-21 19:11:34 +00:00
Eli Friedman ce818277fc Extend instcombine's shufflevector simplification to handle more cases where the input and output vectors have different sizes. Patch by Xiaoyi Guo.
llvm-svn: 142671
2011-10-21 19:06:29 +00:00