Commit Graph

58713 Commits

Author SHA1 Message Date
Renato Golin cc99c42130 Fix 80-col and early exit in cost model
llvm-svn: 172877
2013-01-19 00:42:16 +00:00
Nadav Rotem 7431211214 On Sandybridge loading unaligned 256bits using two XMM loads (vmovups and vinsertf128) is faster than using a single vmovups instruction.
llvm-svn: 172868
2013-01-18 23:10:30 +00:00
Jordan Rose ed1bf29df1 Use hexDigitValue in LLLexer.
llvm-svn: 172866
2013-01-18 23:05:41 +00:00
Michael Gottesman 87db357547 Improved comment.
llvm-svn: 172864
2013-01-18 23:02:45 +00:00
Michael Gottesman 9854e0c6a2 Fixed typo in comment.
llvm-svn: 172863
2013-01-18 23:00:33 +00:00
Eric Christopher e9ec2458e7 Split out DW_OP_addr for the split debug info DWARF5 proposal.
llvm-svn: 172857
2013-01-18 22:11:33 +00:00
Bill Wendling 7df048e6b6 If the attributes don't exist, just bail for now.
llvm-svn: 172854
2013-01-18 21:56:07 +00:00
Bill Wendling 658d24d211 Use AttributeSet accessor methods instead of Attribute accessor methods.
Further encapsulation of the Attribute object. Don't allow direct access to the
Attribute object as an aggregate.

llvm-svn: 172853
2013-01-18 21:53:16 +00:00
Bill Wendling 4f972ea2d8 Remove unused parameter. Also use the AttributeSet query methods instead of the Attribute query methods.
llvm-svn: 172852
2013-01-18 21:50:24 +00:00
Jordan Rose e1f76583dd Add llvm::hexDigitValue to convert single characters to hex.
This is duplicated in a couple places in the codebase. Adopt this in APFloat.

llvm-svn: 172851
2013-01-18 21:45:30 +00:00
Jack Carter c1b17ed2e1 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Support for Mips register information sections.

Mips ELF object files have a section that is dedicated
to register use info. Some of this information such as
the assumed Global Pointer value is used by the linker
in relocation resolution.

The register info file is .reginfo in o32 and .MIPS.options
in 64 and n32 abi files.

This patch contains the changes needed to create the sections,
but leaves the actual register accounting for a future patch.


Contributer: Jack Carter
 
llvm-svn: 172847
2013-01-18 21:20:38 +00:00
Tom Stellard c4cabef782 R600: Proper insert S_WAITCNT instructions
Some instructions like memory reads/writes are executed
asynchronously, so we need to insert S_WAITCNT instructions
to block before accessing their results. Previously we have
just inserted S_WAITCNT instructions after each async
instruction, this patch fixes this and adds a prober
insertion pass.

Patch by: Christian König

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
llvm-svn: 172846
2013-01-18 21:15:53 +00:00
Tom Stellard be8ebeebf7 R600: Optimize and cleanup KILL on SI
We shouldn't insert KILL optimization if we don't have a
kill instruction at all.

Patch by: Christian König

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
llvm-svn: 172845
2013-01-18 21:15:50 +00:00
Bill Wendling 7754389526 Push some more methods down to hide the use of the Attribute class.
Because the Attribute class is going to stop representing a collection of
attributes, limit the use of it as an aggregate in favor of using AttributeSet.
This replaces some of the uses for querying the function attributes.

llvm-svn: 172844
2013-01-18 21:11:39 +00:00
Jack Carter 86c2c564ff This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

Removal of redundant code and formatting fixes.

Contributers: Jack Carter/Vladimir Medic
 
llvm-svn: 172842
2013-01-18 20:15:06 +00:00
Benjamin Kramer 0eba5775f3 Silence GCC warning about dropping off a non-void function.
llvm-svn: 172839
2013-01-18 19:45:22 +00:00
Daniel Dunbar a32a546dcb [Linker] Kill Linker::LoadObject which is dead, and drop the BitReader dependency again.
llvm-svn: 172838
2013-01-18 19:37:11 +00:00
Daniel Dunbar 9585612876 [MC/Mach-O] Implement integrated assembler support for linker options.
- Also, fixup syntax errors in LangRef and missing newline in the MCAsmStreamer.

llvm-svn: 172837
2013-01-18 19:37:00 +00:00
Benjamin Kramer d4c212eb60 The IR linker still depends on the bitcode reader.
llvm-svn: 172824
2013-01-18 15:03:03 +00:00
Alexey Samsonov 46c5a5549e 80 columns
llvm-svn: 172813
2013-01-18 12:49:06 +00:00
Will Dietz b9eb34e100 Move Blacklist.h to include/ to enable use from clang.
llvm-svn: 172806
2013-01-18 11:29:21 +00:00
Craig Topper 1cb8aa581b Calculate vector element size more directly for VINSERTF128/VEXTRACTF128 immediate handling. Also use MVT since this only called on legal types during pattern matching.
llvm-svn: 172797
2013-01-18 08:41:28 +00:00
Craig Topper e938138daf Minor formatting fix. No functional change.
llvm-svn: 172795
2013-01-18 07:27:20 +00:00
Craig Topper 908f7d14b5 Spelling fix: extened->extended. Trailing whitespace in same function.
llvm-svn: 172793
2013-01-18 06:50:59 +00:00
Craig Topper 01fcf2e2f2 Make more use of is128BitVector/is256BitVector in place of getSizeInBits() == 128/256.
llvm-svn: 172792
2013-01-18 06:44:29 +00:00
Craig Topper 45d9f4b569 Check for less than 0 in shuffle mask instead of -1. It's more consistent with other code related to shuffles and easier to implement in compiled code.
llvm-svn: 172788
2013-01-18 05:30:07 +00:00
Craig Topper 2ea22b0b84 Remove trailing whitespace. Remove new lines between closing brace and 'else'
llvm-svn: 172784
2013-01-18 05:09:16 +00:00
Michael Gottesman d359e06245 Fixed 80+ violation.
llvm-svn: 172782
2013-01-18 03:08:39 +00:00
Daniel Dunbar eec0f32eea [MC/Mach-O] Add support for linker options in Mach-O files.
llvm-svn: 172779
2013-01-18 01:26:07 +00:00
Daniel Dunbar 16004b8324 [MC/Mach-O] Add AsmParser support for .linker_option directive.
llvm-svn: 172778
2013-01-18 01:25:48 +00:00
Daniel Dunbar 4038fa3c82 [MC] Expose ParseEscapedString to target AsmParser implementations.
llvm-svn: 172777
2013-01-18 01:25:33 +00:00
Daniel Dunbar b94c578c0c [MC] Fix 80-col violas.
llvm-svn: 172776
2013-01-18 01:25:25 +00:00
Chad Rosier 1e8f053bd1 [ms-inline asm] Make the error message more generic now that we support the
'SIZE' and 'LENGTH' operators.

llvm-svn: 172773
2013-01-18 00:50:59 +00:00
Daniel Dunbar 50dc8a6a38 [Linker] Drop some now-dead component dependencies.
llvm-svn: 172759
2013-01-17 22:05:18 +00:00
Bill Wendling da29e00578 Reverting r171325 & r172363. This was causing a mis-compile on the self-hosted LTO build bots.
Okay, here's how to reproduce the problem:

1) Build a Release (or Release+Asserts) version of clang in the normal way.

2) Using the clang & clang++ binaries from (1), build a Release (or
   Release+Asserts) version of the same sources, but this time enable LTO ---
   specify the `-flto' flag on the command line.

3) Run the ARC migrator tests:

    $ arcmt-test --args -triple x86_64-apple-darwin10 -fsyntax-only -x objective-c++ ./src/tools/clang/test/ARCMT/cxx-rewrite.mm

You'll see that the output isn't correct (the whitespace is off).

The mis-compile is in the function `RewriteBuffer::RemoveText' in the
clang/lib/Rewrite/Core/Rewriter.cpp file. When that function and RewriteRope.cpp
are compiled with LTO and the `arcmt-test' executable is regenerated, you'll see
the error. When those files are not LTO'ed, then the output of the `arcmt-test'
is fine.

It is *really* hard to get a testcase out of this. I'll file a PR with what I
have currently.

--- Reverse-merging r172363 into '.':
U    include/llvm/Analysis/MemoryBuiltins.h
U    lib/Analysis/MemoryBuiltins.cpp

--- Reverse-merging r171325 into '.':
U    test/Transforms/InstCombine/objsize.ll
G    include/llvm/Analysis/MemoryBuiltins.h
G    lib/Analysis/MemoryBuiltins.cpp

llvm-svn: 172756
2013-01-17 21:28:46 +00:00
Daniel Dunbar 8a81c24312 [Linker] Drop support for IR-level extended linking support (archives, etc.).
- This code is dead, and the "right" way to get this support is to use the
   platform-specific linker-integrated LTO mechanisms, or the forthcoming LLVM
   linker.

llvm-svn: 172749
2013-01-17 19:52:25 +00:00
Bill Schmidt dee1ef8f53 This patch fixes PR13626 by providing i128 support in the return
calling convention.  128-bit integers are now properly returned
in GPR3 and GPR4 on PowerPC.

llvm-svn: 172745
2013-01-17 19:34:57 +00:00
Chad Rosier d0ed73acb4 [ms-inline asm] Add support for the 'SIZE' and 'LENGTH' operators.
Part of rdar://12576868

llvm-svn: 172743
2013-01-17 19:21:48 +00:00
Jyotsna Verma 9b60c1d171 Add indexed load/store instructions for offset validation check.
This patch fixes bug 14902 - http://llvm.org/bugs/show_bug.cgi?id=14902

llvm-svn: 172737
2013-01-17 18:42:37 +00:00
Michael Gottesman 1d777513e5 Added missing const from my last commit.
llvm-svn: 172736
2013-01-17 18:36:17 +00:00
Michael Gottesman 782e34474a [ObjCARC] Implemented operator<< for InstructionClass and changed a ``Visited'' Debug message to use it.
llvm-svn: 172735
2013-01-17 18:32:34 +00:00
Bill Schmidt 6b2940b01e This patch fixes the PPC calling convention to handle returns of
_Complex float and _Complex long double, by simply increasing the
number of floating point registers available for return values.

The test case verifies that the correct registers are loaded.

llvm-svn: 172733
2013-01-17 17:45:19 +00:00
Alexey Samsonov 347bcd3c5c ASan: add optional 'zero-based shadow' option to ASan passes. Always tell the values of shadow scale and offset to the runtime
llvm-svn: 172709
2013-01-17 11:12:32 +00:00
Elena Demikhovsky f6a30e05d5 Optimization for the following SIGN_EXTEND pairs:
v8i8  -> v8i64, 
v8i8  -> v8i32, 
v4i8  -> v4i64, 
v4i16 -> v4i64 
for AVX and AVX2.

Bug 14865.

llvm-svn: 172708
2013-01-17 09:59:53 +00:00
Craig Topper c7e6feee42 Combine AVX and SSE forms of MOVSS and MOVSD into the same multiclasses so they get instantiated together.
llvm-svn: 172704
2013-01-17 06:59:42 +00:00
Eric Christopher 4c7765f166 Fix the assembly and dissassembly of DW_FORM_sec_offset. Found this by
changing both the string of the dwo_name to be correct and the type of
the statement list.

Testcases all around.

llvm-svn: 172699
2013-01-17 03:00:04 +00:00
Eric Christopher 1826617133 Add the DW_AT_GNU_addr_base for the skeleton cu. Add support for
emitting the dwarf32 version of DW_FORM_sec_offset and correct
disassembler support.

llvm-svn: 172698
2013-01-17 02:59:59 +00:00
Jakob Stoklund Olesen 965665bb48 Move MachineTraceMetrics.h into include/llvm/CodeGen.
Let targets use it.

llvm-svn: 172688
2013-01-17 01:06:04 +00:00
Jakob Stoklund Olesen 213a2f8b3f Provide a place for targets to insert ILP optimization passes.
Move the early if-conversion pass into this group.

ILP optimizations usually need to find the right balance between
register pressure and ILP using the MachineTraceMetrics analysis to
identify critical paths and estimate other costs. Such passes should run
together so they can share dominator tree and loop info analyses.

Besides if-conversion, future passes to run here here could include
expression height reduction and ARM's MLxExpansion pass.

llvm-svn: 172687
2013-01-17 00:58:38 +00:00
Jack Carter 2a74a87b71 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

The Mips RDHWR (Read Hardware Register) instruction was not 
tested for assembler or dissassembler consumption. This patch
adds that functionality.

Contributer: Vladimir Medic
 
llvm-svn: 172685
2013-01-17 00:28:20 +00:00