Commit Graph

284430 Commits

Author SHA1 Message Date
Rui Ueyama 301305fd3d Use exact uint32_t for uint32_t ELF field. NFC.
llvm-svn: 326934
2018-03-07 19:25:36 +00:00
Rui Ueyama 5aa2db1e12 Initialize a member in C++11 style. NFC.
llvm-svn: 326933
2018-03-07 19:25:27 +00:00
Rafael Auler 7fdf44440c [DebugInfo] Support DWARF expressions in eh_frame
This patch enhances DWARFDebugFrame with the capability of parsing and
printing DWARF expressions in CFI instructions. It also makes FDEs and
CIEs accessible to lib users, so they can process them in client tools
that rely on LLVM. To make it self-contained with a test case, it
teaches llvm-readobj to be able to dump EH frames and checks they are
correct in a unit test. The llvm-readobj code is Maksim Panchenko's work
(maksfb).

Reviewers: JDevlieghere, espindola

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D43313

llvm-svn: 326932
2018-03-07 19:19:51 +00:00
Matt Morehouse 915b4dbf8a [lld] Attempt to appease buildbot.
r326903 broke the conflict-debug-variable.s test.

llvm-svn: 326931
2018-03-07 19:18:14 +00:00
Simon Pilgrim dc1a0385ee [X86][SSE] Regenerate float maxnum/minnum tests
llvm-svn: 326930
2018-03-07 19:14:05 +00:00
Zachary Turner 49f8674c28 Fix a bug regarding a mis-identified file type in pdbutil.
llvm-svn: 326929
2018-03-07 19:12:36 +00:00
Yan Zhang c7faee73cc do not register matcher for objc-only checks when analyzing non-objc sources to save resources
Summary: I did not put lang opt check in AvoidSpinlockCheck since OSSpinLock is not objc specific. We won't want to skip it when analyzing some C++ target used by other ObjC sources.

Reviewers: hokein, benhamilton

Reviewed By: benhamilton

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D44174

llvm-svn: 326928
2018-03-07 18:59:25 +00:00
Zachary Turner aac28f31b3 Update a few switch statements to handle file_magic::pdb.
This fixes a couple of warnings.

llvm-svn: 326927
2018-03-07 18:58:33 +00:00
Reid Kleckner b2da086103 Push a function scope when parsing function bodies without a declaration
Summary:
This is PR36536.

There are a few ways to reach Sema::ActOnStartOfFunctionDef with a null
Decl. Currently, the parser continues on to attempt to parse the
statements in the function body without pushing a function scope or
declaration context. However, lots of statement parsing logic relies on
getCurFunction() returning something reasonable. It turns out that
getCurFunction() will never return null today because of an optimization
where Sema pre-allocates one FunctionScopeInfo and reuses it when
possible. This goes wrong when something inside the function body causes
us to push another function scope, such as requiring an implicit
definition of a special member function. Reusing the state clears it
out, which will lead to bugs. In PR36536, we found that the SwitchStack
gets unbalanced, because we push a switch, clear out the stack, and then
try to pop a switch that isn't there.

As a follow-up, I plan to move the pre-allocated FunctionScopeInfo out
of the FunctionScopes stack. This means the FunctionScopes stack will
often be empty, and callers of getCurFunction() will need to check for
null.

Reviewers: thakis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43980

llvm-svn: 326926
2018-03-07 18:55:10 +00:00
Roorda, Jan-Willem 4b8bcf007b [Pipeliner] Fixed node order issue related to zero latency edges
Summary:
A desired property of the node order in Swing Modulo Scheduling is
that for nodes outside circuits the following holds: none of them is
scheduled after both a successor and a predecessor. We call
node orders that meet this property valid.

Although invalid node orders do not lead to the generation of incorrect
code, they can cause the pipeliner not being able to find a pipelined schedule
for arbitrary II. The reason is that after scheduling the successor and the
predecessor of a node, no room may be left to schedule the node itself.

For data flow graphs with 0-latency edges, the node ordering algorithm
of Swing Modulo Scheduling can generate such undesired invalid node orders.
This patch fixes that.

In the remainder of this commit message, I will give an example
demonstrating the issue, explain the fix, and explain how the the fix is tested.

Consider, as an example, the following data flow graph with all
edge latencies 0 and all edges pointing downward.

```
   n0
  /  \
n1    n3
  \  /
   n2
    |
   n4
```

Consider the implemented node order algorithm in top-down mode. In that mode,
the algorithm orders the nodes based on greatest Height and in case of equal
Height on lowest Movability. Finally, in case of equal Height and
Movability, given two nodes with an edge between them, the algorithm prefers
the source-node.

In the graph, for every node, the Height and Movability are equal to 0.
As will be explained below, the algorithm can generate the order n0, n1, n2, n3, n4.
So, node n3 is scheduled after its predecessor n0 and after its successor n2.

The reason that the algorithm can put node n2 in the order before node n3,
even though they have an edge between them in which node n3 is the source,
is the following: Suppose the algorithm has constructed the partial node
order n0, n1. Then, the nodes left to be ordered are nodes n2, n3, and n4. Suppose
that the while-loop in the implemented algorithm considers the nodes in
the order n4, n3, n2. The algorithm will start with node n4, and look for
more preferable nodes. First, node n4 will be compared with node n3. As the nodes
have equal Height and Movability and have no edge between them, the algorithm
will stick with node n4. Then node n4 is compared with node n2. Again the
Height and Movability are equal. But, this time, there is an edge between
the two nodes, and the algorithm will prefer the source node n2.
As there are no nodes left to compare, the algorithm will add node n2 to
the node order, yielding the partial node order n0, n1, n2. In this way node n2
arrives in the node-order before node n3.

To solve this, this patch introduces the ZeroLatencyHeight (ZLH) property
for nodes. It is defined as the maximum unweighted length of a path from the
given node to an arbitrary node in which each edge has latency 0.
So, ZLH(n0)=3, ZLH(n1)=ZLH(n3)=2, ZLH(n2)=1, and ZLH(n4)=0

In this patch, the preference for a greater ZeroLatencyHeight
is added in the top-down mode of the node ordering algorithm, after the
preference for a greater Height, and before the preference for a
lower Movability.

Therefore, the two allowed node-orders are n0, n1, n3, n2, n4 and n0, n3, n1, n2, n4.
Both of them are valid node orders.

In the same way, the bottom-up mode of the node ordering algorithm is adapted
by introducing the ZeroLatencyDepth property for nodes.

The patch is tested by adding extra checks to the following existing
lit-tests:
test/CodeGen/Hexagon/SUnit-boundary-prob.ll
test/CodeGen/Hexagon/frame-offset-overflow.ll
test/CodeGen/Hexagon/vect/vect-shuffle.ll

Before this patch, the pipeliner failed to pipeline the loops in these tests
due to invalid node-orders. After the patch, the pipeliner successfully
pipelines all these loops.

Reviewers: bcahoon

Reviewed By: bcahoon

Subscribers: Ayal, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D43620

llvm-svn: 326925
2018-03-07 18:53:36 +00:00
Zachary Turner d860fa6400 Teach identify_file_magic to identify PDB files.
llvm-svn: 326924
2018-03-07 18:40:41 +00:00
Stefan Pintilie f8c2dce236 [PowerPC] Move test to correct location.
Test was added in r326906 to an incorrect location.
Moving the test to PPC CodeGen directory as the test is PPC specific.

llvm-svn: 326923
2018-03-07 18:27:10 +00:00
Alexey Bataev ab4ea225fe [OPENMP] Fix lifetime of the loop counters.
We may emit incorrect lifetime info during codegen for loop counters in
OpenMP constructs because of automatic scope cleanup when we needed
temporarily locations for private loop counters.

llvm-svn: 326922
2018-03-07 18:17:06 +00:00
Petr Hosek 2d19f9036e [Fuzzer] Avoid the unnecessary rebuild of the custom libc++
This changes the add_custom_libcxx macro to resemble the
llvm_ExternalProject_Add. The primary motivation is to avoid
unnecessary libFuzzer rebuilds that are being done on every
Ninja/Make invocation. The libc++ should be only rebuilt whenever
the libc++ source itself changes.

Differential Revision: https://reviews.llvm.org/D43213

llvm-svn: 326921
2018-03-07 18:14:09 +00:00
Zachary Turner 69f3347b56 Write a hash of the executable into the PE timestamp fields.
Windows tools treats the timestamp fields as sort of a build id,
using it to archive executables on a symbol server, as well as
for matching executables to PDBs.  We were writing 0 for these
fields, which would cause symbol servers to break as they are
indexed in the symbol server based on this value.

Although the field is called timestamp, it can really be any
value that is unique per build, so to support reproducible builds
we use a hash of the executable here.

Differential Revision: https://reviews.llvm.org/D43978

llvm-svn: 326920
2018-03-07 18:13:41 +00:00
Davide Italiano c0311fe19b [lldbtestsuite] llvm-objcopy is now required to run the lit tests.
There's now a test using llvm-objcopy in lit/.
This doesn't fail on the bot(s) because `llvm-objcopy` is probably
already available there, but if you get a fresh checkout and run
`ninja check-lldb` you'll observe the failure as it's not tracking
the dependency correctly. This fixes the problem on my machine,
and probably everywhere else.

llvm-svn: 326919
2018-03-07 18:06:12 +00:00
George Rimar bf3c384673 [ELF] - Adjust rangeToString to report ranges in a different format.
It was raised during the review of D43819.

LLD usually use [X, Y] for reporting ranges, like below:
"relocation R_386_16 out of range: 65536 is not in [0, 65535]"

Patch changes rangeToString() to do the same.

Differential revision: https://reviews.llvm.org/D44207

llvm-svn: 326918
2018-03-07 17:54:25 +00:00
Craig Topper c3c15dd640 [X86] Make the MUL->VPMADDWD work before op legalization on AVX1 targets. Simplify feature checks by using isTypeLegal.
The v8i32 conversion on AVX1 targets was only working after LowerMUL splits 256-bit vectors.

While I was there I've also made it so we don't have to check for AVX2 and BWI directly and instead just ask if the type is legal.

Differential Revision: https://reviews.llvm.org/D44190

llvm-svn: 326917
2018-03-07 17:53:18 +00:00
Craig Topper 8665f59e2c [Support] Stop passing StringRefs by const reference in some of the getHostCPUname implementations. NFC
llvm-svn: 326916
2018-03-07 17:53:16 +00:00
Krzysztof Parzyszek 2c3edf0567 [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones
This is a follow-up to r325169, this time for all types, not just HVX
vector types.

Disable this by default, since it's not always safe. 

llvm-svn: 326915
2018-03-07 17:27:18 +00:00
Rui Ueyama b0084a0eee Revert r326911: Improve --warn-symbol-ordering.
This reverts commit r326911 because it was committed by accident.

llvm-svn: 326914
2018-03-07 17:24:46 +00:00
Sanjay Patel 7b7224051c [LangRef] fix formatting in FP descriptions; NFC
This is a clean-up step to reduce diffs ahead of real
changes to the FP semantics as discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2018-February/121444.html

llvm-svn: 326913
2018-03-07 17:18:22 +00:00
Rui Ueyama e1847da924 Rename Indent{1,2} -> Indent{8,16}.
llvm-svn: 326912
2018-03-07 17:15:15 +00:00
Rui Ueyama ebfab927d9 Improve --warn-symbol-ordering.
Summary:
I originally tried to simplify code and then noticed that lld doesn't
do what it tells to the user by warn(). It says "unable to order
discarded symbol" but it actually can for sections eliminated by ICF.
With this patch, lld doesn't sort such sections.

Reviewers: jhenderson, rafael

Subscribers: emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D44180

llvm-svn: 326911
2018-03-07 17:15:06 +00:00
Farhana Aleen 89196642f7 [AMDGPU] Increased vector length for global/constant loads.
Summary: GCN ISA supports instructions that can read 16 consecutive dwords from memory through the scalar data cache;
         loadstoreVectorizer should take advantage of the wider vector length and pack 16/8 elements of dwords/quadwords.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D44179

llvm-svn: 326910
2018-03-07 17:09:18 +00:00
Fangrui Song c0e768df90 [clang-tidy] Add "portability" module and rename readability-simd-intrinsics to portability-simd-intrinsics
Reviewers: alexfh

Subscribers: klimek, nemanjai, mgorny, xazax.hun, kbarton, cfe-commits

Differential Revision: https://reviews.llvm.org/D44173

llvm-svn: 326909
2018-03-07 16:57:42 +00:00
Justin Lebar eccfbf1bcd Re-land: Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions.
Summary:
If the operands of a udiv/urem can be proved to fit within a smaller
power-of-two-sized type, reduce the width of the udiv/urem.

Backed out for failing an assert in clang bootstrap builds.  Re-landing
with a fix for handling non-power-of-two inputs (e.g. udiv i24).

Original Differential Revision: https://reviews.llvm.org/D44102

llvm-svn: 326908
2018-03-07 16:56:49 +00:00
Farhana Aleen 347d12b4ce Revert "[AMDGPU] Widened vector length for global/constant address space."
This reverts commit ce988cc100dc65e7c6c727aff31ceb99231cab03.

llvm-svn: 326907
2018-03-07 16:55:27 +00:00
Stefan Pintilie f8438e8e59 [PowerPC] LSR tunings for PowerPC
The purpose of this patch is to have LSR generate better code on Power.
This is done by overriding isLSRCostLess.

Differential Revision: https://reviews.llvm.org/D40855

llvm-svn: 326906
2018-03-07 16:53:09 +00:00
Wei Mi 984ab0f1e6 [SampleFDO] Extend SampleProfReader to handle demangled names.
SampleProfReader assumes function names in the profile are all mangled names.
However, there are cases that few demangled names are somehow contained in
the profile (usually because of debug info problems), which may trigger parsing
error in SampleProfReader and cause the whole profile to be unusable. The patch
extends SampleProfReader to handle profiles with demangled names, so that those
profiles can still be useful.

Differential revision: https://reviews.llvm.org/D44161

llvm-svn: 326905
2018-03-07 16:45:33 +00:00
Farhana Aleen 0d03d0588d [AMDGPU] Widened vector length for global/constant address space.
llvm-svn: 326904
2018-03-07 16:29:05 +00:00
Jonas Devlieghere bf8596f9cf [dwarfdump] Only print CU relative offset in verbose mode
Instead of only printing the CU-relative offset in non-verbose mode, it
makes more sense to only printed the resolved address. In verbose mode
we still print both.

Differential revision: https://reviews.llvm.org/D44148

rdar://33525475

llvm-svn: 326903
2018-03-07 16:28:53 +00:00
Alexander Kornienko e12a48bcc0 Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
This reverts commit r326839.

r326839 breaks assembly file parsing:

$ cat q.c
void g() {}
$ clang -S q.c -g
$ clang -g -c q.s
q.s:9:2: error: file number already allocated
     .file   1 "/tmp/test" "q.c"
     ^

llvm-svn: 326902
2018-03-07 16:27:44 +00:00
Kostya Kortchinsky e245ec0cf0 [scudo] Make logging more consistent
Summary:
A few changes related to logging:
- prepend `Scudo` to the error messages so that users can identify that we
  reported an error;
- replace a couple of `Report` calls in the RSS check code with
  `dieWithMessage`/`Print`, mark a condition as `UNLIKELY` in the process;
- change some messages so that they all look more or less the same. This
  includes the `CHECK` message;
- adapt a couple of tests with the new strings.

A couple of side notes: this results in a few 1-line-blocks, for which I left
brackets. There doesn't seem to be any style guide for that, I can remove them
if need be. I didn't use `SanitizerToolName` in the strings, but directly
`Scudo` because we are the only users, I could change that too.

Reviewers: alekseyshl, flowerhack

Reviewed By: alekseyshl

Subscribers: mgorny, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D44171

llvm-svn: 326901
2018-03-07 16:22:16 +00:00
Justin Lebar eeeb0eb049 Revert rL326898: "Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions."
Breaks bootstrap builds: clang built with this patch asserts while
building MCDwarf.cpp: Assertion `castIsValid(op, S, Ty) && "Invalid
cast!"' failed.

llvm-svn: 326900
2018-03-07 16:05:43 +00:00
James Henderson cb4c19f315 [ELF] Prevent crash when reporting errors if debug line cannot be parsed
LLD uses the debug info and debug line sections to determine the location of
e.g. references to undefined symbols, when producing error messages. In the
event that debug info was present, but debug line parsing failed for some
reason, then a nullptr would end up being dereferenced by the location-lookup
code.

Differential Revision: https://reviews.llvm.org/D44205

Reviewers: grimar
llvm-svn: 326899
2018-03-07 15:22:58 +00:00
Justin Lebar cb9e89c39b Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions.
Summary:
If the operands of a udiv/urem can be proved to fit within a smaller
power-of-two-sized type, reduce the width of the udiv/urem.

Reviewers: spatel, sanjoy

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D44102

llvm-svn: 326898
2018-03-07 15:11:13 +00:00
Simon Pilgrim eab108ba39 [X86][X87] Add X87 fp80 conversion tests
llvm-svn: 326897
2018-03-07 14:13:14 +00:00
Nicholas Wilson dbd90bf8d1 [WebAssembly] Run clang-format. NFC
llvm-svn: 326896
2018-03-07 13:28:16 +00:00
George Rimar 527bfd7a48 [ELF] - Recommit r326892,r326893 "[ELF] - Report LMA region overflows."
With fix: add missing "RUN:" prefix to test case.

Original commit message:
We do not report LMA region overflows currently.
Both GNU linkers do that. The patch implements it.

Differential revision: https://reviews.llvm.org/D44094

llvm-svn: 326895
2018-03-07 12:44:18 +00:00
George Rimar 06846c2251 [ELF] - Revert r326892, r326893.
Bots are still unhappy:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/26259

llvm-svn: 326894
2018-03-07 12:33:00 +00:00
George Rimar 64b2ba1f81 [ELF] - Fix build bot after r326892 "[ELF] - Report LMA region overflows."
Removed excessive line from testcase.

llvm-svn: 326893
2018-03-07 12:16:26 +00:00
George Rimar 97e054e00d [ELF] - Report LMA region overflows.
We do not report LMA region overflows currently.
Both GNU linkers do that. The patch implements it.

Differential revision: https://reviews.llvm.org/D44094

llvm-svn: 326892
2018-03-07 11:54:30 +00:00
George Rimar 54baa5f45f [ELF] - Allow discarding .hash and .gnu.hash from linker script.
Currently, LLD segfaults when linker script attempts to discard
one of the hash sections. This patch fixes that.

Differential revision: https://reviews.llvm.org/D44012

llvm-svn: 326891
2018-03-07 11:47:15 +00:00
Simon Dardis 52ae4f078e [mips] Correct the definition of m(f|t)c(0|2)
These instructions are defined as taking a GPR register and a
coprocessor register for ISAs up to MIPS32. MIPS32 extended the
definition to allow a selector--a value from 0 to 32--to access
another register.

These instructions are now internally defined as being MIPS-I
instructions, but are rejected for pre-MIPS32 ISA's if they have
an explicit selector which is non-zero. This deviates slightly from
GAS's behaviour which rejects assembly instructions with an
explicit selector for pre-MIPS32 ISAs.

E.g:

mfc0 $4, $5, 0
is rejected by GAS for MIPS-I to MIPS-V but will be accepted
with this patch for MIPS-I to MIPS-V.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D41662

llvm-svn: 326890
2018-03-07 11:39:48 +00:00
Yuka Takahashi ba900ab93d Add Clang ReleaseNotes that --autocomplete breaks backward compatibily
Summary:
--autocomplete flag now handles all the flags passed to shell, and this
implementation breaks backward compatibily before Clang 6.0.

Reviewers: teemperor, v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D44191

llvm-svn: 326889
2018-03-07 11:34:02 +00:00
Nicholas Wilson 06e0d17cf5 [WebAssembly] Remove duplicated line of code and unreachable check. NFC
Differential Revision: https://reviews.llvm.org/D44146

llvm-svn: 326888
2018-03-07 11:15:47 +00:00
Nicholas Wilson 8269f37ce6 [WebAssembly] Use StringSaver to retain ownership of ctor function body. NFC
Differential Revision: https://reviews.llvm.org/D44149

llvm-svn: 326885
2018-03-07 10:37:50 +00:00
Sven van Haastregt 19f531d31e [LoadStoreVectorizer] Differentiate between <1 x T> and T
The LoadStoreVectorizer thought that <1 x T> and T were the same types
when merging stores, leading to a crash later.

Patch by Erik Hogeman.

Differential Revision: https://reviews.llvm.org/D44014

llvm-svn: 326884
2018-03-07 10:29:28 +00:00
Kamil Rytarowski 9b996f03cb Don't intercept mmap64() on NetBSD
Disable SANITIZER_INTERCEPT_MMAP64 for SI_NETBSD.

NetBSD switched to 64-bit offsets almost 30 years ago on 32-bit platforms
and never needed mmap64() concept.

llvm-svn: 326883
2018-03-07 09:16:10 +00:00