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Author SHA1 Message Date
Valery Pykhtin 8a89d3662a [AMDGPU] Expand vector mulhu/mulhs 
Differential revision: https://reviews.llvm.org/D26077

llvm-svn: 285684
 2016-11-01 10:26:48 +00:00
Changpeng Fang 71369b3a39 AMDGPU/SI: Enable load-store-opt by default. 
Summary: Enable load-store-opt by default, and update LIT tests.

Reviewers: arsenm

Differential Revision: http://reviews.llvm.org/D20694

llvm-svn: 270894
 2016-05-26 19:35:29 +00:00
Matt Arsenault 81a709503d AMDGPU: Fix high bits after division optimization 
This is essentially doing a 24-bit signed division with FP.
We need to truncate to the N bit result.

llvm-svn: 270305
 2016-05-21 01:53:33 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00