ff21565821
Provide crazy pseudos for regpairs spills / reloads
...
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
7fa0ce1a21
Handle long-disp stuff more consistently
...
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
30e1cb2ab9
All FP instructions have 12 bit memory displacement field
...
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
5b03970c7b
Another predicate routine
...
llvm-svn: 76057
2009-07-16 14:33:01 +00:00
5761e33ce4
More helpers
...
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
b22afc7bcc
Add bunch of branch folding stuff
...
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
0f8c47a7bb
Add missed opcodes to short => long displacement conversion
...
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
201d49d56a
Cleanup
...
llvm-svn: 76053
2009-07-16 14:31:32 +00:00
3ae30e08ef
Fix logic inversion for RI-mode address selection
...
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
4121039bef
Expand 32-bit bitconverts via memory
...
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
bc2ead6ea3
Fix incomin arg stack frame offset in case we need to generate stack frame
...
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
3729850b50
Fix instruction mnemonics for some fp_to_sint operations
...
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
a293caf2ed
i32 values are passed extended also on stack. Handle this in generic way
...
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
1fa01d307c
We definitely have 1-0 bools
...
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
bd41c83ab0
Revert the commit, it just hides the real bug
...
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
6fb6e09781
Out GR128 regclass is not a 'real' i128 one.
...
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
fef4a3b762
Add missed condbranch opcodes
...
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
6c01db428f
Handle bitconverts
...
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
70d0bceed6
Unbreak mvi and friends - emit only 'significant' part of the operand
...
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
573fab1879
Expand fp_to_uint too
...
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
d57f8cee1d
We don't have FP truncstores
...
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
3f254d536a
Expand uint_to_fp
...
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
1ae8098144
Emit proper rounding mode for fp_to_sint
...
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
35a5d6f7ca
f32/f64 regs are stored on stack if we're short in FP regs
...
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
2acdac0f8e
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
...
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
8c18d8972c
Make FP zero to be legal FP immediate via LOAD ZERO
...
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
3894c8b6c2
Loads are not two-address in any way
...
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
c8f76f47dd
Add LOAD NEGATIVE instruction
...
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
ae2d8abf2c
LOAD COMPLEMENT instruction is not really two-addr
...
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
82af42d361
Add multiple add/sub instructions
...
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
b106b60456
Handle FP callee-saved regs
...
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
871784ba88
Proper FP extloads
...
llvm-svn: 76028
2009-07-16 14:22:46 +00:00
12400008a7
Add proper PWS impdef's
...
llvm-svn: 76027
2009-07-16 14:22:30 +00:00
3c44a39156
Propagate FP select_cc to dag inserters
...
llvm-svn: 76026
2009-07-16 14:22:15 +00:00
430ab4f382
Implement fp_to_sint
...
llvm-svn: 76025
2009-07-16 14:21:57 +00:00
345e08d24c
Implement FP regs spills / restores
...
llvm-svn: 76024
2009-07-16 14:21:41 +00:00
0fcdd8d424
Add fabs
...
llvm-svn: 76023
2009-07-16 14:21:27 +00:00
50485d65d4
Add fneg
...
llvm-svn: 76022
2009-07-16 14:21:12 +00:00
d7416e7c0b
We don't have native sine / cosine instructions
...
llvm-svn: 76021
2009-07-16 14:20:56 +00:00
77928399b0
More sint_to_fp stuff
...
llvm-svn: 76020
2009-07-16 14:20:39 +00:00
8195797de2
Add bunch of FP instructions
...
llvm-svn: 76019
2009-07-16 14:20:24 +00:00
45a56de726
We don't have any FP extloads
...
llvm-svn: 76018
2009-07-16 14:20:08 +00:00
ead9b9fb31
Implement all comparisons
...
llvm-svn: 76017
2009-07-16 14:19:54 +00:00
7cb00653c1
Add constpool lowering / printing
...
llvm-svn: 76016
2009-07-16 14:19:35 +00:00
c806cea4cb
Allow FP arguments pass / return
...
llvm-svn: 76015
2009-07-16 14:19:16 +00:00
923b47e89d
Register FP regclasses
...
llvm-svn: 76014
2009-07-16 14:19:02 +00:00
5509b58cd7
Add FP regs
...
llvm-svn: 76013
2009-07-16 14:18:48 +00:00
570d0c36ee
Fix fallout from prev. patch
...
llvm-svn: 76012
2009-07-16 14:18:31 +00:00
b25949b0f5
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
...
llvm-svn: 76011
2009-07-16 14:18:17 +00:00
e5b04d7102
Use divide single for 32 bit signed divides
...
llvm-svn: 76010
2009-07-16 14:17:52 +00:00
2799032a45
Add missed operands types
...
llvm-svn: 76009
2009-07-16 14:17:07 +00:00
5fd5c3efb6
Missed part of prev. patch
...
llvm-svn: 76008
2009-07-16 14:16:45 +00:00
b950f1961b
Another attempt to fix prologue emission
...
llvm-svn: 76007
2009-07-16 14:16:26 +00:00
091872cb37
Implement 'large' PIC model
...
llvm-svn: 76006
2009-07-16 14:16:05 +00:00
569a94c4d0
Implement shifts properly (hopefilly - finally!)
...
llvm-svn: 76005
2009-07-16 14:15:24 +00:00
e0ad108f04
Remove redundand register move
...
llvm-svn: 76004
2009-07-16 14:14:54 +00:00
fe8df8ff61
Properly handle divides. As a bonus - implement memory versions of them.
...
llvm-svn: 76003
2009-07-16 14:14:33 +00:00
68b101a0e1
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
...
llvm-svn: 76002
2009-07-16 14:14:01 +00:00
1de4295372
32 bit rotate is not twoaddr instruction
...
llvm-svn: 76001
2009-07-16 14:13:43 +00:00
34ad780d0d
32 bit shifts have only 12 bit displacements
...
llvm-svn: 76000
2009-07-16 14:13:24 +00:00
6759661c3f
Add proper register aliases
...
llvm-svn: 75999
2009-07-16 14:12:54 +00:00
a3157b1c9c
Properly generate stack frame
...
llvm-svn: 75998
2009-07-16 14:12:36 +00:00
6f3d11cf0b
Unbreak indirect branches
...
llvm-svn: 75997
2009-07-16 14:12:18 +00:00
2300eaa828
Unbreak
...
llvm-svn: 75996
2009-07-16 14:12:00 +00:00
20237e5071
Do not forget to save R15 when we allocate stack frame
...
llvm-svn: 75995
2009-07-16 14:11:40 +00:00
427dce8678
All calls clobbers R14
...
llvm-svn: 75994
2009-07-16 14:11:22 +00:00
2e574c156e
Unbreak calls to vararg functions
...
llvm-svn: 75993
2009-07-16 14:11:03 +00:00
466f2e4b00
Stupid typo
...
llvm-svn: 75992
2009-07-16 14:10:49 +00:00
d8458e6c09
Typos
...
llvm-svn: 75991
2009-07-16 14:10:35 +00:00
1eb6262b4b
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
...
llvm-svn: 75990
2009-07-16 14:10:17 +00:00
3db6283188
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.
...
llvm-svn: 75989
2009-07-16 14:09:56 +00:00
62f8515b1c
Add support for 12 bit displacements
...
llvm-svn: 75988
2009-07-16 14:09:35 +00:00
432d4cd915
We already have reserved call frame regardless whether variable sized frame objects were present or not
...
llvm-svn: 75987
2009-07-16 14:09:04 +00:00
43d33bd6d2
Emit proper lowering of load from arg stack slot
...
llvm-svn: 75986
2009-07-16 14:08:42 +00:00
a8197bb651
Implement dynamic allocas
...
llvm-svn: 75985
2009-07-16 14:08:15 +00:00
7193e2670e
Add jump tables
...
llvm-svn: 75984
2009-07-16 14:07:50 +00:00
5dfac244a0
Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
...
llvm-svn: 75983
2009-07-16 14:07:24 +00:00
d52a95f170
Implement 64 bit immediates
...
llvm-svn: 75982
2009-07-16 14:07:06 +00:00
2ff298fad0
Add rotates
...
llvm-svn: 75981
2009-07-16 14:06:49 +00:00
9362d9aa76
Add patterns for integer negate
...
llvm-svn: 75980
2009-07-16 14:06:27 +00:00
f07c7941f0
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
...
llvm-svn: 75979
2009-07-16 14:06:00 +00:00
59049d9176
Add 32 bit and reg-imm and disable invalid patterns for now
...
llvm-svn: 75978
2009-07-16 14:05:32 +00:00
2d218394c6
Add z9 and z10 target processors. Mark z10-only instructions as such.
...
llvm-svn: 75977
2009-07-16 14:05:00 +00:00
68b8486fde
Fix MUL64rm instruction asmprinting
...
llvm-svn: 75976
2009-07-16 14:04:38 +00:00
edba6f3af7
Preliminary asmprinting of globals
...
llvm-svn: 75975
2009-07-16 14:04:22 +00:00
a2afc692f6
Implement asmprinting for odd-even regpairs
...
llvm-svn: 75974
2009-07-16 14:04:01 +00:00
ec66c122e0
32-bit ri addressing mode has only 12-bit displacement
...
llvm-svn: 75973
2009-07-16 14:03:41 +00:00
7b2353595d
Forgot to add
...
llvm-svn: 75972
2009-07-16 14:03:24 +00:00
12b4b7c5f6
Do not put bunch of target-specific stuff into common namespace
...
llvm-svn: 75971
2009-07-16 14:03:08 +00:00
59ef95bfc1
Print signed imms properly
...
llvm-svn: 75970
2009-07-16 14:02:45 +00:00
5af8f0ebf1
Provide hooks for spilling / restoring stuff
...
llvm-svn: 75969
2009-07-16 14:01:27 +00:00
b284c9d876
Revert thinko
...
llvm-svn: 75968
2009-07-16 14:01:10 +00:00
abbae3bc5e
Temporary workaround problem with signed 32-bit imm's
...
llvm-svn: 75967
2009-07-16 14:00:42 +00:00
ace2a02a84
Implement InsertBranch() hook
...
llvm-svn: 75966
2009-07-16 14:00:10 +00:00
73bf01f236
Pipehole pattern for i32 imm's
...
llvm-svn: 75965
2009-07-16 13:59:49 +00:00
ff1edc23ac
Bunch of sext_inreg patterns
...
llvm-svn: 75964
2009-07-16 13:59:18 +00:00
c3170f5236
Provide normal 32 bit load and store
...
llvm-svn: 75963
2009-07-16 13:58:43 +00:00
d568f6dce2
Proper lower 'small' results
...
llvm-svn: 75962
2009-07-16 13:58:24 +00:00
f1bf3176c6
Completel forgot about unconditional branches
...
llvm-svn: 75961
2009-07-16 13:57:52 +00:00
15d6e8785b
Lower addresses of globals
...
llvm-svn: 75960
2009-07-16 13:57:27 +00:00
f0d7d6ce65
Provide "wide" muls and divs/rems
...
llvm-svn: 75958
2009-07-16 13:56:42 +00:00
d919010b6a
Fix thinko
...
llvm-svn: 75957
2009-07-16 13:56:11 +00:00
4ee0acd326
Fix epic bug with invalid regclass for R0D
...
llvm-svn: 75956
2009-07-16 13:55:51 +00:00
590f99b18b
More register pairs (now 32 bit ones)
...
llvm-svn: 75954
2009-07-16 13:55:04 +00:00
ccde90b83c
Add even-odd register pairs
...
llvm-svn: 75953
2009-07-16 13:54:45 +00:00
31e9a53d17
Unbreak due to mainline api change
...
llvm-svn: 75952
2009-07-16 13:54:20 +00:00
071178ea15
Preliminary mul lowering
...
llvm-svn: 75951
2009-07-16 13:53:55 +00:00
23e3c6657c
More extloads
...
llvm-svn: 75950
2009-07-16 13:53:35 +00:00
0f59e1e874
SELECT_CC lowering
...
llvm-svn: 75948
2009-07-16 13:52:51 +00:00
ac4fb7f977
Conditional branches and comparisons
...
llvm-svn: 75947
2009-07-16 13:52:31 +00:00
11665a64b0
Emit correct offset for PseudoSourceValue
...
llvm-svn: 75946
2009-07-16 13:52:10 +00:00
29329a0695
Provide proper stack offsets for outgoing arguments
...
llvm-svn: 75945
2009-07-16 13:51:53 +00:00
44483f9eb3
Change register allocation order to reduce amount of callee-saved regs to be spilled.
...
llvm-svn: 75944
2009-07-16 13:51:34 +00:00
8695a30066
Emit callee-saved regs spills / restores
...
llvm-svn: 75943
2009-07-16 13:51:12 +00:00
d694b9ff8b
Some preliminary call lowering
...
llvm-svn: 75941
2009-07-16 13:50:21 +00:00
018599fc0b
Prologue / epilogue emission
...
llvm-svn: 75940
2009-07-16 13:49:49 +00:00
09890bd434
Add simple frame index elimination
...
llvm-svn: 75939
2009-07-16 13:49:25 +00:00
8a095bf56d
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
...
llvm-svn: 75937
2009-07-16 13:48:42 +00:00
19911b338a
Do not truncate sign bits for negative imms
...
llvm-svn: 75936
2009-07-16 13:48:23 +00:00
405833dfb6
Add address computation stuff
...
llvm-svn: 75935
2009-07-16 13:47:59 +00:00
b1e35b311c
Cleanup
...
llvm-svn: 75934
2009-07-16 13:47:36 +00:00
df99232d27
Add mem-imm stores
...
llvm-svn: 75933
2009-07-16 13:47:14 +00:00
98dfc8c2c4
[PATCH 023/155] Typo
...
llvm-svn: 75932
2009-07-16 13:45:22 +00:00
44f8bbfb3f
Add stores and truncstores
...
llvm-svn: 75931
2009-07-16 13:45:00 +00:00
11b91b4e2e
Add patterns for various extloads
...
llvm-svn: 75930
2009-07-16 13:44:30 +00:00
0179364392
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
...
llvm-svn: 75929
2009-07-16 13:44:00 +00:00
3709f49ee9
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
...
llvm-svn: 75928
2009-07-16 13:43:40 +00:00
04be818918
Add shifts and reg-imm address matching
...
llvm-svn: 75927
2009-07-16 13:43:18 +00:00
cf7ea6a94f
Add bunch of 32-bit patterns... Uffff :)
...
llvm-svn: 75926
2009-07-16 13:42:31 +00:00
293324104b
Add 32 bit subregs
...
llvm-svn: 75923
2009-07-16 13:35:30 +00:00
de517f1e32
Add another bunch of reg-imm patterns for add/or/and/xor
...
llvm-svn: 75922
2009-07-16 13:35:08 +00:00
ebe2de0e14
Add bunch of reg-imm movs
...
llvm-svn: 75921
2009-07-16 13:34:50 +00:00
168614f54f
Proper match halfword-imm operands for mov and add
...
llvm-svn: 75920
2009-07-16 13:34:24 +00:00
28234bcde2
Provide masked reg-imm 'or' and 'and'
...
llvm-svn: 75919
2009-07-16 13:33:57 +00:00
0d76b17a78
Add reg-reg and pattern
...
llvm-svn: 75917
2009-07-16 13:32:49 +00:00
f9fe4036f2
Add sub reg-reg pattern
...
llvm-svn: 75916
2009-07-16 13:32:16 +00:00
a083d7af53
Add xor reg-reg pattern
...
llvm-svn: 75915
2009-07-16 13:31:28 +00:00
65096d6a60
Add or reg-reg pattern.
...
llvm-svn: 75914
2009-07-16 13:30:53 +00:00
18172d786f
Add add reg-reg and reg-imm patterns
...
llvm-svn: 75913
2009-07-16 13:30:15 +00:00
09082fa01a
Add simple reg-reg and reg-imm moves
...
llvm-svn: 75912
2009-07-16 13:29:38 +00:00
cf4ba97dba
Minimal lowering for formal_arguments / ret
...
llvm-svn: 75911
2009-07-16 13:28:59 +00:00
c334c28b3b
Let's start another backend :)
...
llvm-svn: 75909
2009-07-16 13:27:25 +00:00
0cceec520c
Combine an unaligned store of unaligned load into a memmove.
...
llvm-svn: 75908
2009-07-16 12:50:48 +00:00
efe3f9c9f4
Lower the threshold at which memcpy / memmove / memset stop being expanded
...
inline in the XCore.
llvm-svn: 75906
2009-07-16 12:41:34 +00:00
5092f7ee93
Fix typo in last commit on expansion of unaligned loads.
...
llvm-svn: 75903
2009-07-16 10:48:47 +00:00
bfdc557c8a
Expand unaligned 32 bit loads from an address which is a constant
...
offset from a 32 bit aligned base as follows:
ldw low, base[offset >> 2]
ldw high, base[(offset >> 2) + 1]
shr low_shifted, low, (offset & 0x3) * 8
shl high_shifted, high, 32 - (offset & 0x3) * 8
or result, low_shifted, high_shifted
Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.
llvm-svn: 75902
2009-07-16 10:42:35 +00:00
25b33cb035
Custom lower unaligned 32 bit stores and loads into libcalls. This is
...
a big code size win since before they were expanding to upto 16
instructions.
llvm-svn: 75901
2009-07-16 10:21:18 +00:00
84517443ca
Let callers decide the sub-register index on the def operand of rematerialized instructions.
...
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
llvm-svn: 75900
2009-07-16 09:20:10 +00:00
d8fc886b1f
use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code
...
generator can know the top bits are zero, not undefined.
Thanks to Dan for pointing this out.
llvm-svn: 75899
2009-07-16 06:31:37 +00:00
efeba80e74
fix some casts that I improperly refactored, patch by Artur Pietrek!
...
llvm-svn: 75894
2009-07-16 04:34:33 +00:00
c151c51ea0
Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
...
variables.
- Module initialization functions supplanted the need for these.
llvm-svn: 75886
2009-07-16 01:55:13 +00:00
86085a57eb
fix section switching to ensure that stubs are emitted to the right
...
section on ppc.
llvm-svn: 75881
2009-07-16 01:23:26 +00:00
d97db682a3
Lift addAssemblyEmitter into LLVMTargetMachine.
...
- No functionality change.
llvm-svn: 75859
2009-07-15 23:34:19 +00:00
15c3e71e6f
Register AsmPrinter for XCore, MSP430, and PIC16 targets.
...
- Switch to standard addAssemblyEmitter logic.
llvm-svn: 75854
2009-07-15 23:17:20 +00:00
c901392ba4
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
...
- No intended functionality change.
llvm-svn: 75848
2009-07-15 22:33:19 +00:00
5302288c90
Remove old style hacks to register AsmPrinter into TargetMachine.
...
- No intended functionality change.
llvm-svn: 75843
2009-07-15 22:01:32 +00:00
f945a9ed07
Move a few more convenience factory functions from Constant to LLVMContext.
...
llvm-svn: 75840
2009-07-15 21:51:10 +00:00
d098c5a0fc
move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha
...
more like other targets.
llvm-svn: 75839
2009-07-15 21:40:24 +00:00
39816d9157
Lexically order files in CMakeLists.txt files.
...
llvm-svn: 75831
2009-07-15 21:08:16 +00:00
7b6993f3f2
Remove unused function.
...
llvm-svn: 75829
2009-07-15 20:59:20 +00:00
2717863900
use std::vector instead of std::list for both Section and Symbol lists because
...
we care more about random access than insertion/deletion of elements.
llvm-svn: 75828
2009-07-15 20:49:10 +00:00
4325dae645
Update CMakeLists for reapplication.
...
llvm-svn: 75825
2009-07-15 20:34:36 +00:00
e833810a5e
Reapply TargetRegistry refactoring commits.
...
--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
llvm-svn: 75820
2009-07-15 20:24:03 +00:00
5e24aa6490
Fix cmake build, add TargetMachineRegistry.cpp that got restored in r75807
...
llvm-svn: 75817
2009-07-15 19:58:35 +00:00
850f8e4266
Restore file lost during reversion.
...
llvm-svn: 75807
2009-07-15 18:30:44 +00:00
338191cd67
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
...
Will revert 75770 in the llvm-gcc trunk.
llvm-svn: 75799
2009-07-15 17:27:11 +00:00
a8edd048c2
Fix pattern for LD16S_3r, add basic tests to check load / store instructions
...
are being properly selected.
llvm-svn: 75797
2009-07-15 17:06:59 +00:00
f39120571b
Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg].
...
llvm-svn: 75789
2009-07-15 15:50:19 +00:00
57489b0658
Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.
...
llvm-svn: 75788
2009-07-15 15:46:56 +00:00
c50a460296
Remove the xcore-file-directive option now that LLVM has proper support for
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emitting file directives with one parameter.
llvm-svn: 75787
2009-07-15 15:36:37 +00:00
eb8c83b4c3
Replace large swaths of copy-n-paste code with obvious helper function...
...
- Which was already present in the module!
- I skipped this xform for Alpha, since it runs an extra pass during assembly
emission, but not when emitting assembly via the DumpAsm flag.
- No functionality change.
--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
18 - PM.add(AsmPrinterCtor(ferrs(), *this, true));
18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in");
18 - if (AsmPrinterCtor)
18 - if (DumpAsm) {
18 - }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
18 + addAssemblyEmitter(PM, OptLevel, true, ferrs());
18 + if (DumpAsm)
--
llvm-svn: 75782
2009-07-15 12:49:15 +00:00
cf5b0f4155
Remove StringConstantPrefix now that the only user
...
(llvm-gcc) has gone.
llvm-svn: 75781
2009-07-15 12:39:48 +00:00
863e587d27
Kill off old (TargetMachine level, not Target level) match quality functions.
...
llvm-svn: 75780
2009-07-15 12:26:05 +00:00
9dbdf228d0
Fix cmake build lib/Target/TargetMachineRegistry.cpp removed.
...
llvm-svn: 75779
2009-07-15 12:19:36 +00:00
6db8134e80
Provide TargetMachine implementations with reference to Target they were created
...
from.
- This commit is almost entirely propogating the reference through the
TargetMachine subclasses' constructor calls.
llvm-svn: 75778
2009-07-15 12:11:05 +00:00
88f8559261
Kill off unused TargetMachineRegistry methods and ivars.
...
llvm-svn: 75774
2009-07-15 11:48:36 +00:00
95b534f80e
Include the Target& in the TargetMachineRegisterEntry.
...
llvm-svn: 75772
2009-07-15 11:23:49 +00:00
a8d73996ce
Switch some obvious clients to using the new TargetRegistry.
...
llvm-svn: 75767
2009-07-15 10:05:03 +00:00
776fe8db5f
Reimplement TargetMachineRegistry in terms of TargetRegistry.
...
- This is a temporary hack to aid in incremental refactoring, for now we
allocate a new TargetMachineRegistryEntry on every getClosest... call.
- No intended functionality change, other than the leaked memory.
llvm-svn: 75766
2009-07-15 09:53:37 +00:00
b22f50e4c4
Register Target's TargetMachine and AsmPrinter in the new registry.
...
- This abuses TargetMachineRegistry's constructor for now, this will get
cleaned up in time.
llvm-svn: 75762
2009-07-15 09:22:31 +00:00
56e2947a33
Add TargetInfo libraries for all targets.
...
- Intended to match current TargetMachine implementations.
- No facilities for linking these in yet.
llvm-svn: 75751
2009-07-15 06:35:19 +00:00
9e0c7f2c5e
Move load / store folding alignment require into the table(s).
...
llvm-svn: 75749
2009-07-15 06:10:07 +00:00
e4a3f6fa3b
rename decorateName -> DecorateCygMingName, make it assert if not
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cygming, make the two callers only call it if cygming. Other minor
cleanups.
llvm-svn: 75744
2009-07-15 04:55:56 +00:00
a2268c0b19
convert arm/darwin stubs to use the mangler to synthesize all the names instead of
...
doing it with printSuffixedName.
llvm-svn: 75741
2009-07-15 04:41:01 +00:00
55452c2bea
fix an arm codegen bug (the same as PR4482 on ppc) where available_externally
...
symbols were not getting stubs. While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.
llvm-svn: 75737
2009-07-15 04:12:33 +00:00
53fe736214
convert [Hidden]GVNonLazyPtrs to compute the global and stub names
...
with the mangler (like x86 and ppc), instead of going through
printSuffixedName.
llvm-svn: 75736
2009-07-15 03:12:43 +00:00
52d0fec140
use makeNameProper to add the globalprefix instead of doing it manually.
...
llvm-svn: 75734
2009-07-15 03:01:23 +00:00
7d1f9542c2
get the PPC stub temporary label from the mangler instead of
...
using horrible string hacking. This gives us a different label,
but it's just an assembler temporary, so the name doesn't matter.
llvm-svn: 75733
2009-07-15 02:56:53 +00:00
d68df2a481
turn some if/then's into ?:
...
llvm-svn: 75732
2009-07-15 02:36:21 +00:00
9a066cacf5
eliminate a bunch of printSuffixedName's by using info computed from
...
Mangler in FnStubs.
llvm-svn: 75731
2009-07-15 02:33:19 +00:00
e8382ac9b1
convert FnStubs to using a more structured form, eliminating
...
a couple instances of printSuffixedName (in favor of having
the mangler do stuff).
llvm-svn: 75729
2009-07-15 02:28:57 +00:00
1447bd2314
actually $stub labels *are* private, I just missed that
...
printSuffixedName automatically does this.
llvm-svn: 75727
2009-07-15 01:53:36 +00:00
7f318128d0
$stub references should not be private ("L") labels.
...
llvm-svn: 75721
2009-07-15 01:23:13 +00:00
8da3ce3bfd
simplify "EmitExternalGlobal": it is only used to output a
...
reference to the personality function for a module, and
those are all added to the GVStubs array by looping
over MMI->getPersonalities()
llvm-svn: 75720
2009-07-15 01:16:38 +00:00
9ffa4e2193
Convert GVStubs and HiddenGVStubs to work more like the X86 backend, this
...
eliminates a bunch of uses of "printSuffixedName" and "getGlobalLinkName".
llvm-svn: 75719
2009-07-15 01:14:44 +00:00
0b1ca0a303
minor cleanups: only switch sections once before all function stubs, instead of
...
before each one.
llvm-svn: 75718
2009-07-15 00:55:58 +00:00
b6b2530000
Move EVER MORE stuff over to LLVMContext.
...
llvm-svn: 75703
2009-07-14 23:09:55 +00:00
2c2c4af05e
Fix path name.
...
llvm-svn: 75697
2009-07-14 22:58:03 +00:00
ef130cfa95
Use the right relocation type for X86::MOV64ri64i32
...
llvm-svn: 75687
2009-07-14 21:46:40 +00:00
a9111b9f97
Fix bad indentation and 80-col violation.
...
llvm-svn: 75686
2009-07-14 21:45:58 +00:00
95bad85498
Check for PRE_INC and POST_INC.
...
llvm-svn: 75683
2009-07-14 21:29:29 +00:00
5c5140c767
fix David's merge conflict
...
llvm-svn: 75673
2009-07-14 20:25:40 +00:00
79c136d473
reapply r75408, which eliminates MOV64r0 in favor of using
...
MOV32r0 + subregs to do the same thing. This should work now
that PR4544 is fixed. Thanks Evan!
llvm-svn: 75671
2009-07-14 20:19:57 +00:00
a31f96cf2b
Have asm printers use formatted_raw_ostream directly to avoid a
...
dynamic_cast<>.
llvm-svn: 75670
2009-07-14 20:18:05 +00:00
4ad7797e1c
hasThumb2() does not mean we are compiling for thumb, must also check isThumb().
...
llvm-svn: 75660
2009-07-14 18:48:51 +00:00
3f17aee94b
Remove an extra space.
...
llvm-svn: 75658
2009-07-14 18:44:34 +00:00
b25b255dbd
Mark as fall through.
...
llvm-svn: 75652
2009-07-14 18:30:04 +00:00
8c9a96b966
Reapply my previous asmprinter changes now with more testing and two
...
additional bug fixes:
1. The bug that everyone hit was a problem in the asmprinter where it
would remove $stub but keep the L prefix on a name when emitting the
indirect symbol. This is easy to fix by keeping the name of the stub
and the name of the symbol in a StringMap instead of just keeping a
StringSet and trying to reconstruct it late.
2. There was a problem printing the personality function. The current
logic to print out the personality function from the DWARF information
is a bit of a cesspool right now that duplicates a bunch of other
logic in the asm printer. The short version of it is that it depends
on emitting both the L and _ prefix for symbols (at least on darwin)
and until I can untangle it, it is best to switch the mangler back to
emitting both prefixes.
llvm-svn: 75646
2009-07-14 18:17:16 +00:00
fbcc663cbf
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
...
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
llvm-svn: 75640
2009-07-14 16:55:14 +00:00
eb3e4271e8
Revert r7561{9,8,7,6}, which depend on r75610.
...
--- Reverse-merging r75619 into '.':
U lib/Target/DarwinTargetAsmInfo.cpp
U lib/CodeGen/AsmPrinter/AsmPrinter.cpp
--- Reverse-merging r75618 into '.':
U lib/CodeGen/ELFWriter.cpp
U lib/CodeGen/MachOCodeEmitter.cpp
U lib/CodeGen/MachOWriter.cpp
--- Reverse-merging r75617 into '.':
U lib/Target/CBackend/CBackend.cpp
--- Reverse-merging r75616 into '.':
U tools/bugpoint/Miscompilation.cpp
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
llvm-svn: 75638
2009-07-14 16:25:11 +00:00
6c5282e3db
Revert r75615, which depended on 75610.
...
--- Reverse-merging r75615 into '.':
U lib/Target/XCore/XCoreAsmPrinter.cpp
U lib/Target/PIC16/PIC16AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/MSP430/MSP430AsmPrinter.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
llvm-svn: 75637
2009-07-14 16:12:13 +00:00
966932ccb7
Revert r75610 (and r75620, which was blocking the revert), in the hopes of
...
unbreaking llvm-gcc (on Darwin).
--- Reverse-merging r75620 into '.':
U include/llvm/Support/Mangler.h
--- Reverse-merging r75610 into '.':
U test/CodeGen/X86/loop-hoist.ll
G include/llvm/Support/Mangler.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/VMCore/Mangler.cpp
llvm-svn: 75636
2009-07-14 15:57:55 +00:00
6cdb897258
eliminate extra space.
...
llvm-svn: 75630
2009-07-14 12:22:58 +00:00
ba70a9b0c7
Add extra sign extension to the same bit width before int sign
...
extension to another bit width. This is needed to get correct singed value.
Patch by Artur Pietrek!
llvm-svn: 75629
2009-07-14 09:53:14 +00:00
1c0fecfcc3
Add missing break. Patch by Artur Pietrek!
...
llvm-svn: 75628
2009-07-14 09:52:47 +00:00
3af24cc26f
rename getValueName -> getMangledName. These two files have very
...
dubious looking things that I need to investigate in more detail.
llvm-svn: 75619
2009-07-14 06:21:12 +00:00
6ec9f40ac7
rename getValueName -> getMangledName
...
llvm-svn: 75617
2009-07-14 06:19:21 +00:00
027c84d2c8
Rename getValueName -> getMangledName.
...
llvm-svn: 75615
2009-07-14 06:18:50 +00:00
774f2a2d51
Change the X86 asmprinter to use the mangler to apply suffixes like "$non_lazy_ptr"
...
to symbols instead of doing it with "printSuffixedName". This gets us to the point
where there is a real separation between computing a symbol name and printing it,
something I need for MC printer stuff.
This patch also fixes a corner case bug where unnamed private globals wouldn't get
the private label prefix.
Next up, rename all uses of getValueName -> getMangledName for better greppability,
and then tackle the ppc/arm backends to eliminate "printSuffixedName".
llvm-svn: 75610
2009-07-14 06:04:35 +00:00
bd9ba429ca
1. In Thumb mode, select tBx instead of ARM variants.
...
2. BX does not "use" the link register, it defines it.
3. Fix a couple more places in thumb td file that still uses pre-UAL syntax.
llvm-svn: 75585
2009-07-14 01:49:27 +00:00
b1f9128c72
Remove hack now that Evan fixed it so that the frame pointer isn't saved twice.
...
llvm-svn: 75581
2009-07-14 01:16:18 +00:00
fc4b5cb7a6
use getValueName instead of makeNameProper.
...
llvm-svn: 75577
2009-07-14 01:01:12 +00:00
72b80ac9b1
Fix detection of valid BFC immediates.
...
llvm-svn: 75576
2009-07-14 00:57:56 +00:00
7bbb9a91ab
Fix an obvious copy-and-paste error.
...
llvm-svn: 75566
2009-07-14 00:23:44 +00:00
acb9927fd8
Revert 75309.
...
llvm-svn: 75562
2009-07-14 00:01:42 +00:00
874727fb73
fix CBE & MSIL backends to not use the mangler for non-global symbols.
...
llvm-svn: 75556
2009-07-13 23:46:46 +00:00
d8435e9989
don't print redundant @PLT suffixes
...
llvm-svn: 75554
2009-07-13 23:44:13 +00:00
a45c9b67cc
clean up some syntax.
...
llvm-svn: 75532
2009-07-13 22:28:21 +00:00
bb2501bbbe
These don't really need contexts either.
...
llvm-svn: 75528
2009-07-13 22:18:28 +00:00
f8542ba3a9
eliminate a bunch of code in print_pcrel_imm for printing symbols, using
...
printSymbolOperand instead.
llvm-svn: 75526
2009-07-13 22:07:30 +00:00
40091b8cef
move a method and add a comment, no functionality change.
...
llvm-svn: 75520
2009-07-13 21:53:19 +00:00
a479bf1afa
refactor operand printing to remove hte last of the "mem" modifier hack. The
...
only remaining modifier is "subreg".
llvm-svn: 75516
2009-07-13 21:48:33 +00:00
160521095b
Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This fixes SingleSource/Benchmarks/Stanford/Queens (among others).
...
llvm-svn: 75513
2009-07-13 21:43:08 +00:00
bf25a209dc
refactor symbol printing so the whole "mem" thing is handled in fewer places.
...
llvm-svn: 75512
2009-07-13 21:41:08 +00:00
e4dcecd006
As Chris pointed out, this doesn't actually need an LLVMContext to operate.
...
llvm-svn: 75508
2009-07-13 21:27:19 +00:00
542619e6d5
Move more functionality over to LLVMContext.
...
llvm-svn: 75497
2009-07-13 20:58:05 +00:00
e3ac197457
Reverted r75484. It was causing a failure with Apple-style builds.
...
llvm-svn: 75491
2009-07-13 20:27:41 +00:00
de54478bf0
Add infrastructure to allow post instruction printing action triggers.
...
We'll eventually use this to print comments in asm files and do other
fun things.
This adds interfaces to the AsmPrinter and changes TableGen to invoke
the postInstructionAction when appropriate. It also add parameters to
TargetAsmInfo to control comment layout.
llvm-svn: 75490
2009-07-13 20:25:48 +00:00
1b7661e588
More standard way of specifying greater than Leopard.
...
llvm-svn: 75488
2009-07-13 20:18:43 +00:00
0a860df8ef
On greater than Leopard systems, place exception tables in the __TEXT section.
...
llvm-svn: 75484
2009-07-13 18:48:39 +00:00
844d6c82a7
Fix comment typos.
...
llvm-svn: 75479
2009-07-13 18:11:36 +00:00
53a52215b5
Begin the painful process of tearing apart the rat'ss nest that is Constants.cpp and ConstantFold.cpp.
...
This involves temporarily hard wiring some parts to use the global context. This isn't ideal, but it's
the only way I could figure out to make this process vaguely incremental.
llvm-svn: 75445
2009-07-13 04:09:18 +00:00
69208f0f9e
Remove extra \n from LLVM_UNREACHABLE calls.
...
llvm-svn: 75416
2009-07-12 07:15:17 +00:00
5b76fc03ae
Temporarily revert r75408. It appears to break the Apple-style builds:
...
x86_64-apple-darwin10-gcc -c -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -Wold-style-definition -Wmissing-format-attribute -mdynamic-no-pic -DHAVE_CONFIG_H -I. -I. -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/. -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../include -I./../intl -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../libcpp/include -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~dst/Developer/usr/local/include -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~obj/src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmCore.roots/llvmCore~dst/Developer/usr/local/include -D_DEBUG -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -DLLVM_VERSION_INFO='"9999"' -DBUILD_LLVM_APPLE_STYLE /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-x86_64-darwin10-selfhost/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/tree-ssa-alias.c -o tree-ssa-alias.o
/var/tmp//ccJQ2JBT.s:4134:Incorrect register `%rcx' used with `l' suffix
make[2]: *** [tree-ssa-live.o] Error 1
make[2]: *** Waiting for unfinished jobs....
llvm-svn: 75412
2009-07-12 02:49:22 +00:00
02c4339bde
eliminate MOV64r0 in favor of a Pat<> pattern. This is only nontrivial because
...
the div lowering code explicitly references it.
llvm-svn: 75408
2009-07-12 00:47:55 +00:00
38df005e12
fix x86-64 static codegen to materialize the address of a global with movl instead
...
of lea. It is better for code size (and presumably efficiency) to use:
movl $foo, %eax
rather than:
leal foo, eax
Both give a nice zero extending "move immediate" instruction, the former is just
smaller. Note that global addresses should be handled different by the x86
backend, but I chose to follow the style already in place and add more fixme's.
llvm-svn: 75403
2009-07-11 23:17:29 +00:00
48cee9b4c1
fix a bug in my cleanup patch
...
llvm-svn: 75402
2009-07-11 23:07:30 +00:00
4d10f1a6c9
comment cleanup, reduce nesting.
...
llvm-svn: 75398
2009-07-11 22:50:33 +00:00
24f6ad5ae4
remove some dead patterns, WrapperRIP doesn't exist in -static mode
...
anymore, so these aren't needed.
llvm-svn: 75397
2009-07-11 22:47:21 +00:00
e91900097e
Fix PR4533, which is about buggy codegen in x86-64 -static mode.
...
Basically, using:
lea symbol(%rip), %rax
is not valid in -static mode, because the current RIP may not be
within 32-bits of "symbol" when an app is built partially pic and
partially static. The fix for this is to compile it to:
lea symbol, %rax
It would be better to codegen this as:
movq $symbol, %rax
but that will come next.
The hard part of fixing this bug was fixing abi-isel, which was actively
testing for the wrong behavior. Also, the RUN lines are completely impossible
to understand what they are testing. To help with this, convert the -static
x86-64 codegen tests to use filecheck. This is much more stable and makes it
more clear what the codegen is expected to be.
llvm-svn: 75382
2009-07-11 20:29:19 +00:00
56d0659726
assert(0) -> LLVM_UNREACHABLE.
...
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
llvm-svn: 75379
2009-07-11 20:10:48 +00:00
017288a4fc
Don't put IT instruction before conditional branches.
...
llvm-svn: 75361
2009-07-11 07:26:20 +00:00
0794c6a083
Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.
...
llvm-svn: 75360
2009-07-11 07:08:13 +00:00
cd4cdd1157
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
...
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.
llvm-svn: 75359
2009-07-11 06:43:01 +00:00
bf041366c4
80 col violation.
...
llvm-svn: 75358
2009-07-11 06:37:27 +00:00
a51f8ebf1a
Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs of
...
quad registers and the Q4PR class holds sets of 4 quad registers.
llvm-svn: 75309
2009-07-10 23:09:06 +00:00
2745607dc6
remove the "debug" modifier, it is only used by one instruction which can
...
never be generated.
llvm-svn: 75305
2009-07-10 22:34:11 +00:00
a6009306c2
make pcrel and non-pcrel global printing more similar.
...
llvm-svn: 75298
2009-07-10 21:57:21 +00:00
7997cbf2d5
Undo my brain cramp.
...
llvm-svn: 75290
2009-07-10 21:31:42 +00:00
25e7f91559
code model is never set to default.
...
llvm-svn: 75278
2009-07-10 21:03:06 +00:00
7dce9919e1
fix indentation
...
llvm-svn: 75277
2009-07-10 21:01:59 +00:00
21c2940553
remove the now-dead TM argument to these methods.
...
llvm-svn: 75276
2009-07-10 21:00:45 +00:00
ba4d73310a
make PIC vs DynamicNoPIC be explicit in PICStyles.
...
llvm-svn: 75275
2009-07-10 20:58:47 +00:00
bd3e560f1a
some minor simplifications.
...
llvm-svn: 75274
2009-07-10 20:53:38 +00:00
e2f524f176
add a couple of predicates to test for "stub style pic in PIC mode" and "stub style pic in dynamic-no-pic" mode.
...
llvm-svn: 75273
2009-07-10 20:47:30 +00:00
48d983c86e
Avoid compiler warnings when assertions are turned off.
...
llvm-svn: 75269
2009-07-10 20:10:14 +00:00
bb00fe0dc6
CMOVxx doesn't swap operands which it's commuted.
...
llvm-svn: 75266
2009-07-10 19:26:57 +00:00
81cdd21dcb
Predicate VFP instructions on HasVFP2 instead of IsARM. This allows VFP instructions with thumb-2.
...
llvm-svn: 75254
2009-07-10 17:03:29 +00:00
96b491a1fa
Update for GlobalVariables ctor change.
...
llvm-svn: 75251
2009-07-10 16:42:19 +00:00
c9b1efd515
t2LDM_RET does not fall-through.
...
llvm-svn: 75250
2009-07-10 15:33:46 +00:00
0006349f4d
Add Thumb2ITBlockPass.cpp to CMakeLists.txt, fixing
...
the cmake build.
llvm-svn: 75246
2009-07-10 08:31:50 +00:00
9531b039b9
make this more like printOperand. Perhaps some merging will happen
...
tomorrow.
llvm-svn: 75245
2009-07-10 07:50:52 +00:00
20073edf67
simplify fast isel by using ClassifyGlobalReference. This
...
elimiantes the last use of GVRequiresExtraLoad, so delete it.
llvm-svn: 75244
2009-07-10 07:48:51 +00:00
93f0f79178
eliminate GVRequiresRegister, replacing it with predicates we
...
need for other purposes.
llvm-svn: 75243
2009-07-10 07:38:24 +00:00
2ff35f528c
change a bunch of logic in LowerGlobalAddress to leverage the work
...
done in ClassifyGlobalReference instead of reconstructing the info
awkwardly.
llvm-svn: 75240
2009-07-10 07:34:39 +00:00
d3f32c725b
add a predicate to determine if a global var reference requires a
...
PIC-base to be added in.
llvm-svn: 75238
2009-07-10 07:33:30 +00:00
dc842c06c2
move some classification logic around. Now GVRequiresExtraLoad
...
is just a trivial wrapper around "ClassifyGlobalReference", which
stole a ton of logic from LowerGlobalAddress.
llvm-svn: 75237
2009-07-10 07:20:05 +00:00
ca9d784bf1
change isGlobalStubReference to take target flags instead of a MachineOperand.
...
llvm-svn: 75236
2009-07-10 06:29:59 +00:00
e6d259340e
convert some late code (called by regalloc and code emission)
...
to use isGlobalStubReference instead of GVRequiresExtraLoad
(which should really be part of isel).
llvm-svn: 75234
2009-07-10 06:07:08 +00:00
377f1d5373
add a new predicate method that says whether a GlobalValue
...
MachineOperand is a reference to a stub, not a reference to the
global variable itself. Look no context needed!
llvm-svn: 75233
2009-07-10 06:06:17 +00:00
b9af63a4d2
GVRequiresExtraLoad is now never used for calls, simplify it based on this.
...
llvm-svn: 75232
2009-07-10 05:52:02 +00:00
ace6ec26d9
actually, just eliminate PCRelGVRequiresExtraLoad. It makes the code
...
more complex and slow than just directly testing what we care about.
llvm-svn: 75231
2009-07-10 05:48:03 +00:00
7277a807f0
There is only one case where GVRequiresExtraLoad returns true for calls:
...
split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.
llvm-svn: 75230
2009-07-10 05:45:15 +00:00
1cc7ae7c3b
the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.
...
llvm-svn: 75229
2009-07-10 05:37:11 +00:00
8212d37e7d
split call handling out of X86SelectAddress into X86SelectCallAddress
...
llvm-svn: 75228
2009-07-10 05:33:42 +00:00
405d024c71
convert a helper method to be a static function instead of a
...
template. Also convert it to take a MachineOperand instead of a GV*
llvm-svn: 75227
2009-07-10 05:27:43 +00:00
01b8630879
More info about Thumb1 predication support.
...
llvm-svn: 75220
2009-07-10 02:10:17 +00:00
61671c87a7
We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions.
...
llvm-svn: 75219
2009-07-10 02:09:04 +00:00
0f9cce7951
Add a thumb2 pass to insert IT blocks.
...
llvm-svn: 75218
2009-07-10 01:54:42 +00:00
3b88dd6900
Move isPredicated from .cpp to .h
...
llvm-svn: 75217
2009-07-10 01:38:27 +00:00
5d8a1b2c18
80 col violation.
...
llvm-svn: 75212
2009-07-10 00:45:16 +00:00
223ac25930
Remove a bogus assertion.
...
llvm-svn: 75206
2009-07-10 00:23:48 +00:00
75aa75cabc
Replace TM.getRegisterInfo() calls by TRI instance variable.
...
Use getAsmName() method instead of accessing AsmName field directly.
llvm-svn: 75205
2009-07-10 00:14:05 +00:00
9ce44e2521
Handle 'a' modifier on inline assembly operands.
...
This is part of the fix for pr4521.
llvm-svn: 75201
2009-07-09 23:54:51 +00:00
26b2ba4285
Added Thumb IT instruction.
...
llvm-svn: 75198
2009-07-09 23:43:36 +00:00
ae4f2e142a
Another todo entry.
...
llvm-svn: 75192
2009-07-09 23:17:28 +00:00
4605e8aac4
Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later.
...
llvm-svn: 75190
2009-07-09 23:11:34 +00:00
1622d7b429
Fix ldm / stm unified syntax; add t2LDM_RET.
...
llvm-svn: 75188
2009-07-09 22:58:39 +00:00
a02fc2d327
LDM_RET should be marked mayLoad.
...
llvm-svn: 75187
2009-07-09 22:57:41 +00:00
ad6c36f065
If -fomit-frame-pointer is used, we still need to record when the %esp register
...
is modified. Otherwise, the unwinder will get confused. The old code (before I
started my hacking) did this. It dropped on the floor, because I wasn't aware of
this requirement.
On the plus side, if we use "alloca" in a function, we create frame pointers
even with -fomit-frame-pointer is enabled!
This is a Good Thing(tm)!!!
llvm-svn: 75183
2009-07-09 22:30:02 +00:00
7591d02c84
Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit.
...
Note, we are not yet generating these instructions.
llvm-svn: 75181
2009-07-09 22:21:59 +00:00
f9870125fc
Add a Thumb readme entry.
...
llvm-svn: 75173
2009-07-09 20:50:52 +00:00
ad93707e16
Correct comment.
...
llvm-svn: 75172
2009-07-09 20:40:44 +00:00
9f3bd4a728
bug 4524: Add MSP430 to the cmake build.
...
llvm-svn: 75170
2009-07-09 20:27:09 +00:00
546a7bbe8f
Handle 'A' modifier in inline asms.
...
gcc.apple/asm-block-13.c
gcc.apple/asm-block-57.c
llvm-svn: 75169
2009-07-09 20:06:27 +00:00
7bf08beb2e
Handle Thumb-2 addressing modes during FP elimination.
...
llvm-svn: 75158
2009-07-09 18:35:52 +00:00
0504e0a222
Thread LLVMContext through MVT and related parts of SDISel.
...
llvm-svn: 75153
2009-07-09 17:57:24 +00:00
5911537b68
Misc encoding fixes; reported on llvmdev.
...
llvm-svn: 75142
2009-07-09 16:49:25 +00:00
212c0506cd
simplify this logic a bit more.
...
llvm-svn: 75118
2009-07-09 07:02:30 +00:00
72e3deca47
move reasoning about darwin $non_lazy_ptr stubs from asmprinter into
...
isel.
llvm-svn: 75117
2009-07-09 06:59:17 +00:00
7452c968e4
Targets sometimes assign fixed stack object to spill certain callee-saved
...
registers based on dynamic conditions. For example, X86 EBP/RBP, when used as
frame register has to be spilled in the first fixed object. It should inform
PEI this so it doesn't get allocated another stack object. Also, it should not
be spilled as other callee-saved registers but rather its spilling and restoring
are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice.
llvm-svn: 75116
2009-07-09 06:53:48 +00:00
27e32c092e
Reorg includes.
...
llvm-svn: 75115
2009-07-09 06:49:09 +00:00
770e0429be
rearrange some code, no functionality change.
...
llvm-svn: 75113
2009-07-09 06:41:35 +00:00
c58f1fb0df
make direct calls set MO_PLT or MO_DARWIN_STUB as appropriate with fast isel.
...
llvm-svn: 75112
2009-07-09 06:34:26 +00:00
3ffd238f1c
reduce nesting by rearranging branches.
...
llvm-svn: 75110
2009-07-09 05:55:04 +00:00
e0dae0e716
make isel use MO_PIC_BASE_OFFSET when lowering globalvalues on darwin in pic
...
mode, instead of having asmprinter just "know" to print them.
llvm-svn: 75109
2009-07-09 05:47:33 +00:00
0667b145c4
various minor cleanups, no functionality change.
...
llvm-svn: 75108
2009-07-09 05:42:07 +00:00
d047d06358
make isel decide whether to emit $stub's on darwin instead of asmprinter.
...
llvm-svn: 75107
2009-07-09 05:27:35 +00:00
3e41fec4df
pc-relative references are *always* to functions, never to globals. ISel
...
is incapable of lowering direct references to globals like this, zap the code.
llvm-svn: 75106
2009-07-09 05:19:23 +00:00
82aa63c9b0
make cygwin use its own stubs set, instead of overloading a darwin one.
...
llvm-svn: 75105
2009-07-09 05:09:24 +00:00
d5d80ab6b6
Make isel determine where to emit PLT-relative calls instead of having
...
asmprinter do it.
llvm-svn: 75104
2009-07-09 05:02:21 +00:00
b4de36ea47
isPICStyleStub() is now never true in -static mode, so simplify code.
...
llvm-svn: 75102
2009-07-09 04:43:12 +00:00
fef11d6e77
simplify some code based on the fact that picstyles != none are only valid
...
in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.
llvm-svn: 75101
2009-07-09 04:39:06 +00:00
62f568c037
all this logic always returns true because GOT mode is never active in x86-64 mode.
...
Simplify it away, someone should evaluate this.
llvm-svn: 75100
2009-07-09 04:27:47 +00:00
3945dd0c44
isPICStyleRIPRel() and friends are never true in -static mode.
...
Simplify code based on this.
llvm-svn: 75099
2009-07-09 04:24:46 +00:00
4e705e421c
Move PR4517 to README.txt.
...
llvm-svn: 75098
2009-07-09 04:03:30 +00:00
117608b129
.o file writing shouldn't mess around with pic/relo models like the JIT does.
...
llvm-svn: 75096
2009-07-09 03:40:30 +00:00
0b0c5cc376
move a hack out of the asm-printer specific path to the main target selection path.
...
llvm-svn: 75095
2009-07-09 03:37:30 +00:00
7e3abf1ab0
many more cleanups, for example if in the "none" pic-style,
...
make sure we're set to static codegen. Simplify the decision
tree of target->picstyle/picmode settings.
llvm-svn: 75094
2009-07-09 03:32:31 +00:00
821084a356
Reduce indentation in GVRequiresExtraLoad. Return true for windows
...
with DLLImport symbols even when in -static mode.
llvm-svn: 75093
2009-07-09 03:27:27 +00:00
1c5bf9d26d
When in -static mode, force the PIC style to none. Doing this requires fixing
...
code which conflated RIPRel PIC with x86-64. Fix these to just check for X86-64
directly.
llvm-svn: 75092
2009-07-09 03:15:51 +00:00
384a738b4a
merge two identical functions and simplify things that are GOT specific
...
llvm-svn: 75091
2009-07-09 02:55:47 +00:00
4d1e9bf717
hoist check for IsTailCall to callers. Eliminate redundant check for
...
x86-64: GOT-style PIC is never used on x86-64.
llvm-svn: 75090
2009-07-09 02:46:53 +00:00
88765d4831
change a few methods to be static functions.
...
llvm-svn: 75089
2009-07-09 02:44:11 +00:00
b1f0ac2a2f
one more added assert.
...
llvm-svn: 75088
2009-07-09 02:43:55 +00:00
47f64ea174
move handling of dllimport linkage in isel, not in asmprinter.
...
llvm-svn: 75086
2009-07-09 00:58:53 +00:00
a8e08a4429
one more assertion!
...
llvm-svn: 75083
2009-07-09 00:49:29 +00:00
5d0713946b
add some more assertions. Remove code to handle dllimport on darwin.
...
llvm-svn: 75082
2009-07-09 00:47:59 +00:00
031c5fec43
remove "asmcall", using print_pcrel_imm instead of printOperand.
...
llvm-svn: 75080
2009-07-09 00:39:19 +00:00
f0c21619f8
simplify some logic
...
llvm-svn: 75079
2009-07-09 00:32:12 +00:00
ade55bc8dd
* add some assertions for sanity checking.
...
* remove some old code that was needed when we'd put ESP in the scale instead of
the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.
llvm-svn: 75077
2009-07-09 00:27:29 +00:00
22c2fba978
Use common code for both ARM and Thumb-2 instruction and register info.
...
llvm-svn: 75067
2009-07-08 23:10:31 +00:00
3c043404e0
* manually concatenate two string literals
...
* remove some dead code: darwin doesn't support dllimport linkage.
llvm-svn: 75066
2009-07-08 23:09:14 +00:00
5edd90cbbc
- Add some NEON ld / st instruction static encoding.
...
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.
llvm-svn: 75065
2009-07-08 22:51:32 +00:00
e3a53c448b
Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
...
llvm-svn: 75048
2009-07-08 21:03:57 +00:00
0c9f367d62
Recommit r74952 with a bug fix:
...
DWARF requires frame moves be specified at specific times. If you have a
prologue like this:
__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
pushl %ebp
Llabel1:
movl %esp, %ebp
Llabel2:
pushl %esi
Llabel3:
subl $20, %esp
call "L1$pb"
"L1$pb":
popl %esi
The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.
Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.
This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.
There is some ugliness where we generate code like this:
LBB22_0: ## entry
pushl %ebp
Llabel280:
movl %esp, %ebp
Llabel281:
Llabel284:
pushl %ebp <----------
pushl %ebx
pushl %edi
pushl %esi
Llabel282:
subl $328, %esp
Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.
llvm-svn: 75047
2009-07-08 21:02:53 +00:00
f8d479c1ce
Missed an exit during the conversion.
...
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.
llvm-svn: 75045
2009-07-08 20:55:50 +00:00
fb8d6d5b58
Implement changes from Chris's feedback.
...
Finish converting lib/Target.
llvm-svn: 75043
2009-07-08 20:53:28 +00:00
1d298fd75b
Implement NEON vst1 instruction.
...
llvm-svn: 75037
2009-07-08 20:32:02 +00:00
03ab0bbb24
Generalize opcode selection in ARMBaseRegisterInfo.
...
llvm-svn: 75036
2009-07-08 20:28:28 +00:00
b009980f0b
Fix cmake build.
...
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt
llvm-svn: 75035
2009-07-08 20:13:41 +00:00
fa04002254
Convert more abort() calls to llvm_report_error().
...
Also remove trailing semicolon.
llvm-svn: 75027
2009-07-08 19:04:27 +00:00
9ca33e8a9f
Push methods into base class in preparation for sharing.
...
llvm-svn: 75020
2009-07-08 18:31:39 +00:00
f731a2df6b
Implement NEON vld1 instructions.
...
llvm-svn: 75019
2009-07-08 18:11:30 +00:00
6dd2730024
Start converting to new error handling API.
...
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
llvm-svn: 75018
2009-07-08 18:01:40 +00:00
eebf58805c
Start breaking out common base functionality for register info.
...
llvm-svn: 75016
2009-07-08 17:28:55 +00:00
af7451b674
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
...
llvm-svn: 75010
2009-07-08 16:09:28 +00:00
16019aaa4f
Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
...
llvm-svn: 74992
2009-07-08 05:40:05 +00:00
a21d3daadc
Remove the vicmp and vfcmp instructions. Because we never had a release with
...
these instructions, no autoupgrade or backwards compatibility support is
provided.
llvm-svn: 74991
2009-07-08 03:04:38 +00:00
14965760a7
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
...
llvm-svn: 74988
2009-07-08 01:46:35 +00:00
b61e3a83ee
Add a todo.
...
llvm-svn: 74976
2009-07-08 00:05:05 +00:00
f0080b734a
Also statically set bit 25 for BR_JT instructions.
...
llvm-svn: 74974
2009-07-07 23:45:10 +00:00
2cff076cfe
Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
...
llvm-svn: 74972
2009-07-07 23:40:25 +00:00
69bf0a1e2a
--- Reverse-merging (from foreign repository) r74952 into '.':
...
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86RegisterInfo.h
Temporarily revert. This was causing an infinite loop in the linker on Leopard.
llvm-svn: 74970
2009-07-07 23:37:49 +00:00
9e5b64b7b7
Commit the file I actually changed as part of last
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patch, instead of one I didn't.
llvm-svn: 74968
2009-07-07 23:28:22 +00:00
7a87a78c6c
DWARF requires frame moves be specified at specific times. If you have a
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prologue like this:
__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
pushl %ebp
Llabel1:
movl %esp, %ebp
Llabel2:
pushl %esi
Llabel3:
subl $20, %esp
call "L1$pb"
"L1$pb":
popl %esi
The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.
Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.
This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.
llvm-svn: 74952
2009-07-07 21:53:07 +00:00
d0611f9a37
Add Thumb2 movcc instructions.
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llvm-svn: 74946
2009-07-07 20:39:03 +00:00
02a44edf12
Add BX and BXr9 encodings. Patch by Sean Callanan.
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llvm-svn: 74938
2009-07-07 19:16:24 +00:00
5c96ef7c4e
Have scoped mutexes take referenes instead of pointers.
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llvm-svn: 74931
2009-07-07 18:33:04 +00:00
d0f6324cdc
Add Thumb2 pkhbt / pkhtb.
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llvm-svn: 74895
2009-07-07 05:35:52 +00:00
b24e51e2d9
Add some more Thumb2 multiplication instructions.
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llvm-svn: 74889
2009-07-07 01:17:28 +00:00
7c9434399d
80 col violation.
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llvm-svn: 74888
2009-07-07 01:16:41 +00:00
56a53d02e1
Don't accept globals as matching 'i' constraint
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in PIC modes (in accordance with existing comment).
gcc.apple/asm-block-25.c
llvm-svn: 74886
2009-07-07 00:18:49 +00:00
8e8028eac3
Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.
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PIC16 developers, please verify. Thanks.
llvm-svn: 74880
2009-07-06 23:28:36 +00:00
c4744b9e22
Add FIXMEs.
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llvm-svn: 74879
2009-07-06 23:11:08 +00:00
3d8ccdb4be
isThumb2 really should mean thumb2 only, not thumb2+.
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llvm-svn: 74871
2009-07-06 22:29:14 +00:00
40398233b7
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
e63b0e6f79
Added ARM::mls for armv6t2.
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llvm-svn: 74866
2009-07-06 22:05:45 +00:00
0a1e2787a0
pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the generic code to not pick the default.
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llvm-svn: 74839
2009-07-06 18:09:11 +00:00
cf5ea6c26f
pic16 isn't ready to handle llvm.metadata yet.
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llvm-svn: 74838
2009-07-06 18:07:06 +00:00
b89d3db1fd
Implement _CONFIG macro to allow users to se to configuration settings on the part.
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Implement _section macro to allow users to place objects in specific sections.
Implement _address macro to allow users to place objects at a particular address.
Placing objects at a memory address:
crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter.
llvm-svn: 74822
2009-07-06 10:18:37 +00:00
5d569c563d
Corrected the names description. Change in a comment. No functionality change.
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llvm-svn: 74819
2009-07-06 08:22:15 +00:00
5661ea68e7
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
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cleanup, removed some #includes and moved Object Code Emitter out-of-line.
llvm-svn: 74813
2009-07-06 05:09:34 +00:00
cac07a4cb7
Silence a warning when assertions are turned off.
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llvm-svn: 74779
2009-07-03 16:11:59 +00:00
c3f89b3fbb
Silence a warning when assertions are turned off.
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llvm-svn: 74778
2009-07-03 16:11:34 +00:00
075276e9ce
Silence warning when building without assertions.
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llvm-svn: 74777
2009-07-03 16:06:07 +00:00
5a16986cfc
Silence warnings when assertions are turned off.
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llvm-svn: 74776
2009-07-03 16:03:33 +00:00
a587ffe12d
For extended loads of type i1 to i8, we will need to at least one byte from memory.
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The change in the .td file is to mark the side effects of mov insn.
llvm-svn: 74768
2009-07-03 07:58:59 +00:00
9db3e70056
Various small changes related to the Condition Register on PowerPC.
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Don't spill to the CR save area when using the SVR4 ABI for now.
Don't rely on constants assigned for registers to be in order (they aren't assigned in order).
Make sure CR bits are mapped to the corresponding CR field.
llvm-svn: 74767
2009-07-03 06:47:55 +00:00
773f14c008
Refactor ABI code in the PowerPC backend.
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Make CalculateParameterAndLinkageAreaSize() Darwin-specific.
Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin().
Rename MachoABI to DarwinABI for consistency.
Rename ELF ABI to SVR4 ABI for consistency.
Factor out common call return lowering between the Darwin and SVR4 ABI.
Factor out common call lowering between the Darwin and SVR4 ABI.
llvm-svn: 74766
2009-07-03 06:47:08 +00:00
b93960d779
Implement the SVR4 ABI for PowerPC.
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Implement LowerFORMAL_ARGUMENTS_SVR4().
Implement LowerCALL_SVR4().
Add support for split arguments.
Implement by value parameter passing for aggregates.
Add support for variable argument lists.
Create the spill area for argument registers of variable argument functions no longer at a fixed offset.
Make sure callee saved registers are spilled to the correct stack offsets.
Change allocation order of non-volatile floating-point registers.
Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls.
Add support for variable argument calls with Vector arguments.
Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers.
Stop creating illegal i8 values in LowerVASTART().
Add memory access width hints.
Make sure to reserve space on the stack for the frame pointer.
When using the SVR4 ABI, reserve r13 for the Small Data Area pointer.
Assure that the frame pointer is spilled to the correct location on the stack.
Some FP registers were not marked as volatile.
Make sure the i64 words from a long double are passed either both in registers or both on the stack.
Only put integer arguments in registers which are not marked with the inreg flag.
llvm-svn: 74765
2009-07-03 06:45:56 +00:00
aea6059ed4
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
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With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
llvm-svn: 74764
2009-07-03 06:44:53 +00:00
98bdaaa3ee
Small cleanups in the PowerPC backend.
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Small refactoring in LowerFORMAL_ARGUMENTS().
Correct minor formatting issues.
Remove size argument of CreateCopyOfByValArgument().
Remove dead argument from CalculateStackSlotSize().
Remove unused variable ReturnAddrIndex from various targets.
llvm-svn: 74763
2009-07-03 06:43:35 +00:00
0e8bde5910
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
6d9041100b
Add Thumb2 load / store multiple instructions. Not used yet.
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llvm-svn: 74749
2009-07-03 00:18:36 +00:00
f30ee8820a
t2LDR_PRE etc are loads.
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llvm-svn: 74741
2009-07-03 00:08:19 +00:00
53cdf022b6
Added indexed stores.
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llvm-svn: 74740
2009-07-03 00:06:39 +00:00
8ecd7eb3f7
Sign extending pre/post indexed loads.
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llvm-svn: 74736
2009-07-02 23:16:11 +00:00
ade05a37f1
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
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llvm-svn: 74731
2009-07-02 22:18:33 +00:00
6141511621
CMake build fixes, from Xerxes Ranby
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llvm-svn: 74720
2009-07-02 18:53:52 +00:00
ccfb5105eb
simplify some logic by using isWeakForLinker(). Thanks to Anton for
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pointing this out.
llvm-svn: 74700
2009-07-02 16:08:53 +00:00
84c6cda2ef
Thumb2 pre/post indexed loads.
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llvm-svn: 74696
2009-07-02 07:28:31 +00:00
844f0b4562
80 col violation.
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llvm-svn: 74693
2009-07-02 06:44:30 +00:00
2c450d35ae
Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
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llvm-svn: 74692
2009-07-02 06:38:40 +00:00
87bb642676
@GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.
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This fixes an llvm-gcc bootstrap problem I introduced.
llvm-svn: 74691
2009-07-02 04:22:01 +00:00
d1c5951615
Fix yet-another bug I introduced into fastisel, this time handling
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constant pool references that weren't getting properly rip-relative.
llvm-svn: 74689
2009-07-02 03:14:25 +00:00
eefbf1961c
Remove getFunctionAlignment from TargetELFInfo and use new MachineFunction alignment method
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llvm-svn: 74686
2009-07-02 02:13:13 +00:00
979da0e590
80 col violation.
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llvm-svn: 74683
2009-07-02 01:30:04 +00:00
4ec83ea628
clarify: stub emission depends on the version of the linker you use, it has nothing
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to do with the target. Also, the stub elimination optimization *requires* making the
stub explicit.
llvm-svn: 74682
2009-07-02 01:24:34 +00:00
d9c55368e7
Factor out ARM indexed load matching code.
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llvm-svn: 74681
2009-07-02 01:23:32 +00:00
43f33dd550
Fix a bunch of other places that used operator[] to test whether
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a key is present in a std::map or DenseMap to use find instead.
llvm-svn: 74676
2009-07-02 00:17:47 +00:00
4e6044c405
Add darwin stub removal to wishlist.
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llvm-svn: 74667
2009-07-01 23:36:02 +00:00
deb35afd23
Add a new addressing mode for NEON load/store instructions.
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llvm-svn: 74658
2009-07-01 23:16:05 +00:00
affb68bd08
Fix a comment typo.
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llvm-svn: 74650
2009-07-01 21:59:43 +00:00
bbbf805049
Fix up a comment: besides the >80col lines, the operation for this
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addressing mode is encoded in the second operand, not the third.
llvm-svn: 74641
2009-07-01 21:22:45 +00:00
512ff7353e
Update comments to make it clear that the function alignment is the Log2 of the
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bytes and not bytes.
llvm-svn: 74624
2009-07-01 18:50:55 +00:00
1f50b61329
Fix codegen for references to available_externally symbols. This fixes
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PR4482.
llvm-svn: 74613
2009-07-01 16:53:44 +00:00
f95fa1b721
Fix some fast-isel problems selecting global variable addressing in
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pic mode.
llvm-svn: 74582
2009-07-01 03:27:19 +00:00
d379e896ff
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
75c12e1569
Remove unused AsmPrinter OptLevel argument, and propogate.
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- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
llvm-svn: 74579
2009-07-01 01:48:54 +00:00
86c7e20ca6
Add PIC load and store patterns for Thumb-2.
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llvm-svn: 74577
2009-07-01 00:01:13 +00:00
a83100f687
Thumb-2 load and store double description. But nothing yet creates them.
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llvm-svn: 74566
2009-06-30 22:50:01 +00:00
31ceb1bcba
Add an "alignment" field to the MachineFunction object. It makes more sense to
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have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.
This allows for future work that would allow for precise no-op placement and the
like.
llvm-svn: 74564
2009-06-30 22:38:32 +00:00
d0890a2bad
Add thumb-2 store word, halfword, and byte.
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llvm-svn: 74555
2009-06-30 22:11:34 +00:00
28d6d87244
Improve Thumb-2 jump table support.
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llvm-svn: 74549
2009-06-30 19:50:22 +00:00
50475de6af
Add 256-bit memory operand support.
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llvm-svn: 74548
2009-06-30 19:24:59 +00:00
27303cde82
Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
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llvm-svn: 74543
2009-06-30 18:04:13 +00:00
317fd045e2
Fix PR4485.
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Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.
llvm-svn: 74534
2009-06-30 16:40:03 +00:00
bd971ffcc6
Fix PR4484.
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This was caused by me confounding FP0 and ST(0).
llvm-svn: 74523
2009-06-30 12:18:16 +00:00
0dc101b897
Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
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The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.
This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.
llvm-svn: 74518
2009-06-30 08:49:04 +00:00
b127c0684f
remove a bogus note.
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llvm-svn: 74509
2009-06-30 05:22:31 +00:00
5ed255e642
add a note
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llvm-svn: 74508
2009-06-30 04:20:46 +00:00
57726817aa
A few more load instructions.
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llvm-svn: 74500
2009-06-30 02:15:48 +00:00
8adf1fdc80
Add a 256-bit register class and YMM registers.
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llvm-svn: 74469
2009-06-29 22:50:51 +00:00
76b37950ca
Add Thumb-2 support for TEQ amd TST.
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llvm-svn: 74468
2009-06-29 22:49:42 +00:00
538064d6b1
FIX PR 4459.
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Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.
llvm-svn: 74446
2009-06-29 20:29:59 +00:00
45c299ef65
Add a target-specific DAG combine on X86 to fold the common pattern of
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fence-atomic-fence down to just the atomic op. This is possible thanks to
X86's relatively strong memory model, which guarantees that locked instructions
(which are used to implement atomics) are implicit fences.
llvm-svn: 74435
2009-06-29 18:04:45 +00:00
46b56ffae3
Add processor descriptions for Istanbul and Shanghai.
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llvm-svn: 74429
2009-06-29 16:54:06 +00:00
a4b8998fbb
Fix a subtarget feature bug.
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llvm-svn: 74428
2009-06-29 16:51:01 +00:00
f92ba97cda
Add more vector ValueTypes for AVX and other extended vector instruction
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sets.
llvm-svn: 74427
2009-06-29 16:47:10 +00:00
dbf11ba800
Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
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llvm-svn: 74423
2009-06-29 15:33:01 +00:00
24a3724b04
Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt
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to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.
llvm-svn: 74421
2009-06-29 13:11:32 +00:00
b23b50d54d
Implement Thumb2 ldr.
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After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
llvm-svn: 74420
2009-06-29 07:51:04 +00:00
0f2158b35f
Simplify a bit
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llvm-svn: 74385
2009-06-27 12:59:03 +00:00
a1b5b18bd0
ARM refactoring. Step 2: split RegisterInfo
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llvm-svn: 74384
2009-06-27 12:16:40 +00:00
33400e3670
Add ThumbInstrInfo.cpp to the CMake makefiles
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llvm-svn: 74382
2009-06-27 07:44:59 +00:00
1ec3afdc66
remove a bunch of fixmes (old checking code) and commonize all the
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target-specific operand printing functionality. Yay.
llvm-svn: 74379
2009-06-27 05:46:24 +00:00
ae0acfcef0
pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter.
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llvm-svn: 74378
2009-06-27 05:39:56 +00:00
cce1589e4e
simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.
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llvm-svn: 74377
2009-06-27 05:24:12 +00:00
d17366ae72
fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore.
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llvm-svn: 74375
2009-06-27 04:50:14 +00:00
Anton Korobeynikov