e03eecb75f
Remove Value::{isName, getNameRef}.
...
Also, change MDString to use a StringRef.
llvm-svn: 77098
2009-07-25 23:55:21 +00:00
0af00396a7
make SectionKind be a first-class pod struct instead of just
...
an enum.
llvm-svn: 77096
2009-07-25 23:21:55 +00:00
60f3b73e11
this is (unfortunately) several changes mixed together:
...
1. Spell SectionFlags::Writeable as "Writable".
2. Add predicates for deriving SectionFlags from SectionKinds.
3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into
ELFTargetAsmInfo.
4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the
BSS bit set (the real fix for PR4619).
5. Fix isSuitableForBSS to not put globals with explicit sections
set in BSS (which was the reason #4 wasn't fixed earlier).
6. Remove my previous hack for PR4619.
llvm-svn: 77085
2009-07-25 18:57:34 +00:00
7b5e51091e
document some invariants.
...
llvm-svn: 77084
2009-07-25 18:11:58 +00:00
2de9510572
add the most expedient hack to fix PR4619, along with a testcase.
...
Thanks to Rafael for the great example.
llvm-svn: 77083
2009-07-25 17:57:37 +00:00
691a4784db
Simplify JIT target selection.
...
- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
llvm-svn: 77060
2009-07-25 10:09:50 +00:00
b6ee0b1d9b
Mark attributes of return insn correctly. It was being assumed safe to delete in isSafeToDelete (a thing checked-in 76281).
...
llvm-svn: 77056
2009-07-25 07:48:53 +00:00
5680b4f285
Add new helpers for registering targets.
...
- Less boilerplate == good.
llvm-svn: 77052
2009-07-25 06:49:55 +00:00
ea23c3ba46
80 col violation.
...
llvm-svn: 77041
2009-07-25 01:55:25 +00:00
c1a5cfa9a0
Get rid of a couple of unnecessary getOpcode calls.
...
llvm-svn: 77035
2009-07-25 01:25:08 +00:00
b2c22f00de
Another TODO.
...
llvm-svn: 77026
2009-07-25 00:39:37 +00:00
f3a1fce8ae
Change Thumb2 jumptable codegen to one that uses two level jumps:
...
Before:
adr r12, #LJTI3_0_0
ldr pc, [r12, +r0, lsl #2 ]
LJTI3_0_0:
.long LBB3_24
.long LBB3_30
.long LBB3_31
.long LBB3_32
After:
adr r12, #LJTI3_0_0
add pc, r12, +r0, lsl #2
LJTI3_0_0:
b.w LBB3_24
b.w LBB3_30
b.w LBB3_31
b.w LBB3_32
This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
(smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
won't have to over-estimate the size.
Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.
llvm-svn: 77024
2009-07-25 00:33:29 +00:00
0dd5e1ed39
More migration to raw_ostream, the water has dried up around the iostream hole.
...
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
llvm-svn: 77019
2009-07-25 00:23:56 +00:00
f297256136
ARM code emitter can't handle Thumb2 instructions yet. So don't even try.
...
llvm-svn: 77018
2009-07-25 00:13:11 +00:00
15d3967f92
Fix build for GCC 4.0?
...
llvm-svn: 77016
2009-07-24 23:42:33 +00:00
b2dc296910
Fix compile with 4.4 (I hope?); PR4617.
...
llvm-svn: 77015
2009-07-24 23:23:46 +00:00
edb4a70325
Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.
...
llvm-svn: 77011
2009-07-24 23:12:02 +00:00
c64ce30c67
Uh. It would be useful to actually print the operand.
...
llvm-svn: 77004
2009-07-24 20:47:38 +00:00
70fa4661eb
fix some predicates
...
llvm-svn: 76999
2009-07-24 20:27:11 +00:00
a39aaa5fd5
change SectionKindForGlobal from being a public (and
...
previously virtual) function to being a static function
in the .cpp file.
llvm-svn: 76997
2009-07-24 20:14:10 +00:00
c26c76ec1d
Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod.
...
llvm-svn: 76995
2009-07-24 19:31:03 +00:00
708e559247
make SectionKindForGlobal target independent, and therefore non-virtual.
...
It's classifications now include elf-specific discriminators. Targets
that don't have these features (like darwin and pecoff) simply treat
data.rel like data, etc.
llvm-svn: 76993
2009-07-24 19:15:47 +00:00
5a49c54061
Add a workaround for Darwin assembler bug where it's not setting the thumb bit in Thumb2 jumptable entries. We now pass Olden.
...
llvm-svn: 76991
2009-07-24 18:54:23 +00:00
73f6651439
we already know the sectionkind when invoking SelectSectionForGlobal,
...
pass it in instead of recomputing it.
llvm-svn: 76990
2009-07-24 18:42:53 +00:00
bf9ac228f7
make SectionForGlobal non-virtual, add a hook for pic16 to do its "address=" hack.
...
llvm-svn: 76989
2009-07-24 18:34:27 +00:00
666c912ce3
Make sure thumb2 jumptable entries are aligned.
...
llvm-svn: 76986
2009-07-24 18:20:44 +00:00
886f303480
Clean up.
...
llvm-svn: 76984
2009-07-24 18:20:16 +00:00
986fc8e74b
Replace use of std::set with SmallPtrSet.
...
llvm-svn: 76983
2009-07-24 18:19:46 +00:00
b68b506d84
start refactoring pic16 section selection logic.
...
llvm-svn: 76977
2009-07-24 17:13:27 +00:00
9b6370d230
move ELF-specific code into ELFTargetAsmInfo.
...
llvm-svn: 76976
2009-07-24 17:02:17 +00:00
b6974c86f5
tidy up
...
llvm-svn: 76975
2009-07-24 16:53:52 +00:00
26f704669c
split the ELF-specific section flag inference-from-name code out
...
into its own helper function.
llvm-svn: 76974
2009-07-24 16:50:24 +00:00
a5ca93cdd5
make SectionFlagsForGlobal a private static function instead of a public
...
virtual one.
llvm-svn: 76973
2009-07-24 16:46:50 +00:00
552b407f8f
move a method up in the file, GV is always non-null, so remove a check.
...
llvm-svn: 76972
2009-07-24 16:44:01 +00:00
b34d0a2fcb
There is no need to pass the name into lib/Target/TargetAsmInfo.cpp
...
when we have a global with no section explicitly specified.
llvm-svn: 76971
2009-07-24 16:40:45 +00:00
555d1001d5
Another getName -> getNameStr
...
llvm-svn: 76967
2009-07-24 12:21:08 +00:00
12368685d8
Switch to getNameStr().
...
llvm-svn: 76962
2009-07-24 08:24:36 +00:00
95fc6ee51a
Remove unused member functions.
...
llvm-svn: 76960
2009-07-24 07:43:59 +00:00
dd2096898b
hoist section name uniquing logic up to the top-level SectionForGlobal
...
implementation, eliminating a dupe.
llvm-svn: 76953
2009-07-24 05:10:25 +00:00
c21c02aacd
reduce indentation
...
llvm-svn: 76951
2009-07-24 05:01:55 +00:00
ddf377df1a
simplify code by making special case more obvious
...
llvm-svn: 76950
2009-07-24 04:59:43 +00:00
ab0c0ef515
the 'isWeakForLinker' code is common between functions and globals, hoist it
...
and simplify some other code.
llvm-svn: 76949
2009-07-24 04:52:38 +00:00
0f5ebf5509
Replace UniqueSectionForGlobal with getSectionPrefixForUniqueGlobal.
...
The later doesn't depend on any crazy LLVM IR stuff, and this
pulls the concatenation of prefix with GV name (the root problem behind
PR4584) out one level.
llvm-svn: 76948
2009-07-24 04:49:34 +00:00
37e311a570
fix indentation.
...
llvm-svn: 76945
2009-07-24 04:11:40 +00:00
1553fdee55
use section flags more correctly.
...
llvm-svn: 76944
2009-07-24 04:08:17 +00:00
53f92dc95b
fix a mysterious and scary failure on test/CodeGen/X86/cstring.ll
...
llvm-svn: 76942
2009-07-24 03:55:48 +00:00
07bd1cd8c5
reduce api exposure: clients shouldn't call SectionKindForGlobal directly.
...
llvm-svn: 76941
2009-07-24 03:49:17 +00:00
5cd4dd391f
make Constant::getRelocationInfo return an enum, as suggested by Duncan.
...
llvm-svn: 76938
2009-07-24 03:27:21 +00:00
74b8117134
remove more bits of small section support.
...
llvm-svn: 76937
2009-07-24 03:16:53 +00:00
bc63d8bfbf
remove more remnants of small section support.
...
llvm-svn: 76936
2009-07-24 03:14:35 +00:00
26aff56462
Remove SectionKind::Small*. This was only used on mips, and is apparently
...
a sad mistake that is regretted. :)
llvm-svn: 76935
2009-07-24 03:11:51 +00:00
c3259f3ffb
Thumb2 should use the register scavenger.
...
llvm-svn: 76930
2009-07-24 01:05:51 +00:00
6cfbe61361
FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets.
...
llvm-svn: 76925
2009-07-24 00:53:56 +00:00
f37ea3ad75
Update insertps handling based on feedback. Move to a v4f32 style
...
to support vector arguments and scalar arguments correctly. Update
lowering and fix comment to refer to pinsr* instead of insertps.
llvm-svn: 76921
2009-07-24 00:33:09 +00:00
17151155ed
Remove the IA-64 backend.
...
llvm-svn: 76920
2009-07-24 00:30:09 +00:00
cdd405d804
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.
...
llvm-svn: 76919
2009-07-24 00:16:18 +00:00
8ce4021a40
Added a 2+-byte NOP instruction to the Intel tables,
...
for the assembler/disassembler to use.
llvm-svn: 76914
2009-07-23 23:39:34 +00:00
dc99f07113
Thumb2 does not allow the use of "pc" register as part of the load / store address.
...
llvm-svn: 76909
2009-07-23 23:09:51 +00:00
f4981105ca
Revert r75581: it causes massive breakage in the Ada
...
testsuite, due to exception handling not working
correctly. Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday. Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc. This is a
nasty flaw in the nightly testers. (On the other
hand the Ada testsuite links with the just built
libgcc).
llvm-svn: 76895
2009-07-23 19:00:02 +00:00
d2919a1773
Fix up ARM constant island pass for Thumb2.
...
Also fixed up code to fully use the SoImm field for ADR on ARM mode.
llvm-svn: 76890
2009-07-23 18:27:47 +00:00
95a73e2eab
Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.
...
Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.
llvm-svn: 76889
2009-07-23 18:26:03 +00:00
6deba28c6f
Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.
...
llvm-svn: 76883
2009-07-23 17:06:46 +00:00
edda8cbfad
80 col violation.
...
llvm-svn: 76872
2009-07-23 07:58:08 +00:00
b1b77ca862
Support insertps via the intrinsic and add a couple of simple
...
testcases to make sure it's being generated.
llvm-svn: 76843
2009-07-23 02:22:41 +00:00
56df1e7969
Do not call getMangledName on Intrinsics.
...
llvm-svn: 76842
2009-07-23 02:11:04 +00:00
d2aeef0703
remove SectionFlags::Small: it is only used on Xcore, and we'll find
...
a better solution for it in the future.
llvm-svn: 76818
2009-07-22 23:27:22 +00:00
824ab40381
x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2).
...
llvm-svn: 76817
2009-07-22 23:26:55 +00:00
a0b2dc93b5
Fix typo in addrmode definition.
...
llvm-svn: 76806
2009-07-22 22:24:31 +00:00
e270d4a4dd
Use getTargetConstant instead of getConstant since it's meant as an constant operand.
...
llvm-svn: 76803
2009-07-22 22:03:29 +00:00
5899dda08c
Switch some clients to Value::getName(), and other getName() user
...
simplification.
- NFC
llvm-svn: 76789
2009-07-22 21:33:09 +00:00
99abb47dd6
Simplify some uses of Value::getName()
...
llvm-svn: 76786
2009-07-22 21:10:12 +00:00
ed1c14ba65
Fix indentation.
...
llvm-svn: 76778
2009-07-22 20:26:37 +00:00
1ec4396ee3
Eliminate a redudant check Eli pointed out.
...
llvm-svn: 76762
2009-07-22 18:08:05 +00:00
637ca93fc4
doxygenify
...
llvm-svn: 76750
2009-07-22 16:53:56 +00:00
4f7f19a7c0
Thread local globals don't require special handling by the linker and so can
...
be placed in the standard data / bss sections.
llvm-svn: 76735
2009-07-22 11:01:00 +00:00
0cf7f5d6d2
Revert commit 76707, it was breaking the llvm-gcc build
...
on linux platforms. The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html
llvm-svn: 76733
2009-07-22 10:35:05 +00:00
4b02b2f79c
Don't forget D16 - D31 are clobbered by calls and sjlj eh.
...
llvm-svn: 76729
2009-07-22 06:46:53 +00:00
6253a19651
Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.
...
llvm-svn: 76728
2009-07-22 06:37:28 +00:00
eadb6681cf
Fix a obvious copy-n-paste bug.
...
llvm-svn: 76727
2009-07-22 06:12:40 +00:00
2e1d66847c
Get rid one of the getRegisterNumbering. Also add D16 - D31.
...
llvm-svn: 76725
2009-07-22 05:55:18 +00:00
caccc0081a
Add support for MMX VSETCC.
...
llvm-svn: 76713
2009-07-22 01:06:52 +00:00
5e4755943e
Added the unconditional JMP with an 8-bit relocation for the
...
assembler / disassembler.
llvm-svn: 76712
2009-07-22 01:05:20 +00:00
c7a243dfdd
Add an entry.
...
llvm-svn: 76711
2009-07-22 00:58:27 +00:00
fd164b863f
inline the two MergeableConstSection implementations into their
...
only caller.
llvm-svn: 76710
2009-07-22 00:47:11 +00:00
8ebaec6b27
set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,
...
updating a mips testcase to expect it.
llvm-svn: 76707
2009-07-22 00:41:56 +00:00
fab2059d0e
don't set the small flag yet.
...
llvm-svn: 76706
2009-07-22 00:30:39 +00:00
b300a4f988
remove the SelectSectionForMachineConst hook, replacing it with
...
a new getSectionForMergableConstant hook. This removes one dependence
of TAI on Type, and provides the hook with enough info to make the
right decision based on whether the global has relocations etc.
llvm-svn: 76705
2009-07-22 00:28:43 +00:00
4dc848f3e8
Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it.
...
This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.
llvm-svn: 76703
2009-07-22 00:25:27 +00:00
47db941fd3
Get rid of the Pass+Context magic.
...
llvm-svn: 76702
2009-07-22 00:24:57 +00:00
4565ef5b65
reimplement Constant::ContainsRelocations as
...
Constant::getRelocationInfo(), which has a much simpler
to use API. It still should not be part of libvmcore, but
is better than it was. Also teach it to be smart about
hidden visibility.
llvm-svn: 76700
2009-07-22 00:05:44 +00:00
87aaa194f9
Fixing cp island pass. Step 1: Determine whether the constant pool offset can be
...
negative on an individual bases rather than basing on whether it's in thumb
mode.
llvm-svn: 76698
2009-07-21 23:56:01 +00:00
f206d925a5
Fix comment.
...
llvm-svn: 76693
2009-07-21 23:54:22 +00:00
aa17ab0669
simplify code now that it is inlined.
...
llvm-svn: 76689
2009-07-21 23:49:55 +00:00
e61aff6df1
Now that RelocBehaviour() is never overloaded, it doesn't need to be
...
virtual. Just inline it into its two current call sites in preparation
for simplifying the code.
llvm-svn: 76686
2009-07-21 23:47:11 +00:00
bc2482a0a4
this doesn't break any of the 4 ia64 tests.
...
llvm-svn: 76683
2009-07-21 23:42:24 +00:00
e41745f837
alpha doesn't need to redefine this: it only supports PIC codegen anyway.
...
llvm-svn: 76682
2009-07-21 23:41:35 +00:00
9bd736e2f7
no really, I can spell!
...
llvm-svn: 76679
2009-07-21 23:36:01 +00:00
cfb01e26bc
add an API so target-independent codegen can determine if a constant
...
pool entry will require relocations against it. I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.
llvm-svn: 76678
2009-07-21 23:34:23 +00:00
0ecf7b6f4a
remove the last bits of SectionFlagsForGlobal. There is some flag here that
...
depends on XS1A, but I think the ReadOnlySection is already set up for this
and there is no testcase that this breaks. If this is really needed, we can
add the appropriate parameterization to TargetAsmInfo in the future to support
this.
llvm-svn: 76667
2009-07-21 22:42:37 +00:00
bf4bc25236
don't mask out the small flag and then reapply it later.
...
llvm-svn: 76666
2009-07-21 22:39:28 +00:00
684d5fe95d
if Xcore doesn't support TLS, it doesn't have to worry about thread local LLVM IR, it should be rejected by a front-end.
...
llvm-svn: 76665
2009-07-21 22:37:38 +00:00
43893573f4
remove the Xcore implementation of SelectSectionForGlobal. While you have
...
to twist your brain to see it, I believe it is the same as ELFTargetAsmInfo::SelectSectionForGlobal.
llvm-svn: 76664
2009-07-21 22:36:53 +00:00
83e6f9370d
simplify based on the fact that darwin always uses L/l.
...
llvm-svn: 76662
2009-07-21 22:32:55 +00:00
5626b88047
make some stuff private.
...
llvm-svn: 76661
2009-07-21 22:30:39 +00:00
aa30d25bb4
Remove the XCore custom implementation of MergeableConstSection, relying on
...
the generic ELF version instead. This will result in its mergable constant
sections getting named ".rodata.cst4" instead of ".cp.const4", but the
linker looks at the section flags, not the name of the section AFAICT.
llvm-svn: 76659
2009-07-21 22:25:52 +00:00
4d5c3b2e86
inline a trivial method into its only call site and fix indentation of cases
...
llvm-svn: 76654
2009-07-21 21:29:08 +00:00
fd047e11a1
Remove some overridden functions in XCoreTargetAsmInfo that are
...
implemented exactly the same way as its ELFTargetAsmInfo subclass
has them.
llvm-svn: 76653
2009-07-21 21:26:32 +00:00
c21954dff6
minor cleanups.
...
llvm-svn: 76645
2009-07-21 21:09:35 +00:00
1f74b1fdfd
Missed a piece of the commit to remove the shift flavor.
...
llvm-svn: 76635
2009-07-21 20:15:24 +00:00
da9eda8ef6
Remove shift amount flavor. It isn't actually complete enough to
...
be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
llvm-svn: 76633
2009-07-21 20:12:16 +00:00
1e08ca7313
Remove a couple of already-implemented notes.
...
llvm-svn: 76631
2009-07-21 20:05:43 +00:00
18e32946f8
Add fake v7 itineraries for now.
...
llvm-svn: 76612
2009-07-21 18:54:14 +00:00
100865e59d
make AsmPrinter::doFinalization iterate over the global variables
...
and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
llvm-svn: 76604
2009-07-21 18:38:57 +00:00
38e88cb53f
Do not select tSXTB / tSXTH in thumb2 mode.
...
llvm-svn: 76600
2009-07-21 18:15:26 +00:00
f5f5880c5a
reduce indentation by using an early exit.
...
llvm-svn: 76596
2009-07-21 17:59:36 +00:00
d0014cf36d
Update CMake files.
...
llvm-svn: 76595
2009-07-21 17:43:20 +00:00
767e90ef30
whitespace cleanups, make the MipsAsmPrinter::doInitialization
...
chain to the super class instead of initializing mangler directly.
This gives it .file and module level inline asm support among other
things.
llvm-svn: 76593
2009-07-21 17:39:48 +00:00
249df80306
fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.
...
This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.
llvm-svn: 76592
2009-07-21 17:37:35 +00:00
1177cee9dc
Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match the
...
LLVM IR concept.
llvm-svn: 76590
2009-07-21 17:30:51 +00:00
ca8192744a
fix indentation
...
llvm-svn: 76587
2009-07-21 17:25:13 +00:00
b43f7cba73
remove an unneeded override.
...
llvm-svn: 76586
2009-07-21 17:23:41 +00:00
ecaf7dedd2
more random whitespace cleanup, eliminate #define, avoid copying
...
vectors needlessly, doxygenify comments, improve constness, etc.
llvm-svn: 76585
2009-07-21 17:20:18 +00:00
0e6e8cb590
some simple whitespace cleanup, avoid copying vectors for no reason
...
as much, etc.
llvm-svn: 76578
2009-07-21 16:44:47 +00:00
f477ac5655
Add missing include.
...
llvm-svn: 76555
2009-07-21 08:58:44 +00:00
d08978cb43
Switch this API to StringRef.
...
llvm-svn: 76554
2009-07-21 08:57:31 +00:00
0ecb504508
Remove some unused code.
...
llvm-svn: 76541
2009-07-21 07:08:59 +00:00
12e543228d
Support adding relocations for data sections, handling the cases where
...
global declared symbols are initialized with references from other global
symbols.
llvm-svn: 76540
2009-07-21 06:51:32 +00:00
715e6c0a0f
Add jumps with 8-bit relocation for assembler / disassembler. Patch by Sean Callanan.
...
llvm-svn: 76536
2009-07-21 06:00:18 +00:00
a8e2ad3e3c
Add the following functions:
...
- SYSCALL (normal fast system call instruction) [0f 05]
- SYSENTER (system call entry instruction) [0f 34]
- SYSEXIT (system call exit instruction) [0f 35]
- SYSEXIT64 (system call exit instruction to 64-bit user code) [REX.W 0f 35]
- SYSRET (system call return instruction) [0f 07]
Patch by Sean Callanan.
llvm-svn: 76528
2009-07-21 01:07:24 +00:00
0d8b0cf3b8
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
...
llvm-svn: 76520
2009-07-21 00:31:12 +00:00
68cb8d0310
revert 76503 while I figure out what's going on
...
llvm-svn: 76517
2009-07-21 00:12:29 +00:00
a2d2adfa4e
Make sure a global matching asm 'i' constraint gets its
...
flags set properly. (hasMemory is clearly irrelevant
when matching 'i', I don't understand what this was
supposed to be doing.)
gcc.apple/asm-block-25.c (test passed before by
accident, but generated code was wrong)
llvm-svn: 76503
2009-07-20 23:39:13 +00:00
2cd8f753c0
clean up some formatting, indent by 2 instead of 4.
...
llvm-svn: 76490
2009-07-20 22:23:48 +00:00
711b9e809c
CMP and TST define CPSR, not use it.
...
llvm-svn: 76489
2009-07-20 22:13:31 +00:00
40c68ad3bb
Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
...
next.
llvm-svn: 76486
2009-07-20 22:02:59 +00:00
d04f088345
Simplify the code in DarwinTargetAsmInfo::emitUsedDirectiveFor so that humans can understand it.
...
llvm-svn: 76480
2009-07-20 21:38:26 +00:00
dde1a8eef4
Pass in the unfortunately named "LessPrivatePrefix" for the
...
"LinkerPrivatePrefix". It seems to have been used in only one place before I
started this "linker_private" business. I'm thinking that a rename is in
order...
llvm-svn: 76479
2009-07-20 21:30:28 +00:00
2b11c7de4a
Add MCAsmLexer interface.
...
- This provides the AsmLexer interface to the target specific assembly parsers.
llvm-svn: 76460
2009-07-20 20:01:54 +00:00
027d9f93ea
Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
...
llvm-svn: 76458
2009-07-20 19:47:55 +00:00
1bcfbff7af
Rename Mangler linkage enums to something less gross.
...
llvm-svn: 76456
2009-07-20 19:41:27 +00:00
3c2a893ac7
Add MCAsmParser interface.
...
- This provides the AsmParser interface to the target specific assembly
parsers.
llvm-svn: 76453
2009-07-20 18:55:04 +00:00
6b1be83937
remove TargetAsmInfo::ExpandInlineAsm
...
llvm-svn: 76445
2009-07-20 17:59:32 +00:00
5849d22bd1
Copy ExpandInlineAsm to TargetLowering from TargetAsmInfo.
...
llvm-svn: 76441
2009-07-20 17:51:36 +00:00
d290543332
rename TargetAsmInfo::getASDirective -> getDataASDirective
...
llvm-svn: 76431
2009-07-20 17:12:46 +00:00
802a0b576f
Use t2LDRri12 for frame index loads.
...
llvm-svn: 76424
2009-07-20 15:55:39 +00:00
447b7fd4bb
For PC relative relocations where symbols are defined in the same section they
...
are referenced, ignore the relocation entry and patch the relocatable field with
the computed symbol offset directly
llvm-svn: 76414
2009-07-20 08:52:02 +00:00
fa60698c29
Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c.
...
llvm-svn: 76401
2009-07-20 06:59:32 +00:00
d214b72962
Model fpscr to prevent fcmped / fcmpezs etc from being deleted.
...
llvm-svn: 76390
2009-07-20 02:12:31 +00:00
a3c6f6bffa
Add plumbing for the `linker_private' linkage type. This type is meant for
...
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.
This is plumbing, so we don't have a use of it yet. More to come, etc.
llvm-svn: 76385
2009-07-20 01:03:30 +00:00
88f35c870b
CMake support for SystemZ.
...
llvm-svn: 76384
2009-07-20 00:24:17 +00:00
be853b7b5d
Don't override LowerArguments in the SPARC backend. In addition to
...
being more consistent with other backends, this makes the SPARC backend
deal with functions with arguments with illegal types correctly, which
fixes some tests in test/CodeGen/Generic.
llvm-svn: 76375
2009-07-19 19:53:46 +00:00
151b23d043
Fix a regression from 76124. Thumb1 instructions default to S bit being true.
...
llvm-svn: 76374
2009-07-19 19:16:46 +00:00
ac0ca9241a
Fix some minor MSVC compiler warnings.
...
llvm-svn: 76356
2009-07-19 01:38:38 +00:00
8c0f05b6be
Unbreak build
...
llvm-svn: 76354
2009-07-19 01:33:04 +00:00
916a0f3262
Switch Alpha over to the new call lowering style. New code mostly
...
copied from the SystemZ target. I don't think this causes any
significant changes to the output (I compared the assembly, and the
results appeared to be essentially unchanged), although I don't actually
have an Alpha to test on.
I would appreciate if anyone with the appropriate hardware could test
this. I'm not sure if that includes anyone subscribed to llvm-commits,
though.
llvm-svn: 76353
2009-07-19 01:11:32 +00:00
87ad1e54d4
SystemZ *does* have a CodeGen/AsmPrinter split.
...
- What it doesn't have is the rest of its cmake files...
llvm-svn: 76352
2009-07-19 00:46:44 +00:00
7eaf6dd84a
Tweak cmake files for the four targets that don't split CodeGen out.
...
- We should canonicalize this and get rid of the cmake and llvm-config hacks to
support both variants.
llvm-svn: 76350
2009-07-19 00:26:46 +00:00
83779208cc
Add dependencies from TargetInfo onto .td generation.
...
- Shouldn't really be necessary, but currently .inc files get included into
some main target headers.
llvm-svn: 76349
2009-07-19 00:21:12 +00:00
50bf9a60e5
Use R_X86_64_32S to handle Jump Table Index relocation entries. Hide TAI usage inside getSection* functions
...
llvm-svn: 76347
2009-07-18 23:24:01 +00:00
f03e78f024
Add some missing includes.
...
llvm-svn: 76346
2009-07-18 23:22:46 +00:00
67038c1333
Put Target definitions inside Target specific header, and llvm namespace.
...
llvm-svn: 76344
2009-07-18 23:03:22 +00:00
e376b53c7b
Use a better name for the label relocations while emitting them for Jump Tables
...
llvm-svn: 76334
2009-07-18 20:52:11 +00:00
484e90b45e
Add support to properly reference private symbols on relocation entries.
...
Use proper relocation type to build relocations for JumpTables (rodata
sections).
llvm-svn: 76326
2009-07-18 19:30:09 +00:00
0ef680bcbd
Add carry producing / using versions of add / sub
...
llvm-svn: 76316
2009-07-18 14:16:06 +00:00
8486df0ed2
Expand frem
...
llvm-svn: 76315
2009-07-18 13:44:25 +00:00
de5e015bfd
Turn abort() into unreachable
...
llvm-svn: 76314
2009-07-18 13:34:59 +00:00
30b1c2f636
Turn few asserts into errors / unreachable's
...
llvm-svn: 76313
2009-07-18 13:33:17 +00:00
6e4bdd7d78
Handle vector returns
...
llvm-svn: 76312
2009-07-18 12:51:06 +00:00
39f2a22401
Provide expansion for ct* intrinsics
...
llvm-svn: 76311
2009-07-18 12:26:13 +00:00
c3b10f0677
Expand sext_inreg for i1
...
llvm-svn: 76310
2009-07-18 12:20:36 +00:00
e20cbf3068
Enable cross register class coalescing.
...
llvm-svn: 76281
2009-07-18 02:10:10 +00:00
0c317a99c4
Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency.
...
llvm-svn: 76279
2009-07-18 01:43:53 +00:00
18fe458103
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
...
llvm-svn: 76248
2009-07-17 22:13:25 +00:00
e79b2bc088
Untangle a snarl that I discovered when updating the mangler,
...
starting in getCurrentFunctionEHName. Among other problems,
we would try to privative a "foo.eh" label, but end up emitting
the label as _Lfoo.eh instead of L_foo.eh on darwin. This is really
bad, and the linker has always tolerated these labels existing.
For now, just emit them as _foo.eh.
This patch also fixes problems with ".eh" labels on unnamed
functions and eliminates two strangely defined TargetAsmInfo
hooks.
llvm-svn: 76231
2009-07-17 20:46:40 +00:00
71475775b9
Sketch support for target specific assembly parser.
...
- Not fully enabled yet, need a configure regeneration.
llvm-svn: 76230
2009-07-17 20:42:00 +00:00
bdffb1a333
Start generating AsmMatcher.inc for X86.
...
llvm-svn: 76213
2009-07-17 18:55:26 +00:00
15d54b9504
r76102 added the MachineCodeEmitter::processDebugLoc call and called it from
...
the X86 Emitter. This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.
llvm-svn: 76211
2009-07-17 18:49:39 +00:00
acd2f4dcea
Add missed return
...
llvm-svn: 76209
2009-07-17 18:28:59 +00:00
33d1e7db01
Add logic to align instruction operands to columns for pretty-printing.
...
No target uses this currently. This patch only adds the mechanism so
that local installations can choose to enable this.
llvm-svn: 76177
2009-07-17 14:24:46 +00:00
35e95639c0
Avoid a compiler warning when assertions are turned off.
...
llvm-svn: 76176
2009-07-17 12:25:14 +00:00
fab6cbe6cd
Oops, accidentally set a legal operation to expand.
...
llvm-svn: 76165
2009-07-17 07:34:23 +00:00
6a60a66b2b
Expand misc operations from test/CodeGen/Generic.
...
llvm-svn: 76163
2009-07-17 07:28:06 +00:00
efa2215e30
Handle void in XCoreTargetLowering::isLegalAddressingMode. Triggers in
...
test/CodeGen/Generic.
llvm-svn: 76162
2009-07-17 07:16:38 +00:00
836024d76d
Remove some unnecessary expansion markings. Add a few expansion
...
markings that show up in test/CodeGen/Generic.
llvm-svn: 76160
2009-07-17 07:03:00 +00:00
aeb44a31f6
Add operation expansion/promotion for a bunch of operations, many of
...
which show up in test/CodeGen/Generic.
llvm-svn: 76158
2009-07-17 06:36:24 +00:00
aaf48343fb
Fix tSUBspi operand definition. It reads and writes sp, which is a high register.
...
llvm-svn: 76155
2009-07-17 05:43:12 +00:00
f840bc561a
Set an operation expansion, noticed while running
...
llc over test/CodeGen/Generic with -march=alpha.
llvm-svn: 76154
2009-07-17 05:23:03 +00:00
1fa07e1aea
One more operation expansion for MIPS, from test/CodeGen/Generic.
...
llvm-svn: 76149
2009-07-17 04:07:24 +00:00
d0ed53e711
Make sure CWriter's Context get's initialized.
...
llvm-svn: 76147
2009-07-17 03:43:21 +00:00
39d6faa31e
Expand a bunch of illegal operations on MIPS (found by
...
inspection and running over CodeGen/Generic).
llvm-svn: 76146
2009-07-17 02:28:12 +00:00
7ecc62d8c1
Fix 'may be used uninitialized' warning.
...
- Anton, please review.
llvm-svn: 76144
2009-07-17 02:19:26 +00:00
c5df7e2dc1
Emit cross regclass register moves for thumb2.
...
Minor code duplication cleanup.
llvm-svn: 76124
2009-07-16 23:26:06 +00:00
02a765280f
GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
...
llvm-svn: 76121
2009-07-16 22:53:10 +00:00
c7895d3cf6
Silence warning in Linux builds:
...
X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'
llvm-svn: 76105
2009-07-16 21:24:13 +00:00
efad8e45fe
Add line numbers to OProfile. To do this, I added a processDebugLoc()
...
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
llvm-svn: 76102
2009-07-16 21:07:26 +00:00
fdd0eb4011
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
...
llvm-svn: 76094
2009-07-16 18:44:05 +00:00
02fc607d54
Unbreak
...
llvm-svn: 76064
2009-07-16 14:36:52 +00:00
73fcd3d962
Temporary disable 16 bit bswap
...
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
460e59034b
Add instruction formats and few opcodes
...
llvm-svn: 76062
2009-07-16 14:35:20 +00:00
902facfe96
Add bswap patterns
...
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
ff21565821
Provide crazy pseudos for regpairs spills / reloads
...
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
7fa0ce1a21
Handle long-disp stuff more consistently
...
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
30e1cb2ab9
All FP instructions have 12 bit memory displacement field
...
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
5b03970c7b
Another predicate routine
...
llvm-svn: 76057
2009-07-16 14:33:01 +00:00
5761e33ce4
More helpers
...
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
b22afc7bcc
Add bunch of branch folding stuff
...
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
0f8c47a7bb
Add missed opcodes to short => long displacement conversion
...
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
201d49d56a
Cleanup
...
llvm-svn: 76053
2009-07-16 14:31:32 +00:00
3ae30e08ef
Fix logic inversion for RI-mode address selection
...
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
4121039bef
Expand 32-bit bitconverts via memory
...
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
bc2ead6ea3
Fix incomin arg stack frame offset in case we need to generate stack frame
...
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
3729850b50
Fix instruction mnemonics for some fp_to_sint operations
...
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
a293caf2ed
i32 values are passed extended also on stack. Handle this in generic way
...
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
1fa01d307c
We definitely have 1-0 bools
...
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
bd41c83ab0
Revert the commit, it just hides the real bug
...
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
6fb6e09781
Out GR128 regclass is not a 'real' i128 one.
...
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
fef4a3b762
Add missed condbranch opcodes
...
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
6c01db428f
Handle bitconverts
...
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
70d0bceed6
Unbreak mvi and friends - emit only 'significant' part of the operand
...
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
573fab1879
Expand fp_to_uint too
...
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
d57f8cee1d
We don't have FP truncstores
...
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
3f254d536a
Expand uint_to_fp
...
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
1ae8098144
Emit proper rounding mode for fp_to_sint
...
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
35a5d6f7ca
f32/f64 regs are stored on stack if we're short in FP regs
...
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
2acdac0f8e
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
...
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
8c18d8972c
Make FP zero to be legal FP immediate via LOAD ZERO
...
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
3894c8b6c2
Loads are not two-address in any way
...
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
c8f76f47dd
Add LOAD NEGATIVE instruction
...
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
ae2d8abf2c
LOAD COMPLEMENT instruction is not really two-addr
...
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
82af42d361
Add multiple add/sub instructions
...
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
b106b60456
Handle FP callee-saved regs
...
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
871784ba88
Proper FP extloads
...
llvm-svn: 76028
2009-07-16 14:22:46 +00:00
12400008a7
Add proper PWS impdef's
...
llvm-svn: 76027
2009-07-16 14:22:30 +00:00
3c44a39156
Propagate FP select_cc to dag inserters
...
llvm-svn: 76026
2009-07-16 14:22:15 +00:00
430ab4f382
Implement fp_to_sint
...
llvm-svn: 76025
2009-07-16 14:21:57 +00:00
345e08d24c
Implement FP regs spills / restores
...
llvm-svn: 76024
2009-07-16 14:21:41 +00:00
0fcdd8d424
Add fabs
...
llvm-svn: 76023
2009-07-16 14:21:27 +00:00
50485d65d4
Add fneg
...
llvm-svn: 76022
2009-07-16 14:21:12 +00:00
d7416e7c0b
We don't have native sine / cosine instructions
...
llvm-svn: 76021
2009-07-16 14:20:56 +00:00
77928399b0
More sint_to_fp stuff
...
llvm-svn: 76020
2009-07-16 14:20:39 +00:00
8195797de2
Add bunch of FP instructions
...
llvm-svn: 76019
2009-07-16 14:20:24 +00:00
45a56de726
We don't have any FP extloads
...
llvm-svn: 76018
2009-07-16 14:20:08 +00:00
ead9b9fb31
Implement all comparisons
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llvm-svn: 76017
2009-07-16 14:19:54 +00:00
7cb00653c1
Add constpool lowering / printing
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llvm-svn: 76016
2009-07-16 14:19:35 +00:00
c806cea4cb
Allow FP arguments pass / return
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llvm-svn: 76015
2009-07-16 14:19:16 +00:00
923b47e89d
Register FP regclasses
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llvm-svn: 76014
2009-07-16 14:19:02 +00:00
5509b58cd7
Add FP regs
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llvm-svn: 76013
2009-07-16 14:18:48 +00:00
570d0c36ee
Fix fallout from prev. patch
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llvm-svn: 76012
2009-07-16 14:18:31 +00:00
b25949b0f5
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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llvm-svn: 76011
2009-07-16 14:18:17 +00:00
e5b04d7102
Use divide single for 32 bit signed divides
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llvm-svn: 76010
2009-07-16 14:17:52 +00:00
Daniel Dunbar