Commit Graph

105997 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith 3f0fc7bca9 Bitcode: Correctly compare a Use against itself
Fix the sort of expected order in the reader to correctly return `false`
when comparing a `Use` against itself.

This was caught by test/Bitcode/binaryIntInstructions.3.2.ll, so I'm
adding a `RUN` line using `llvm-uselistorder` for every test in
`test/Bitcode` that passes.

A few tests still fail, so I'll investigate those next.

This is part of PR5680.

llvm-svn: 214157
2014-07-29 01:13:56 +00:00
Duncan P. N. Exon Smith fee1f5013c Fix line-endings, NFC
A follow-up commit is adding a RUN line to each of these tests, so fix
the line endings first.  This is a whitespace-only change.

llvm-svn: 214156
2014-07-29 01:10:57 +00:00
Duncan P. N. Exon Smith 78141cef2c IR: Augment debug statements for use-list order
llvm-svn: 214155
2014-07-29 01:09:46 +00:00
Rafael Espindola 5466a0fbc4 Delete dead code.
It was added 12 years ago, but never used (and in the case of sort, never
implemented).

llvm-svn: 214150
2014-07-29 00:38:55 +00:00
Matt Arsenault 57e74d2010 Fix typos / grammar.
llvm-svn: 214147
2014-07-29 00:02:40 +00:00
Matt Arsenault 60bd28cefd Fix header including itself
llvm-svn: 214146
2014-07-29 00:02:37 +00:00
Duncan P. N. Exon Smith ff3caa5a3e llvm-uselistorder: Add -num-shuffles option
llvm-svn: 214144
2014-07-28 23:25:21 +00:00
Kevin Enderby 49b4f53cad Tweak llvm-nm’s -undefined-only (aka -u) printing for Mach-O files
to just print the symbol name.  So it matches darwin’s nm(1) -u option.

llvm-svn: 214143
2014-07-28 23:17:38 +00:00
Manman Ren 4dbffad804 Clean up testing cases.
llvm-svn: 214142
2014-07-28 23:16:05 +00:00
Manman Ren bd1628a595 [Debug Info] unique MDNodes in the enum types of each compile unit.
The enum types array by design contains pointers to MDNodes rather than DIRefs.
Unique them when handling the enum types in DwarfDebug.

rdar://17628609

llvm-svn: 214139
2014-07-28 23:04:20 +00:00
Manman Ren bd3c17cc86 Remove extra ; in testing case.
llvm-svn: 214137
2014-07-28 22:46:46 +00:00
Duncan P. N. Exon Smith f849ace2ab IR: Optimize size of use-list order shuffle vectors
Since we're storing lots of these, save two-pointers per vector with a
custom type rather than using the relatively heavy `SmallVector`.

Part of PR5680.

llvm-svn: 214135
2014-07-28 22:41:50 +00:00
Manman Ren f8a1967c8c [Debug Info] add DISubroutineType and its creation takes DITypeArray.
DITypeArray is an array of DITypeRef, at its creation, we will create
DITypeRef (i.e use the identifier if the type node has an identifier).

This is the last patch to unique the type array of a subroutine type.

rdar://17628609

llvm-svn: 214132
2014-07-28 22:24:06 +00:00
Hans Wennborg 831f05802e Update LLVM version: 3.5 => 3.6
We branched 3.5, it's now time to work on 3.6.

This is Sylvestre's patch from [1] plus regenerated configure
file by me, and minus the release notes reset, which Sean
pointed out [2] should happen later.

 1. http://reviews.llvm.org/D4660
 2. http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20140721/111137.html

llvm-svn: 214131
2014-07-28 22:10:52 +00:00
Eric Christopher 14b76d5694 Regenerate autoconf, previous updates to the configury haven't
been updating configure.

llvm-svn: 214129
2014-07-28 22:00:44 +00:00
Duncan P. N. Exon Smith 3a7fb63c49 llvm-uselistorder: Get it building in configure+make after r214125
Somehow this wasn't being built before (only noticed now since the test
was XFAILed).

llvm-svn: 214128
2014-07-28 21:47:40 +00:00
Duncan P. N. Exon Smith 1f66c856b5 Bitcode: Serialize (and recover) use-list order
Predict and serialize use-list order in bitcode.  This makes the option
`-preserve-bc-use-list-order` work *most* of the time, but this is still
experimental.

  - Builds a full value-table up front in the writer, sets up a list of
    use-list orders to write out, and discards the table.  This is a
    simpler first step than determining the order from the various
    overlapping IDs of values on-the-fly.

  - The shuffles stored in the use-list order list have an unnecessarily
    large memory footprint.

  - `blockaddress` expressions cause functions to be materialized
    out-of-order.  For now I've ignored this problem, so use-list orders
    will be wrong for constants used by functions that have block
    addresses taken.  There are a couple of ways to fix this, but I
    don't have a concrete plan yet.

  - When materializing functions lazily, the use-lists for constants
    will not be correct.  This use case is out of scope: what should the
    use-list order be, if it's incomplete?

This is part of PR5680.

llvm-svn: 214125
2014-07-28 21:19:41 +00:00
Duncan P. N. Exon Smith 2101a7fbcf llvm-uselistorder: Add -save-temps option
This is part of PR5680.

llvm-svn: 214123
2014-07-28 21:12:19 +00:00
Duncan P. N. Exon Smith 75d94849b4 llvm-uselistorder: Check the correct flag for assembly
This is part of PR5680.

llvm-svn: 214122
2014-07-28 21:12:17 +00:00
Duncan P. N. Exon Smith b5806889f4 IR: Expose Module::rbegin() and rend()
A follow-up commit for PR5680 needs to visit functions in reverse order.
Expose iterators to allow that.

llvm-svn: 214121
2014-07-28 21:09:32 +00:00
Lang Hames 1f638440c6 [MCJIT] Remove extraneous parentheses in test case.
llvm-svn: 214117
2014-07-28 21:00:48 +00:00
Rafael Espindola 99298fc36a Test the linker plugin handling of llvm.used.
llvm-svn: 214116
2014-07-28 20:42:29 +00:00
Manman Ren 1a125c95de [Debug Info] add a template class DITypedArray.
Typedef DIArray to DITypedArray<DIDescriptor>. Also typedef DITypeArray as
DITypedArray<DITypeRef>.

This is the third of a series of patches to handle type uniqueing of the
type array for a subroutine type.

This commit should have no functionality change.

llvm-svn: 214115
2014-07-28 19:33:20 +00:00
Manman Ren ab8ffbaaee [Debug Info] rename getTypeArray to getElements, setTypeArray to setArrays.
This is the second of a series of patches to handle type uniqueing of the
type array for a subroutine type.

For vector and array types, getElements returns the array of subranges, so it
is a better name than getTypeArray. Even for class, struct and enum types,
getElements returns the members, which can be subprograms.

setArrays can set up to two arrays, the second is the templates.

This commit should have no functionality change.

llvm-svn: 214112
2014-07-28 19:14:13 +00:00
Manman Ren bf696e3930 [Debug Info] replace DIUnspecifiedParameter with DITrivialType.
This is the first of a series of patches to handle type uniqueing of the
type array for a subroutine type.

This commit makes sure unspecified_parameter is a DIType to enable converting
the type array for a subroutine type to an array of DITypes.

This commit should have no functionality change. With this commit, we may
change unspecified type to be a DITrivialType instead of a DIType.

llvm-svn: 214111
2014-07-28 18:52:30 +00:00
Matt Arsenault 2b252ecf6b R600: Modernize test
llvm-svn: 214108
2014-07-28 18:06:08 +00:00
Alex Lorenz 2b5d03ae94 llvm-cov: move the gcov code into a separate file.
The gcov compatible code is moved to its own file and
llvm-cov is updated to be a wrapper that always calls
the gcov main function.

llvm-svn: 214107
2014-07-28 18:03:51 +00:00
Matt Arsenault b9f46eeff1 R600/SI: Fix return type for isMIMG / isSMRD
All the others use bool, so these should too.

llvm-svn: 214106
2014-07-28 17:59:38 +00:00
Chandler Carruth b143274ad0 [SDAG] Add DEBUG logging to the legalizer, fixing a "bug" found by
inspection in the proccess, and shuffle the logging in the DAG combiner
around a bit.

With this it is much easier to follow what the legalizer is doing. It
should even accurately present most of the strange legalization
operations where a single node is replaced by multiple nodes, etc. There
is still some information lost (we log SDNodes not SDValues so we don't
log which result is used for which thing), but I think this is much
closer to a usable system. Notably, this will make it *much* more
apparant when legalization is actually happening inside the combiner, or
when there is a cycle caused by interactions of the legalizer and the
combiner.

The "bug" I fixed here I'm not sure is remotely possible to trigger. We
were only adding one of the nodes in a replacement to the updated set
rather than all of the nodes in the replacement. Realistically, the
worst result of this are nodes not getting back onto the worklist in the
DAG combiner. I doubt it is possible to trigger this today, and
I certainly don't have any ideas about how, but this at least brings the
code into alignment with the principled operation of the routine.

llvm-svn: 214105
2014-07-28 17:55:07 +00:00
Matt Arsenault 46645fa102 R600/SI: Implement getOptimalMemOpType
The default guess uses i32. This needs an address space argument
to really do the right thing in all cases.

llvm-svn: 214104
2014-07-28 17:49:26 +00:00
Rafael Espindola 6dca51502a Add tests for the various emit-llvm plugin options.
llvm-svn: 214102
2014-07-28 17:37:25 +00:00
Matt Arsenault 86033cae84 R600/SI: Make argument loads invariant
llvm-svn: 214101
2014-07-28 17:31:39 +00:00
Matt Arsenault 9a1d12dc88 Update comment
llvm-svn: 214100
2014-07-28 17:31:37 +00:00
Rafael Espindola 2172f51e4e Test the mcpu option.
llvm-svn: 214087
2014-07-28 14:44:33 +00:00
Robert Khasanov 595683da00 [SKX] Enabling mask logic instructions: encoding, lowering
Instructions: KAND{BWDQ}, KANDN{BWDQ}, KOR{BWDQ}, KXOR{BWDQ}, KXNOR{BWDQ}

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>

llvm-svn: 214081
2014-07-28 13:46:45 +00:00
Dan Liew 544f45b39f Emit a warning if llvm_map_components_to_libraries() is used noting that its
use is deprecated in favour of llvm_map_components_to_libnames()

Although message(DEPRECATION "msg") would probably be a better fit this
does nothing if CMAKE_ERROR_DEPRECATED and CMAKE_WARNING_DEPRECATED are
both off, which is the default.

llvm-svn: 214078
2014-07-28 13:36:50 +00:00
Dan Liew 9745661dcb Document the new LLVM CMake interface for building against LLVM
libraries. With many contributions from Brad King.

llvm-svn: 214077
2014-07-28 13:36:37 +00:00
Dan Liew bafdcba1f1 Fixed sphinx warning.
llvm-svn: 214076
2014-07-28 13:33:51 +00:00
Ulrich Weigand 085a10c49e [PowerPC] Add testcase forgotten in the 214072 commit.
llvm-svn: 214073
2014-07-28 13:10:25 +00:00
Ulrich Weigand 90a5de88a8 [PowerPC] Support ELFv1/ELFv2 ABI selection via features
While LLVM now supports both ELFv1 and ELFv2 ABIs, their use is currently
hard-coded via the target triple: powerpc64-linux is always ELFv1, while
powerpc64le-linux is always ELFv2.

These are of course the most common scenarios, but in principle it is
possible to support the ELFv2 ABI on big-endian or the ELFv1 ABI on
little-endian systems (and GCC does support that), and there are some
special use cases for that (e.g. certain Linux kernel versions could
only be built using ELFv1 on LE).

This patch implements the LLVM side of supporting this.  As precedent
on other platforms suggests, ABI options are passed to the back-end as
features.  Thus, this patch implements two features "elfv1" and "elfv2"
that select the desired ABI if present.  (If not, the LLVM uses the
same default rules as now.)

llvm-svn: 214072
2014-07-28 13:09:28 +00:00
Rafael Espindola 852bad0a95 Start adding some tests for the gold plugin.
These are only used when the 'ld' in the path is gold and the plugin has
been built, but it is already a start to make sure we don't regress features
that cannot be tested with llvm-lto.

llvm-svn: 214058
2014-07-27 23:11:06 +00:00
Saleem Abdulrasool 8988c2a524 ARM: correct handling of features in arch_extension
The subtarget information is the ultimate source of truth for the feature set
that is enabled at this point.  We would previously not propagate the feature
information to the subtarget.  While this worked for the most part (features
would be enabled/disabled as requested), if another operation that changed the
feature bits was encountered (such as a mode switch via a .arm or .thumb
directive), we would end up resetting the behaviour of the architectural
extensions.

Handling this properly requires a slightly more complicated handling.  We need
to check if the feature is now being toggled.  If so, only then do we toggle the
features.  In return, we no longer have to calculate the feature bits ourselves.

The test changes are mostly to the diagnosis, which is now more uniform (a nice
side effect!).  Add an additional test to ensure that we handle this case
properly.

Thanks to Nico Weber for alerting me to this issue!

llvm-svn: 214057
2014-07-27 19:07:09 +00:00
Saleem Abdulrasool 45cf67b8e9 ARM: convert loop to range based
Convert a loop to use range based iteration.  Rename structure members to help
naming, and make structure definition anonymous.  NFC.

llvm-svn: 214056
2014-07-27 19:07:05 +00:00
Matt Arsenault 6f2a526101 Add alignment value to allowsUnalignedMemoryAccess
Rename to allowsMisalignedMemoryAccess.

On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment,
and don't need to be split into multiple accesses. Vector loads with
an alignment of the element type are not uncommon in OpenCL code.

llvm-svn: 214055
2014-07-27 17:46:40 +00:00
Tim Northover 2c46beb0d1 AArch64: fix conversion of 'J' inline asm constraints.
'J' represents a negative number suitable for an add/sub alias
instruction, but while preparing it to become an int64_t we were
mangling the sign extension. So "i32 -1" became 0xffffffffLL, for
example.

Should fix one half of PR20456.

llvm-svn: 214052
2014-07-27 07:10:29 +00:00
Chandler Carruth 64a7c828cb [x86] Sink a variable only used by asserts into the asserts. Should fix
some -Werror bots, sorry for the noise.

llvm-svn: 214043
2014-07-27 01:45:49 +00:00
Chandler Carruth 80c5bfd843 [x86] Add a much more powerful framework for combining x86 shuffle
instructions in the legalized DAG, and leverage it to combine long
sequences of instructions to PSHUFB.

Eventually, the other x86-instruction-specific shuffle combines will
probably all be driven out of this routine. But the real motivation is
to detect after we have fully legalized and optimized a shuffle to the
minimal number of x86 instructions whether it is profitable to replace
the chain with a fully generic PSHUFB instruction even though doing so
requires either a load from a constant pool or tying up a register with
the mask.

While the Intel manuals claim it should be used when it replaces 5 or
more instructions (!!!!) my experience is that it is actually very fast
on modern chips, and so I've gon with a much more aggressive model of
replacing any sequence of 3 or more instructions.

I've also taught it to do some basic canonicalization to special-purpose
instructions which have smaller encodings than their generic
counterparts.

There are still quite a few FIXMEs here, and I've not yet implemented
support for lowering blends with PSHUFB (where its power really shines
due to being able to zero out lanes), but this starts implementing real
PSHUFB support even when using the new, fancy shuffle lowering. =]

llvm-svn: 214042
2014-07-27 01:15:58 +00:00
Chandler Carruth 3ea985b375 [ADT] Add a remarkbly useful little helper routine to ArrayRef for
checking whether the ArrayRef is equal to an explicit list of arguments.

This is particularly easy to implement even without variadic templates
because ArrayRef happens to be homogeneously typed. As a consequence we
can use a "clever" wrapper type and default arguments to capture in
a single method many arguments as well as *how many* arguments the user
specified.

Thanks to Dave Blaikie for helping me pull together this little helper.
Suggestions for how to improve or generalize it are of course welcome.
I'll be using it immediately in my follow-up patch. =D

llvm-svn: 214041
2014-07-27 01:11:19 +00:00
Matt Arsenault 24aa028cfa R600/SI: Fix broken test.
There was no check prefix for the instruction lines.
Match what is emitted though, although I'm pretty sure it is
incorrect.

llvm-svn: 214035
2014-07-26 21:21:42 +00:00
Joey Gouly ec981058aa Fix the failing test 'vector-idiv.ll'.
On Darwin the comment character is ##.

llvm-svn: 214028
2014-07-26 10:58:14 +00:00