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11 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 2e05db2fa0 Align ARM constant pool islands via their basic block. 
Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired
alignment of 4 bytes emitted by ARMAsmPrinter.  Now the same alignment
is set on the basic block.

This is in preparation of supporting ARM constant pool islands with
different alignments.

llvm-svn: 145890
 2011-12-06 01:43:02 +00:00
Evan Cheng 8b2bda09a5 Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 
llvm-svn: 134590
 2011-07-07 03:55:05 +00:00
Dan Gohman 4fee6f3bdd Start function numbering at 0. 
llvm-svn: 101638
 2010-04-17 16:29:15 +00:00
Johnny Chen 8f3004cff2 Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98745
 2010-03-17 17:52:21 +00:00
Bob Wilson 1b4e8cc69c --- Reverse-merging r98637 into '.': 
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640
 2010-03-16 16:59:47 +00:00
Johnny Chen 3d9327bd06 Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637
 2010-03-16 16:36:54 +00:00
Rafael Espindola dcb03f0f6b Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF. 
Original patch by Sandeep Patel and updated by me.

llvm-svn: 94582
 2010-01-26 20:21:43 +00:00
Rafael Espindola a1141dd6ab Fix PR6134. 
We are not emitting alignments on Darwin for "bar". Not sure what is the
correct way to do it.

llvm-svn: 94400
 2010-01-25 02:27:39 +00:00
Evan Cheng 408aa56fb5 Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead. 
llvm-svn: 86294
 2009-11-06 22:24:13 +00:00
Chris Lattner 0ed889521b convert to filecheck syntax and make a lot more aggressive. 
llvm-svn: 84517
 2009-10-19 18:27:56 +00:00
Chris Lattner 7ea0c35ba0 rename test 
llvm-svn: 84515
 2009-10-19 18:18:07 +00:00