Commit Graph

289044 Commits

Author SHA1 Message Date
Matt Arsenault 3ec8803f53 AMDGPU: Don't use undef in a test
llvm-svn: 331795
2018-05-08 18:43:34 +00:00
Stephane Sezer 923d8ab1fa [docs] Fix a typo in KaleidoscopeJIT tutorial
Summary: Just a missing end quote.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46136

llvm-svn: 331794
2018-05-08 18:43:27 +00:00
Matt Arsenault 869cbedc81 AMDGPU: Fix broken dynamic vector indexing for packed types
The intention of this was to multiply by 16, not shift by 16.

llvm-svn: 331793
2018-05-08 18:43:25 +00:00
Matt Arsenault 1f61c0792c DAG: Use correct shift width type
llvm-svn: 331792
2018-05-08 18:43:05 +00:00
Vitaly Buka e21fbe5af2 [sanitizer] Read file to InternalMmapVectorNoCtor
llvm-svn: 331791
2018-05-08 18:35:11 +00:00
Lei Huang 6364288dba [Power9]Legalize and emit code for truncate and convert Quad-Precision to Word
Legalize and emit code for:

  * xscvqpswz : VSX Scalar truncate & Convert Quad-Precision to Signed Word
  * xscvqpuwz : VSX Scalar truncate & Convert Quad-Precision to Unsigned Word

Differential Revision: https://reviews.llvm.org/D45635

llvm-svn: 331790
2018-05-08 18:34:00 +00:00
Vitaly Buka 6b13684d15 [sanitizer] Close fd on ReadFromFile error
llvm-svn: 331789
2018-05-08 18:32:53 +00:00
Changpeng Fang d049da3740 AMDGPU: Use eraseFromParent to delete am instruction when it is no longer needed.
Reviewer: Nicolai

Differential Revision:
  https://reviews.llvm.org/D46438

llvm-svn: 331788
2018-05-08 18:32:35 +00:00
Lei Huang c517e95bc6 [Power9]Legalize and emit code for truncate and convert QP to DW
Legalize and emit code for:

  * xscvqpsdz : VSX Scalar truncate & Convert Quad-Precision to Signed Dword
  * xscvqpudz : VSX Scalar truncate & Convert Quad-Precision to Unsigned Dword

Differential Revision: https://reviews.llvm.org/D45553

llvm-svn: 331787
2018-05-08 18:23:31 +00:00
Zachary Turner b719d1b5b0 [lit] Fix running tests that require 'examples'.
Differential Revision: https://reviews.llvm.org/D46514
Patch by Nikolai Kosjar.

llvm-svn: 331786
2018-05-08 18:20:10 +00:00
Vitaly Buka 7381f26b45 [sanitizer] Fix InternalMmapVectorNoCtor reserve and resize
Remap on reserve of more than the current size.
Don't remap on downsize.

llvm-svn: 331784
2018-05-08 17:59:44 +00:00
Guozhi Wei 1aea95a9ea [CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
CodeGenPrepare pass move extension instructions close to load instructions in different BB, so they can be combined later. But the extension instructions can't move through logical and shift instructions in current implementation. This patch enables this enhancement, so we can eliminate more extension instructions.

Differential Revision: https://reviews.llvm.org/D45537

llvm-svn: 331783
2018-05-08 17:58:32 +00:00
Rui Ueyama d31b54b3c1 Refactor BitcodeCompiler::add(). NFC.
This change makes it explicit that the main loop iterates over a
parallel array, Syms and ObjSyms.

llvm-svn: 331780
2018-05-08 17:50:54 +00:00
Rui Ueyama 2f9fa42892 Fix a bug that a copy of a large vector was created. NFC.
llvm-svn: 331779
2018-05-08 17:50:43 +00:00
Lei Huang c29229a644 [PowerPC] Unify handling for conversion of FP_TO_INT feeding a store
Existing DAG combine only handles conversions for FP_TO_SINT:
"{f32, f64} x { i32, i16 }"

This patch simplifies the code to handle:
"{ FP_TO_SINT, FP_TO_UINT } x { f64, f32 } x { i64, i32, i16, i8 }"

Differential Revision: https://reviews.llvm.org/D46102

llvm-svn: 331778
2018-05-08 17:36:40 +00:00
Greg Clayton 2550ca1e93 Add support to object files for accessing the .debug_types section
In an effort to make the .debug_types patch smaller, breaking out the part that reads the .debug_types from object files into a separate patch

Differential Revision: https://reviews.llvm.org/D46529

llvm-svn: 331777
2018-05-08 17:19:24 +00:00
Alexander Shaposhnikov b07c22b081 [llvm-objcopy] Fix exit code
Set the exit code to 1 if no arguments are specified.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46547

llvm-svn: 331776
2018-05-08 17:12:54 +00:00
Stanislav Mekhanoshin 432936161e [AMDGPU] Added checks for dpp_ctrl value
- Report error for invalid dpp_ctrl values.
- Changed the way it is reported, now the error will be emitted into
  asm and will work with release build as well.
- Added dpp_ctrl value verifier for codegen.
- Added symbolic constants for dpp_ctrl.

Differential Revision: https://reviews.llvm.org/D46565

llvm-svn: 331775
2018-05-08 16:53:02 +00:00
Simon Atanasyan 610e621c99 [ELF][MIPS] Fix test case in attempt to restore Windows build-bot. NFC
llvm-svn: 331774
2018-05-08 16:11:40 +00:00
Simon Pilgrim f5f28aa714 [X86] Tag PCONFIG instruction with WriteSystem scheduler class
llvm-svn: 331773
2018-05-08 15:55:14 +00:00
Simon Atanasyan 0560050668 [ELF][MIPS] Fix calculation of GP relative relocations in case of relocatable output
Some MIPS relocations depend on "gp" value. By default, this value has
0x7ff0 offset from a .got section. But relocatable files produced by a
compiler or a linker might redefine this default value and we have to
use it for a calculation of the relocation result. When we generate EXE
or DSO it's trivial. Generating a relocatable output is more difficult
case because the linker does calculate relocations in this case and
cannot store individual "gp" values used by each input object file.
As a workaround we add the "gp" value to the relocation addend.

This fixes https://llvm.org/pr31149

Differential revision: https://reviews.llvm.org/D45972

llvm-svn: 331772
2018-05-08 15:34:06 +00:00
Stefan Maksimovic c7113cc9e4 [mips][msa] Pattern match the splat.d instruction
Introduced a new pattern for matching splat.d explicitly.

Both splat.d and splati.d can now be generated from the @llvm.mips.splat.d
intrinsic depending on whether an immediate value has been passed.

Differential Revision: https://reviews.llvm.org/D45683

llvm-svn: 331771
2018-05-08 15:12:29 +00:00
Simon Pilgrim 2864b46469 [X86] Split off WriteIMul64 from WriteIMul schedule class (PR36931)
This fixes a couple of BtVer2 missing instructions that weren't been handled in the override.

NOTE: There are still a lot of overrides that still need cleaning up!
llvm-svn: 331770
2018-05-08 14:55:16 +00:00
Simon Pilgrim 739d1a68aa [llvm][x86] SandyBridge/IvyBridge don't support BMI1/BMI2
llvm-svn: 331769
2018-05-08 14:20:25 +00:00
Alexey Bataev 9a70017537 [OPENMP, NVPTX] Fix linkage of the global entries.
The linkage of the global entries must be weak to enable support of
redefinition of the same target regions in multiple compilation units.

llvm-svn: 331768
2018-05-08 14:16:57 +00:00
Simon Pilgrim 2580554333 [X86] Split WriteIDiv into div/idiv 8/16/32/64 implementations (PR36930)
I've created the necessary classes but there are still a lot of overrides that need cleaning up.

NOTE: The Znver1 model was missing some div/idiv variants in the instregex patterns and wasn't setting the resource cycles at all in the overrides.
llvm-svn: 331767
2018-05-08 13:51:45 +00:00
Sven van Haastregt 35b613974e [OpenCL] Factor out language version printing
Generate a printable OpenCL language version number in a single place
and select between the OpenCL C or OpenCL C++ version accordingly.

Differential Revision: https://reviews.llvm.org/D46382

llvm-svn: 331766
2018-05-08 13:47:43 +00:00
Simon Pilgrim 4283924e08 [llvm-mca][x86] Add div/idiv, mul/imul and inc/dec/neg/nop instruction tests
llvm-svn: 331765
2018-05-08 13:30:58 +00:00
Jonas Devlieghere e6effb199c [test] Re-enable TestUnicodeSymbols
Re-enable TestUnicodeSymbols now that we use the in-tree dsymutil. This
was disabled because the hashing of unicode symbols was out of sync
between llvm (dsymutil) and lldb.

llvm-svn: 331764
2018-05-08 13:28:34 +00:00
Roman Lebedev 1215251151 [clang-tidy] Profile is a per-AST (per-TU) data.
Summary:
As discussed in D45931, currently, profiling output of clang-tidy is somewhat not great.
It outputs one profile at the end of the execution, and that profile contains the data
from the last TU that was processed. So if the tool run on multiple TU's, the data is
not accumulated, it is simply discarded.

It would be nice to improve this.

This differential is the first step - make this profiling info per-TU,
and output it after the tool has finished processing each TU.
In particular, when `ClangTidyASTConsumer` destructor runs.

Next step will be to add a CSV (JSON?) printer to store said profiles under user-specified directory prefix.

Reviewers: alexfh, sbenza

Reviewed By: alexfh

Subscribers: Eugene.Zelenko, mgorny, xazax.hun, mgrang, klimek, cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D46504

llvm-svn: 331763
2018-05-08 13:14:21 +00:00
Aleksei Sidorin 8f266dbbdc [ASTImporter] Properly import SourceLocations of Attrs
Patch by Rafael Stahl!

Differential Revision: https://reviews.llvm.org/D46115

llvm-svn: 331762
2018-05-08 12:45:21 +00:00
Martin Storsjo 7562e34acc [llvm-rc] Update a stale comment. NFC.
The tokenizer handles comments since SVN r315207.

llvm-svn: 331761
2018-05-08 12:33:54 +00:00
Simon Pilgrim b0a3be04ec [X86] Add vector masked load/store scheduler classes (PR32857)
Split off from existing vector load/store classes to remove InstRW overrides.

llvm-svn: 331760
2018-05-08 12:17:55 +00:00
Gabor Horvath 3cd0aa3b7e [ASTMatchers] Overload isConstexpr for ifStmts
Differential Revision: https://reviews.llvm.org/D46233

llvm-svn: 331759
2018-05-08 11:53:32 +00:00
Sander de Smalen d8e76494fc [AArch64][SVE] Asm: Support for LD1R load-and-replicate scalar instructions.
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D46251

llvm-svn: 331758
2018-05-08 10:46:55 +00:00
Simon Pilgrim 210286ed8f [X86] Add SchedWriteFTest/SchedWriteVecTest TEST scheduler classes
Split off from SchedWriteVecLogic to remove InstRW overrides.

llvm-svn: 331757
2018-05-08 10:28:03 +00:00
Simon Dardis e0982cca98 [mips] Mark various memory instructions as being in microMIPS (NFC)
Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46388

llvm-svn: 331756
2018-05-08 10:16:21 +00:00
Sander de Smalen 20eede7093 [AArch64] Disallow vector operand if FPR128 Q register is required.
Patch https://reviews.llvm.org/D41445 changed the behaviour of 'isReg()'
to also return 'true' if the parsed register operand is a vector
register. Code in the AsmMatcher checks if a register is a subclass of the
expected register class. However, even though both parsed registers map
to the same physical register, the 'v' register is of kind 'NeonVector',
where 'q' is of type Scalar, where isSubclass() does not distinguish
between the two cases.

The solution is to use an AsmOperand instead of the register directly,
and use the PredicateMethod to distinguish the two operands.

This fixes for example:
  ldr v0, [x0]    // 'v0' is an invalid operand for this instruction
  ldr q0, [x0]    // valid

Reviewers: aemerson, Gerolf, SjoerdMeijer, javed.absar

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D46310

llvm-svn: 331755
2018-05-08 10:01:04 +00:00
Simon Dardis 7563624fcb [mips] Correct clo/clz predicates
Reviewers: smaksimovic, abeserminji, atanasyan

Differential Revision: https://reviews.llvm.org/D46125

llvm-svn: 331754
2018-05-08 09:50:37 +00:00
Simon Pilgrim 3366dcfe1f Fix 'not all control paths return a value' MSVC warnings. NFCI.
llvm-svn: 331753
2018-05-08 09:40:32 +00:00
Peter Smith 24d906630b [LLD][ELF][AArch64] Increase test coverage of AArch64ErrataFix [NFC]
In the recognise test convert some ST1 multiple structure to ST1 single
structure to test the isST1SingleOpcode() function.

Differential Revision: https://reviews.llvm.org/D46263

llvm-svn: 331752
2018-05-08 09:36:24 +00:00
Peter Smith f6ed9dd41d [LLD][ELF] Add test cases to improve code coverage of Thunks [NFC]
Add two test cases to improve the code coverage of ThunkSection creation
when there are no existing ThunkSections in range. There are two test
cases, one where a new section can be created and another to trigger the
"InputSection too large for range extension thunk" error message. A recent
code coverage report showed that this section of code wasn't covered by a
test case.

Differential Revision: https://reviews.llvm.org/D46261

llvm-svn: 331751
2018-05-08 09:26:06 +00:00
Krasimir Georgiev f2ca41dbba [clang-format] Add raw string formatting to release notes
Reviewers: hans

Reviewed By: hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D46572

llvm-svn: 331750
2018-05-08 09:25:12 +00:00
Jeremy Morse 4f799c027e [X86] Mark all byval parameters as aliased
This is a fix for PR30290: by marking all byval stack slots as being aliased,
the instruction scheduler is more conservative about rescheduling memory
accesses to such stack slots as an LLVM Value* might alias it. This fixes
errors such as in the patched test case, where reads and writes to a data
structure are illegally mixed.

This could be fixed better in the future with better analysis for the
instruction scheduler to know what Values alias what stack slots.

Differential Revision: https://reviews.llvm.org/D45022

llvm-svn: 331749
2018-05-08 09:18:01 +00:00
Alexander Ivchenko c47f799289 [X86][CET] Shadow stack fix for setjmp/longjmp
This patch adds a shadow stack fix when compiling
setjmp/longjmp with the shadow stack enabled. This
allows setjmp/longjmp to work correctly with CET.

Patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D46181

llvm-svn: 331748
2018-05-08 09:04:07 +00:00
Martin Storsjo 4021cee996 [llvm-rc] Don't strictly require quotes around external file names
Regardless of what docs may say, existing resource files in the
wild can use this syntax.

Rename a file used in an existing test, to make it usable for unquoted
paths.

Differential Revision: https://reviews.llvm.org/D46511

llvm-svn: 331747
2018-05-08 08:47:37 +00:00
Hans Wennborg 5e6e6cc721 Object: Find terminator correctly when reading long filenames in GNU archives (PR37244)
The code was previously relying on there being a null terminator
somewhere in (or after) the string table, something made less likely by
r330786.

Differential Revision: https://reviews.llvm.org/D46527

llvm-svn: 331746
2018-05-08 08:22:58 +00:00
Eric Fiselier 98a1cab694 [C++2a] Implement operator<=>: Fix another bug in the code gen tests.
Sorry for the failures. I'm quite new at writing code gen tests, and
I'm not sure the best way to make them portable.

llvm-svn: 331745
2018-05-08 07:56:05 +00:00
Tobias Grosser 1c88d41020 [test] Replace undef with true/false to make test case less fragile
This test case does not require undef to be present in branch
conditions. Replace these undef values with true/false values to clarify
the control-flow required to reach the loop under testing.

llvm-svn: 331744
2018-05-08 07:24:05 +00:00
Gabor Buella 5e52fa9035 [x86] Introduce the encl[u|s|v] intrinsics
Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D46435

llvm-svn: 331743
2018-05-08 07:12:34 +00:00