c95bd8d88f
Stackmaps are used for OSR exits, which is a custom kind of unwinding. Hence, they
...
should not be marked nounwind.
Marking them nounwind caused crashes in the WebKit FTL JIT, because if we enable
sufficient optimizations, LLVM starts eliding compact_unwind sections (or any unwind
data for that matter), making deoptimization via stackmaps impossible.
This changes the stackmap intrinsic to be may-throw, adds a test for exactly the
sympton that WebKit saw, and fixes TableGen to handle un-attributed intrinsics.
Thanks to atrick and philipreames for reviewing this.
llvm-svn: 201826
2014-02-20 23:57:31 +00:00
4b54f20e80
test_debuginfo.pl: Make failures easier to debug by printing the debugger
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output.
llvm-svn: 201809
2014-02-20 19:55:44 +00:00
e2347df24d
[x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remove HasREPPrefix support from disassembler table generator since its now only used by CodeGenOnly instructions.
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llvm-svn: 201767
2014-02-20 07:59:43 +00:00
9225ba31de
Support GTest for FreeBSD platforms (9.x)
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Patch by Viktor Kutuzov!
llvm-svn: 201683
2014-02-19 15:18:30 +00:00
56f0ed815e
Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
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llvm-svn: 201649
2014-02-19 08:25:02 +00:00
2fb696b214
Put some of the X86 formats in a more logical order.
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llvm-svn: 201645
2014-02-19 06:59:13 +00:00
0d1fd55c13
Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
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llvm-svn: 201641
2014-02-19 05:34:21 +00:00
ea09c595a6
Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.
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This is quiet a bit less confusing now that TargetData was renamed DataLayout.
llvm-svn: 201606
2014-02-18 22:05:46 +00:00
d5fe8ce005
Darwin builds: handle different possible form for SDKROOT.
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Modifying build_llvm to handle SDKROOT being the name of an SDK rather than a
path. This will still work if SDKROOT is a path.
rdar://problem/15162322
llvm-svn: 201560
2014-02-18 11:20:44 +00:00
5ccb61781f
Add an x86 prefix encoding for instructions that would decode to a different instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler.
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llvm-svn: 201538
2014-02-18 00:21:49 +00:00
4c0116cb75
llvmbuild: Exclude disabled targets from LLVMExports.cmake.
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llvm-svn: 201490
2014-02-16 12:14:24 +00:00
7aaa0c2ddb
Remove unused method declaration.
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llvm-svn: 201301
2014-02-13 07:12:40 +00:00
69e245c01d
Remove filtering concept from X86 disassembler table generation. It's no longer necessary.
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llvm-svn: 201299
2014-02-13 07:07:16 +00:00
5b3a6bd370
Remove special case filtering for instructions with lock prefix as they are all marked with isCodeGenOnly already.
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llvm-svn: 201216
2014-02-12 08:09:20 +00:00
ea91f02762
Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear from the disassembler table build without custom filtering code.
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llvm-svn: 201215
2014-02-12 08:02:29 +00:00
0dc73dfdf4
[CMake] Add dependencies to gtest.
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llvm-svn: 201079
2014-02-10 11:27:41 +00:00
2f96171cb0
[CMake] LLVMSupport should be responsible to provide system_libs.
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llvm-svn: 201077
2014-02-10 10:52:19 +00:00
a0869dceea
Recommit r201059 and r201060 with hopefully a fix for its original failure.
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Original commits messages:
Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.
Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.
llvm-svn: 201065
2014-02-10 06:55:41 +00:00
ebdae7c2ff
Revert r201059 and r201060.
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r201059 appears to cause a crash in a bootstrapped build of clang. Craig
isn't available to look at it right now, so I'm reverting it while he
investigates.
llvm-svn: 201064
2014-02-10 05:28:30 +00:00
0a43c2c393
Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.
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llvm-svn: 201060
2014-02-10 01:58:12 +00:00
0d88de8c56
Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.
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llvm-svn: 201059
2014-02-10 00:50:34 +00:00
01e3c64f11
Provide CMake package modules in install tree
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Teach the Makefile build system to generate and install CMake modules
LLVMConfig.cmake and LLVMConfigVersion.cmake so that applications that
build with CMake can use 'find_package(LLVM)' even when LLVM is not
built with CMake. These modules tell such applications about available
LLVM libraries and their dependencies.
Run llvm-config to generate the list of libraries and use the results of
llvm-build to generate the library dependencies. Use sed to perform
substitutions in the LLVMConfig.cmake.in and LLVMConfigVersion.cmake.in
sources that our CMake build system uses.
Teach the Makefile build system to generate the LLVMExports.cmake file
with content similar to that produced by the CMake install(EXPORT)
command. Extend llvm-build with an option to generate the library
dependencies fragment for this file.
Contributed by Brad King.
llvm-svn: 201053
2014-02-09 16:37:02 +00:00
2813e3a46e
Remove unnecessary include.
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llvm-svn: 201041
2014-02-09 07:55:19 +00:00
31afdb8c26
Remove some unnecessary code. The conditions it was checking had already been ruled out by the caller.
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llvm-svn: 201039
2014-02-09 07:13:41 +00:00
958dbe1e34
Improve existing visualizers by:
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- Properly displaying non null terminated StringRef.
- Auto expanding pointer types.
- Displaying real type names for PointerUnions.
- Using "size" and "capacity" across all containers.
- Simplifying code where possible.
llvm-svn: 201004
2014-02-07 22:57:20 +00:00
1dc1034218
LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack
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According to the AAPCS, when a CPRC is allocated to the stack, all other
VFP registers should be marked as unavailable.
I have also modified the rules for allocating non-CPRCs to the stack, to make
it more explicit that all GPRs must be made unavailable. I cannot think of a
case where the old version would produce incorrect answers, so there is no test
for this.
llvm-svn: 200970
2014-02-07 11:19:53 +00:00
f1aab4502e
Delete all of the CodeGenInstructions from CodeGenTarget destructor.
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llvm-svn: 200906
2014-02-06 06:27:59 +00:00
bc9486bea0
Shrink the size of CodeGenInstruction a little bit by using bitfields. 32 bools seemed excessive.
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llvm-svn: 200829
2014-02-05 09:10:40 +00:00
4c6129af32
Get rid of a vector copy by just making a pointer out of the reference returned by getInstructionsByEnumValue instead of assigning it to a new vector.
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llvm-svn: 200828
2014-02-05 07:56:49 +00:00
65efcb4685
Fix a vector that was passed by value instead of reference.
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llvm-svn: 200827
2014-02-05 07:27:49 +00:00
1129d452cd
Fix a doxygen comment referencing the wrong method name.
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llvm-svn: 200825
2014-02-05 07:21:07 +00:00
7ca1d18055
Add CheckChildInteger to ISelMatcher operations. Removes nearly 2000 bytes from X86 matcher table.
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llvm-svn: 200821
2014-02-05 05:44:28 +00:00
d8dd194f03
TableGen/X86RecognizableInstr.h: Prune out-of-date "@param isSSE". [-Wdocumentation]
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llvm-svn: 200628
2014-02-02 10:53:36 +00:00
fa6298a162
Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 meaning no 0x66 prefix in any mode. Rename Opsize16->OpSize32 and OpSize->OpSize16. The classes now refer to their operand size rather than the mode in which they need a 0x66 prefix. Hopefully can merge REX_W into this as OpSize64.
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llvm-svn: 200626
2014-02-02 09:25:09 +00:00
8e92e85ac7
Simplify some code since VEX and EVEX instructions never have HasOpSizePrefix.
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llvm-svn: 200625
2014-02-02 07:46:05 +00:00
d402df3ce8
Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field in TSFlags.
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llvm-svn: 200624
2014-02-02 07:08:01 +00:00
10243c8907
Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters.
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llvm-svn: 200522
2014-01-31 08:47:06 +00:00
ec68866f55
Move REP out of the Prefix field of the X86 format. Give it its own bit. It had special handling anyway and this enables a future patch.
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llvm-svn: 200520
2014-01-31 07:00:55 +00:00
9b37d35051
Comment out unused macro because of warning
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Modern compilers (Clang 3.4, GCC 4.8) warn on variadic macros being
introduced in C99, which produces a huge number of useless diagnostics
since this macro is unused in the whole project.
llvm-svn: 200479
2014-01-30 18:55:47 +00:00
bdf33ca08d
Couple minor formatting fixes to the XXXGenDAGISel.inc files.
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llvm-svn: 200459
2014-01-30 06:42:52 +00:00
0d16d2dc31
Delete the Matchers stored in the SmallVectors in SwitchOpcodeMatcher/SwitchTypeMatcher.
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llvm-svn: 200377
2014-01-29 07:06:07 +00:00
3fa98a65e9
Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()
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llvm-svn: 200349
2014-01-28 23:13:18 +00:00
e6c13e4abd
Change MCStreamer EmitInstruction interface to take subtarget info
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llvm-svn: 200345
2014-01-28 23:12:42 +00:00
5c65e7f345
Use the proper SDK when building iOS sim builds of LLVM and/or Mac OS X builds.
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llvm-svn: 200335
2014-01-28 19:57:18 +00:00
74169dcf45
Improve handling of EnforceSmallerThan. Remove all types that are smaller from the larger set not just the smallest type from the smaller set. Ensure 'smaller' vectors have the same or fewer total bits. Similar for 'larger' vectors.
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llvm-svn: 200287
2014-01-28 04:49:01 +00:00
6e1faaf886
Don't use EnforceSmallerThan for EnforceVectorSubVectorTypeIs. EnforceSmallerThan doesn't handle vectors quite right and should really enforce that vectors have the same number of elements. Add explicit checks for vector element count differing in EnforceVectorSubVectorTypeIs instead. This removes some unnecessary type checks in X86GenDAGISel.inc.
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llvm-svn: 200091
2014-01-25 17:40:33 +00:00
336e1f1179
Fix typo in commment tyep->type.
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llvm-svn: 200089
2014-01-25 17:34:23 +00:00
5f730e8ef1
Use isConcrete and getConcrete instead of using TypeVec directly.
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llvm-svn: 200071
2014-01-25 05:33:48 +00:00
6dbcb945a2
Fix EnforceSmallerThan to check !hasVectorTypes on the other type instead of this type to force this type to be scalar.
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llvm-svn: 200070
2014-01-25 05:17:38 +00:00
3f9978e65a
Remove TGValueTypes.cpp from CMakeLists.txt which I forgot to do in r200036.
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llvm-svn: 200037
2014-01-24 20:51:32 +00:00
8561de90d7
Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before).
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llvm-svn: 200036
2014-01-24 20:50:47 +00:00
cb40291100
Fix known typos
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Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.
llvm-svn: 200018
2014-01-24 17:20:08 +00:00
9bbf7ca13d
]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
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llvm-svn: 199806
2014-01-22 15:08:36 +00:00
b33c2ef215
[x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
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llvm-svn: 199804
2014-01-22 15:08:21 +00:00
2ef8d9c05c
[x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
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llvm-svn: 199803
2014-01-22 15:08:08 +00:00
a2c60197bf
Use ArrayRef to simplify some code.
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llvm-svn: 199712
2014-01-21 07:20:05 +00:00
caaa2850c0
[x86] Fix disassembly of MOV16ao16 et al.
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The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.
llvm-svn: 199654
2014-01-20 12:02:53 +00:00
35da3d190a
Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
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llvm-svn: 199364
2014-01-16 07:36:58 +00:00
317e2c499d
replace LeakSanitizerIsTurnedOffForTheCurrentProcess with __lsan_is_turned_off, but this time hide it under __has_feature(address_sanitizer); also include <sanitizer/lsan_interface.h>
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llvm-svn: 199303
2014-01-15 07:59:37 +00:00
b7c7f38918
Simplify x86 disassembler table handling of when to use TYPE_Rv/TYPE_R16/TYPE_R32 now that HasOpSizePrefix only means 16-bit instructions.
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llvm-svn: 199295
2014-01-15 05:02:02 +00:00
ad07d08c8d
Add the lld root to llvm-lit, so llvm-lit can be used
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to run lld tests individually.
llvm-svn: 199264
2014-01-14 22:52:24 +00:00
06234ec147
Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
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promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).
Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.
llvm-svn: 199252
2014-01-14 19:56:36 +00:00
ad60708a72
Remove stray comma in enum to satisfy -Wpedantic.
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llvm-svn: 199194
2014-01-14 08:07:10 +00:00
ae11aed9d7
Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
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This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.
llvm-svn: 199193
2014-01-14 07:41:20 +00:00
b19c9dc1a1
AVX-512: Embedded Rounding Control - encoding and printing
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Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.
llvm-svn: 199102
2014-01-13 12:55:03 +00:00
749971901a
lit: Provide source locations in cfg files with older Python versions
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This commit prospectively brings the benefits of r198766 to older supported
Python versions (2.5+).
Tested with Python 2.6, 2.7, 3.1 and 3.3 (!)
llvm-svn: 199009
2014-01-11 14:34:18 +00:00
f0a245944e
lit: execfile() isn't present in Python 3.3
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On the other hand, exec(compile()) doesn't work in older Python versions in the
2.x series.
This commit introduces exec(compile()) with a fallback to plain exec(). That'll
hopefully hit the sweet spot in terms of version support.
Followup to r198766 which added enhanced source locations for lit cfg parsing.
llvm-svn: 199006
2014-01-11 13:27:28 +00:00
9dc6df5744
Constant propagate MachineInstrClassName.
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llvm-svn: 198969
2014-01-10 22:59:49 +00:00
f581314932
All backends use MC now.
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llvm-svn: 198959
2014-01-10 21:49:27 +00:00
1f5cf85fd4
Sink add_llvm_library(gtest_main) to UnitTestMain/CMakeLists.txt.
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llvm-svn: 198933
2014-01-10 11:02:26 +00:00
a6afef7a51
reapply r198858: Disable LeakSanitizer in TableGen binaries, see PR18325; this time LeakSanitizerIsTurnedOffForTheCurrentProcess is used instead of __lsan_is_turned_off
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llvm-svn: 198922
2014-01-10 08:05:42 +00:00
2a2a354ee9
Revert "Disable LeakSanitizer in TableGen binaries, see PR18325"
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To declare or define reserved identifers is undefined behaviour in standard
C++. This needs to be addressed in compiler-rt before it can be used in LLVM.
See the list discussion for details.
This reverts commit r198858.
llvm-svn: 198884
2014-01-09 19:40:55 +00:00
bc60254543
Disable LeakSanitizer in TableGen binaries, see PR18325
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llvm-svn: 198858
2014-01-09 09:26:26 +00:00
9e628916f6
lit: Provide file location in cfg error messages
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Python doesn't do a good job at diagnosing string exec() so use execfile()
where available.
This should be a timesaver when trying to get to the bottom of build bot
failures.
Before:
File "llvm/utils/lit/lit/TestingConfig.py", line 93, in load_from_path
exec("exec data in cfg_globals")
File "<string>", line 1, in <module>
File "<string>", line 194, in <module>
NameError: name 'typo' is not defined
After:
File "llvm/utils/lit/lit/TestingConfig.py", line 95, in load_from_path
execfile(path, cfg_globals)
File "clang/test/lit.cfg", line 194, in <module>
typo
^~~~
NameError: name 'typo' is not defined
llvm-svn: 198766
2014-01-08 14:20:59 +00:00
32da3c8f3b
[x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
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It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.
Hm, perhaps we do need an AdSize16 bit after all?
llvm-svn: 198759
2014-01-08 12:58:24 +00:00
2ea87dad77
The rest of r198588. Remove SegOvrBits from X86 TSFlags since they weren't being used.
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llvm-svn: 198589
2014-01-06 06:57:27 +00:00
d9e1669d1c
Use patterns to remove some duplicate instructions.
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llvm-svn: 198550
2014-01-05 06:55:48 +00:00
34db6523f3
Fix encoding for PUSH64i16. Add In64BitMode Predicate. Remove disassembler hack.
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llvm-svn: 198547
2014-01-05 05:46:38 +00:00
c0107977d9
Remove no longer needed x86 disassembler hack.
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llvm-svn: 198546
2014-01-05 05:10:07 +00:00
0550ce7ac1
Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
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llvm-svn: 198545
2014-01-05 04:55:55 +00:00
5165cf78b0
Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode and remove disassmbler table emitter hack.
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llvm-svn: 198544
2014-01-05 04:32:42 +00:00
3484fc2161
Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions.
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llvm-svn: 198543
2014-01-05 04:17:28 +00:00
5999d47538
Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.
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llvm-svn: 198530
2014-01-05 01:35:51 +00:00
7d4e01cdcb
Don't use PrintFatalError(which calls exit) for 'Primary decode conflict'. Just skip emitting the table. This way the main function will delete the output file instead of it remaining empty and confusing dependency checks if build is invoked a second time.
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llvm-svn: 198529
2014-01-05 01:34:12 +00:00
bc281ad8c1
Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. Remove disassembler hack.
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llvm-svn: 198515
2014-01-04 22:29:41 +00:00
1da8582322
Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.
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llvm-svn: 198475
2014-01-04 05:09:27 +00:00
81e5cd9e73
FileCheck: Print a nice error message for missing closing ']' in regex vars.
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llvm-svn: 198449
2014-01-03 21:49:09 +00:00
49f1c2a733
[TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResults
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A ValueType in a pattern dag is a type cast, and GetNumNodeResults should
handle it (the type cast has only one result).
This comes up, for example, during the type checking of pattern fragments, for
example, AArch64's Neon_combine_2d fragment is:
dag Operands = (ops node:$Rm, node:$Rn);
dag Fragment = (v2f64 (concat_vectors (v1f64 node:$Rm), (v1f64 node:$Rn)));
llvm-svn: 198347
2014-01-02 20:47:05 +00:00
66c20f344e
Mark REX64_PREFIX as In64BitMode, remove hack from X86RecognizableInstr.
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llvm-svn: 198336
2014-01-02 19:12:10 +00:00
fae226c67e
Remove unused HasFROperands field from disassembler.
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llvm-svn: 198332
2014-01-02 18:44:21 +00:00
eabdbcb8a9
Mark PUSHFS64/PUSHGS64/POPFS64/POPGS64 as In64BitMode and remove the hack from the disassembler table builder.
...
llvm-svn: 198327
2014-01-02 18:20:48 +00:00
a941d2b08e
Remove unnecessary stirng comparison from disassembler.
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llvm-svn: 198325
2014-01-02 17:41:40 +00:00
9dd48c8ed4
Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler table builder doesn't need to string match them to exclude them.
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llvm-svn: 198323
2014-01-02 17:28:14 +00:00
83b7e24b76
Remove unused function argument.
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llvm-svn: 198291
2014-01-02 03:58:45 +00:00
3321c99a06
Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables.
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llvm-svn: 198284
2014-01-01 21:52:57 +00:00
9155118602
Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits.
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llvm-svn: 198278
2014-01-01 15:29:32 +00:00
de3f751baf
AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp
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Printing rounding control.
Enncoding for EVEX_RC (rounding control).
llvm-svn: 198277
2014-01-01 15:12:34 +00:00
623b0d64b3
Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
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llvm-svn: 198276
2014-01-01 14:22:37 +00:00
e98c8cb9f0
Revert r198238 and add FP disassembler tests. It didn't work and I didn't realized we had no FP disassembler test cases.
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llvm-svn: 198265
2013-12-31 17:21:44 +00:00
0e21bca6dd
Remove special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
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llvm-svn: 198238
2013-12-30 19:16:48 +00:00
Filip Pizlo