2415a497b5
[X86] AVX512: Add writemask variants for vperm*2*
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This includes assembler and codegen support (see the new tests in
avx512-encodings.s and avx512-shuffle.ll).
<rdar://problem/17492620>
llvm-svn: 212221
2014-07-02 21:25:54 +00:00
299cf511c4
AVX-512: optimized a shuffle pattern to VINSERTI64x4.
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Added intrinsics for VPERMT2PS/PD/D/Q instructions.
llvm-svn: 207513
2014-04-29 09:09:15 +00:00
a30e437659
AVX-512: Added intrinsic for cvtph2ps.
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Added VPTESTNM instruction.
Added a pattern to vselect (lit tests will follow).
llvm-svn: 200823
2014-02-05 07:05:03 +00:00
a5d38a39a0
AVX-512: added VPERM2D VPERM2Q VPERM2PS VPERM2PD instructions,
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they give better sequences than VPERMI
llvm-svn: 199893
2014-01-23 14:27:26 +00:00
cf08809813
AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC.
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I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).
llvm-svn: 197041
2013-12-11 14:31:04 +00:00
e1f9bf054f
AVX-512: Concat 4 128-bit vectors in one 512-bit vector.
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llvm-svn: 195229
2013-11-20 09:10:40 +00:00
0a74b7da35
AVX-512: Handled extractelement from mask vector;
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Added VMOSHDUP/VMOVSLDUP shuffle instructions.
llvm-svn: 194691
2013-11-14 11:29:27 +00:00
462a2d235b
AVX-512: fixed shuffle lowering
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in case of BLEND and added VSHUFPS patterns.
llvm-svn: 192055
2013-10-06 06:11:18 +00:00
0a2b6290f1
AVX-512: Added shuffle instructions -
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VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
single and double forms.
llvm-svn: 189215
2013-08-26 12:45:35 +00:00
f8f478b19d
AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors
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llvm-svn: 189189
2013-08-25 12:54:30 +00:00
8c929627d9
Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64.
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llvm-svn: 188534
2013-08-16 06:07:34 +00:00
8dbc7e9d35
Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.
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llvm-svn: 188454
2013-08-15 08:38:25 +00:00
2ffd06528d
Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask.
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llvm-svn: 188449
2013-08-15 07:30:51 +00:00
cf5b1458e6
AVX-512: Added VPERM* instructons and MOV* zmm-to-zmm instructions.
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Added a test for shuffles using VPERM.
llvm-svn: 188147
2013-08-11 07:55:09 +00:00
Adam Nemet