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Author SHA1 Message Date
Chris Lattner 08297ad15d this is done, tested by CodeGen/ARM/iabs.ll 
llvm-svn: 95609
 2010-02-08 23:48:10 +00:00
Jim Grosbach 267430f74d Fix PR5694. The CMN instructions set the flags differently from CMP, so they 
cannot be directly interchanged for comparisons against negated values.
Disable the CMN instructions for the time being.

llvm-svn: 94119
 2010-01-22 00:08:13 +00:00
Jim Grosbach d7cf55cd0e Use Unified Assembly Syntax for the ARM backend. 
llvm-svn: 86494
 2009-11-09 00:11:35 +00:00
Evan Cheng a8e8a7c976 Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic. 
llvm-svn: 86330
 2009-11-07 04:04:34 +00:00
Evan Cheng 115cfc07d5 These are done / no longer care. 
llvm-svn: 85798
 2009-11-02 07:58:25 +00:00
Evan Cheng f6f1b37f9f Add an entry. 
llvm-svn: 85797
 2009-11-02 07:51:19 +00:00
Bob Wilson c7415bf536 Add a note about Robert Muth's alternate jump table implementation. 
llvm-svn: 85624
 2009-10-30 22:22:46 +00:00
Evan Cheng 83e0d481ae Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo 
instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.

llvm-svn: 82982
 2009-09-28 09:14:39 +00:00
Chris Lattner c667b60b93 add a random codegen deficiency. 
llvm-svn: 77598
 2009-07-30 16:08:58 +00:00
Evan Cheng c26c76ec1d Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod. 
llvm-svn: 76995
 2009-07-24 19:31:03 +00:00
Evan Cheng c7a243dfdd Add an entry. 
llvm-svn: 76711
 2009-07-22 00:58:27 +00:00
Evan Cheng b23b50d54d Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
 2009-06-29 07:51:04 +00:00
Evan Cheng e2c4d35f3e Add a note about commuting conditional move. 
llvm-svn: 74241
 2009-06-26 00:28:48 +00:00
Evan Cheng cf661fc12a These are done / no longer applicable. 
llvm-svn: 74239
 2009-06-26 00:25:27 +00:00
Bob Wilson 2e076c4e02 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919
 2009-06-22 23:27:02 +00:00
Chris Lattner 57662f3882 several entries got significantly better, though they still aren't done. 
llvm-svn: 44382
 2007-11-27 22:41:52 +00:00
Chris Lattner f3f4ad9dd6 implement a trivial readme entry. 
llvm-svn: 44380
 2007-11-27 22:36:16 +00:00
Chris Lattner 5d979d57ae Add an easy microoptimization I noticed. 
llvm-svn: 43164
 2007-10-19 03:29:26 +00:00
Chris Lattner 6777b72659 Add some notes about better flag handling. 
llvm-svn: 41808
 2007-09-10 21:43:18 +00:00
Evan Cheng effa7467b6 Update. 
llvm-svn: 38513
 2007-07-10 21:49:47 +00:00
Dale Johannesen 8dd36a51fc Remove item: thumb padding in constant islands 
llvm-svn: 36586
 2007-04-30 00:32:06 +00:00
Chris Lattner 3d3f22766a add a crazy idea 
llvm-svn: 36273
 2007-04-20 20:18:43 +00:00
Chris Lattner 2509d7547d add a note 
llvm-svn: 36203
 2007-04-17 18:03:00 +00:00
Evan Cheng cba9538499 Updated. 
llvm-svn: 35229
 2007-03-20 22:32:39 +00:00
Evan Cheng 09663aeac7 Minor stuff. 
llvm-svn: 35049
 2007-03-09 19:46:06 +00:00
Evan Cheng 31ef0ab7cf Add comments about LSR / ARM. 
llvm-svn: 35048
 2007-03-09 19:35:33 +00:00
Evan Cheng 603f3094eb Unfinished work and ideas related to register scavenger. 
llvm-svn: 35047
 2007-03-09 19:34:51 +00:00
Dale Johannesen 368faf9acd apply comments from review of last patch 
llvm-svn: 35045
 2007-03-09 19:18:59 +00:00
Dale Johannesen af0cff2671 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.

llvm-svn: 35044
 2007-03-09 17:58:17 +00:00
Dale Johannesen 440995bd9a Add intelligence about where to break large blocks. 
llvm-svn: 34755
 2007-02-28 18:41:23 +00:00
Dale Johannesen c2f3d015e0 cosmetic changes from review of last patch. obvious 
llvm-svn: 34598
 2007-02-25 18:31:31 +00:00
Dale Johannesen 01ee5750f4 Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this 
from README.
When no water available, use end of block if in range.  (More to do here.)

llvm-svn: 34563
 2007-02-25 00:47:03 +00:00
Dale Johannesen e18b13b213 rewrite of constant islands 
llvm-svn: 34523
 2007-02-23 05:02:36 +00:00
Chris Lattner 2d5b4ac38f add a note 
llvm-svn: 33778
 2007-02-02 04:36:46 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple. 
llvm-svn: 33353
 2007-01-19 07:51:42 +00:00
Rafael Espindola eb3e8d75df add note 
llvm-svn: 32452
 2006-12-11 23:56:10 +00:00
Rafael Espindola 418c8e69bb add FSTD and FSTS 
llvm-svn: 30996
 2006-10-17 13:36:07 +00:00
Rafael Espindola 677ee8390d implement LDRB, LDRSB, LDRH and LDRSH 
llvm-svn: 30976
 2006-10-16 17:17:22 +00:00
Rafael Espindola 595dc4c884 implement smull and umull 
llvm-svn: 30975
 2006-10-16 16:33:29 +00:00
Rafael Espindola c154dacb2f add a note 
llvm-svn: 30828
 2006-10-09 14:18:33 +00:00
Rafael Espindola 58c368bc4f implement FLDD 
llvm-svn: 30802
 2006-10-07 14:03:39 +00:00
Rafael Espindola 68d238801c Implement floating point constants 
llvm-svn: 30704
 2006-10-03 17:27:58 +00:00
Rafael Espindola 72d4c070c0 add a note 
llvm-svn: 30581
 2006-09-22 11:36:17 +00:00
Rafael Espindola ea500426d6 add a README.txt 
llvm-svn: 29814
 2006-08-22 12:22:46 +00:00