Commit Graph

341464 Commits

Author SHA1 Message Date
Simon Pilgrim 3dd688a9ee [DAG] OptLevelChanger - fix uninitialized variable analyzer warning (PR44471)
Ensure that OptLevelChanger::SavedFastISel is initialized in the constructor.

This should be NFC - as the equivalent 'same opt level' early-out is used in the destructor as well, so SavedFastISel is only actually referenced in the general case.

Differential Revision: https://reviews.llvm.org/D73875
2020-02-04 10:54:33 +00:00
Raphael Isemann bf4d73e6f3 [lldb][NFC] Use correct Decl typedef in ClangASTSource
This is iterating over a DeclContext and not a TagDecl (even
though both iterators are the same underlying type).
2020-02-04 11:53:23 +01:00
Kadir Cetinkaya d2b6ac6ccd
Revert "[X86] Use X86ISD::SUB instead of X86ISD::CMP in some places."
This reverts commit 8413116bf1.

this seems to be causing crashes while compiling ncurses.
```
$ ./bin/llc bugpoint-reduced-simplified.ll
LLVM ERROR: Cannot emit physreg copy instruction
```

Here are the crashers: https://gist.github.com/kadircet/918f5bb97a2afe048cb875490edba46e

executing with an llc compiled at 904d54de9b works fine.
2020-02-04 11:22:53 +01:00
David Green 362d00e051 [ARM][VecReduce] Force expand vector_reduce_fmin
Under MVE, we do not have any lowering for fminimum, which a
vector_reduce_fmin without NoNan will be expanded into. As with the
other recent patches, force this to expand in the pre-isel pass. Note
that Neon lowering would be OK because the scalar fminimum uses the
vector VMIN instruction, but is probably better to just rely on the
scalar operations, which is what is done here.

Also fixes what appears to be the reversal of INF vs -INF in the
vector_reduce_fmin widening code.
2020-02-04 09:36:59 +00:00
Guillaume Chatelet b8144c0536 [NFC] Encapsulate MemOp logic
Summary:
This patch simply introduces functions instead of directly accessing the fields.
This helps introducing additional check logic. A second patch will add simplifying functions.

Reviewers: courbet

Subscribers: arsenm, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, jsji, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73945
2020-02-04 10:36:26 +01:00
Alex Richardson 1132f87fbf [update_cc_test_checks] Don't attach CHECK lines to function declarations
Previously we were adding the CHECK lines to both definitions and
declarations. Update the JSON AST dump parsing code to skip all
FunctionDecls without an "inner" node (i.e. no body).

Reviewed By: MaskRay, greened
Differential Revision: https://reviews.llvm.org/D73708
2020-02-04 08:41:26 +00:00
Juneyoung Lee dd7d610262 [ValueTracking] Let isGuaranteedToBeUndefOrPoison look into operands of icmp 2020-02-04 17:16:32 +09:00
Juneyoung Lee 36272d5f00 Let isGuaranteedNotToBeUndefOrPoison consider PHINode with constant values 2020-02-04 16:46:54 +09:00
Craig Topper cd14b4a62b [X86] Remove unneeded code that looks for (and (i8 (X86setcc_c))
I don't believe we use this construct anymore so I don't think
we need to look for it.
2020-02-03 23:18:11 -08:00
Thomas Raoux e53bbf1213 [GVN] Add GVNOption to control load-pre more fine-grained.
Adds the global (cl::opt) GVNOption enable-load-in-loop-pre in order
to control whether the optimization will be performed if the load
is part of a loop.

Patch by Hendrik Greving!

Differential Revision: https://reviews.llvm.org/D73804
2020-02-03 23:00:58 -08:00
Craig Topper 4581d97416 [X86] Remove some uncovered and possibly broken code from combineZext.
This code matches (zext (trunc (setcc_carry))) -> (and (setcc_carry), 1)
but the code never checks what type we're truncating too. An and
mask of 1 would only make sense if the trunc was to MVT::i1, but
we didn't check for that.

I believe this code is a leftover from when i1 was a legal type.
2020-02-03 22:59:39 -08:00
River Riddle abe6d1174d [mlir] Emit a fatal error when the assembly format is invalid
This revision makes sure that errors emitted outside of testing are treated as fatal errors. This avoids the current silent failures that occur when the format is invalid.
2020-02-03 22:14:33 -08:00
River Riddle fbba639517 [mlir][ODS] Refactor BuildableType to use $_builder as part of the format
Summary:
Currently BuildableType is assumed to be preceded by a builder. This prevents constructing types that don't have a callable 'get' method with the builder. This revision reworks the format to be like attribute builders, i.e. by accepting $_builder within the format itself.

Differential Revision: https://reviews.llvm.org/D73736
2020-02-03 21:55:34 -08:00
River Riddle 7ef37a5f99 [mlir] Initial support for type constraints in the declarative assembly format
Summary: This revision add support for accepting a few type constraints, e.g. AllTypesMatch, when inferring types for operands and results. This is used to remove the c++ parsers for several additional operations.

Differential Revision: https://reviews.llvm.org/D73735
2020-02-03 21:55:09 -08:00
Craig Topper 8413116bf1 [X86] Use X86ISD::SUB instead of X86ISD::CMP in some places.
Our normal lowering for ISD::SETCC uses X86ISD::SUB to enable
CSE unless the RHS is 0. optimizeCompareInstr called by the peephole
pass can turn subs with unused results into cmps to clean this up.

This commit makes other places that create X86ISD::CMP have the
same behavior.
2020-02-03 21:01:11 -08:00
Jonas Devlieghere 904d54de9b [lldb/Test] Sort substr for TestDataFormatterStdMap.py (2/2) 2020-02-03 20:59:21 -08:00
Jonas Devlieghere 0c16a22a2e [lldb/Test] Fix substr order in asan & ubsan tests 2020-02-03 20:57:57 -08:00
Juneyoung Lee 035eb393f7 Update TTI's getUserCost to return TCC_Free on freeze 2020-02-04 13:56:53 +09:00
Michał Górny 98594a44aa [lldb] [ObjectFile/ELF] Fix negated seg ids on 32-bit arches
Scale segment identifier up to user_id_t before negating it.  This fixes
the identifers being wrongly e.g. 0x00000000fffffffe instead of
0xfffffffffffffffe.  Fix suggested by Pavel Labath.

This fixes 5 tests failing on i386 (PR #44748):

  lldb-shell :: ObjectFile/ELF/PT_LOAD-overlap-PT_INTERP.yaml
  lldb-shell :: ObjectFile/ELF/PT_LOAD-overlap-PT_TLS.yaml
  lldb-shell :: ObjectFile/ELF/PT_LOAD-overlap-section.yaml
  lldb-shell :: ObjectFile/ELF/PT_LOAD.yaml
  lldb-shell :: ObjectFile/ELF/PT_TLS-overlap-PT_LOAD.yaml

Differential Revision: https://reviews.llvm.org/D73914
2020-02-04 05:50:56 +01:00
Jonas Devlieghere 4c05019dc0 [lldb/Test] Fix typo in TestDataFormatterStdMap.py 2020-02-03 20:44:53 -08:00
Jonas Devlieghere 70cea38ff7 [lldb/Test] Sort substr for TestDataFormatterStdMap.py 2020-02-03 20:35:43 -08:00
Jonas Devlieghere c1912c7542 [lldb/Test] Use arrays instead of sets for build_and_run_expr 2020-02-03 20:32:36 -08:00
Jonas Devlieghere e211a7d2aa Re-land "[lldb/Test] Make substrs argument to self.expect ordered."
Re-landing this now that (hopefully) all the failures this caused on the
bots have been addressed.

This patch changes the behavior of the substrs argument to self.expect.
Currently, the elements of substrs are unordered and as long as the
string appears in the output, the assertion passes.

We can be more precise by requiring that the substrings be ordered in
the way they appear. My hope is that this will make it harder to
accidentally pass a check because a string appears out of order.

Differential revision: https://reviews.llvm.org/D73766
2020-02-03 20:19:25 -08:00
Craig Topper c3a47221e0 [X86] Don't emit two X86ISD::COMI/UCOMI nodes when handling comi/ucomi intrinsics.
We were creating two with different operand orders, and then only
using one of them.

Instead just swap the operands when needed and create a single node.
2020-02-03 20:08:01 -08:00
Mehdi Amini ea4652ebeb Fix unused variable warning (NFC)
Use isa<> instead of dyn_cast<> when the result isn't used.
2020-02-04 03:38:13 +00:00
David Blaikie 1ced28cbe7 DebugInfo: Hash DW_OP_convert in loclists when using Split DWARF
This code was incorrectly emitting extra bytes into arbitrary parts of
the object file when it was meant to be hashing them to compute the DWO
ID.

Follow-up patch(es) will refactor this API somewhat to make such bugs
harder to introduce, hopefully.
2020-02-03 19:16:42 -08:00
Jason Molenda bc3f87cc02 Xfail this test temporarily until AdrianM or I can
debug why his patch is causing this regression; or
if it doesn't get figured out tomorrow, we'll
revert the patch.
2020-02-03 18:53:17 -08:00
David Blaikie 031f83fb82 DebugInfo: Simplify emitDebugLocEntry by never passing a null CU 2020-02-03 18:47:14 -08:00
David Blaikie 4f281f0474 DebugInfo: Fix convert-loclist.ll to handle different target instruction lengths 2020-02-03 18:44:18 -08:00
David Blaikie 552a8fe12b DebugInfo: Check DW_OP_convert in loclists with Split DWARF 2020-02-03 18:40:11 -08:00
Evgenii Stepanov 6da6153759 hwasan_symbolize: allow 0x in the address field
Summary:
Fix parsing of mangled stack trace lines where the address has been
replaced with "0x", literally.

Reviewers: vitalybuka

Subscribers: #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D73823
2020-02-03 18:23:48 -08:00
Evgenii Stepanov 0dc634babf hwasan_symbolize: warn about missing symbols at most once per library
Reviewers: vitalybuka

Subscribers: #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D73822
2020-02-03 18:23:48 -08:00
David Blaikie 5327b917e3 DebugInfo: Add missing test coverage for DW_OP_convert in loclists 2020-02-03 18:21:27 -08:00
Craig Topper c7768ce522 [X86] Update the haswell and broadwell scheduler information for gather instructions
Broadwell was missing half the gather instructions. Both models
had some mixups in the resource costs and number of uops.

I've updated here based on what I think the original IACA source
says with some cross checking against the microcode.

I'm not sure about latency as the IACA source I have doesn't have
that information. So I'm using the latency from uops.info.

I plan to update Skylake models as well, but I'll do that in a
separate patch.

Differential Revision: https://reviews.llvm.org/D73844
2020-02-03 17:57:48 -08:00
Huihui Zhang 9a40670a0a Revert "Reland "[AArch64] Fix data race on RegisterBank initialization.""
This reverts commit 9c726e9d90.

There still buildbot failure:
http://lab.llvm.org:8011/builders/clang-armv7-linux-build-cache/builds/25749
2020-02-03 16:58:58 -08:00
Huihui Zhang 9c726e9d90 Reland "[AArch64] Fix data race on RegisterBank initialization."
Minor fix, lambda function should capture all automatic variables
by reference.
Harbormaster pass with: https://reviews.llvm.org/B45640
2020-02-03 16:48:18 -08:00
Davide Italiano 246097a091 [TestKernVerStrLCNOTE] Strengthen a check. NFC. 2020-02-03 16:39:49 -08:00
Evgenii Stepanov 28c91219c7 [compiler-rt] implement sigaltstack interception
Summary:
An implementation for `sigaltstack` to make its side effect be visible to MSAN.

```
ninja check-msan
```

Reviewers: vitalybuka, eugenis

Reviewed By: eugenis

Subscribers: dberris, #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D73816

Patch by Igor Sugak.
2020-02-03 16:28:47 -08:00
Vedant Kumar 63e6508221 [lldb/StringPrinter] Simplify StringPrinterBufferPointer, NFC
Remove its template arguments and delete its copy/assign methods.
2020-02-03 15:57:33 -08:00
Vedant Kumar bb6646ce0a [lldb/DataExtractor] Use an early return in GetMaxS64Bitfield, NFC
Shafik suggested this cleanup in https://reviews.llvm.org/D73913.
2020-02-03 15:57:32 -08:00
Vedant Kumar 7b90cdedd1 [lldb/DataExtractor] Fix UB shift in GetMaxS64Bitfield
DataExtractor::GetMaxS64Bitfield performs a shift with UB in order to
construct a bitmask when bitfield_bit_size is 64. The current
implementation actually does “work” in this case, because the assumption
that the shift result is 0 holds, and 0 minus 1 gives the all-ones value
(the correct mask). However, the more readable/maintainable approach
might be to use an off-the-shelf UB-free helper.

Fixes a UBSan issue:

  "col" : 37,
  "description" : "invalid-shift-exponent",
  "filename" : "/Users/vsk/src/llvm-project-master/lldb/source/Utility/DataExtractor.cpp",
  "instrumentation_class" : "UndefinedBehaviorSanitizer",
  "line" : 615,
  "memory_address" : 0,
  "summary" : "Shift exponent 64 is too large for 64-bit type 'uint64_t' (aka 'unsigned long long')",

rdar://59117758

Differential Revision: https://reviews.llvm.org/D73913
2020-02-03 15:57:32 -08:00
Kelvin Li ac43033631 [OpenMP] [DOCS] Update OMP5.0 feature status table [NFC]
Differential Revision: https://reviews.llvm.org/D72901
2020-02-03 18:30:36 -05:00
Jessica Paquette 9effe38b22 [AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation
This ports the existing case for G_XOR from `getTestBitOperand` in
AArch64ISelLowering into GlobalISel.

The idea is to flip between TBZ and TBNZ while walking through G_XORs.

Let's say we have

```
tbz (xor x, c), b
```

Let's say the `b`-th bit in `c` is 1. Then

- If the `b`-th bit in `x` is 1, the `b`-th bit in `(xor x, c)` is 0.
- If the `b`-th bit in `x` is 0, then the `b`-th bit in `(xor x, c)` is 1.

So, then

```
tbz (xor x, c), b == tbnz x, b
```

Let's say the `b`-th bit in `c` is 0. Then

- If the `b`-th bit in `x` is 1, the `b`-th bit in `(xor x, c)` is 1.
- If the `b`-th bit in `x` is 0, then the `b`-th bit in `(xor x, c)` is 0.

So, then

```
tbz (xor x, c), b == tbz x, b
```

Differential Revision: https://reviews.llvm.org/D73929
2020-02-03 15:22:24 -08:00
Jay Foad 2252cac694 [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions with resource but no vaddr
Summary:
This enables clustering for many more BUF instructions.

Reviewers: rampitec, arsenm, nhaehnle

Subscribers: jvesely, wdng, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73868
2020-02-03 22:49:30 +00:00
Max Moroz 2ddff6fab0 [libFuzzer] Minor documentation fixes. 2020-02-03 14:41:06 -08:00
Jessica Paquette 37910fd0e1 [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation
This implements the following optimization:

```
(tbz (shl x, c), b) -> (tbz x, b-c)
```

Which appears in `getTestBitOperand` in AArch64ISelLowering.cpp.

If we test bit `b` of `shl x, c`, we can fold away the `shl` by looking `c` bits
to the right of `b` in `x` when this fits in the type. So, we can just test the
`b-c`th bit.

Differential Revision: https://reviews.llvm.org/D73924
2020-02-03 14:27:08 -08:00
Matt Arsenault 7d3aace3f5 AMDGPU: Add flag to control mem intrinsic expansion
GlobalISel doesn't implement the expansion for these yet, so add a
flag to force expanding these so it's possible to avoid these for a
while.
2020-02-03 14:26:01 -08:00
Reid Kleckner f8c4d70d11 Fix modules build after PassManagerImpl.h addition
This new header needs to be in the LLVM_intrinsics_gen module.
2020-02-03 14:25:43 -08:00
Adrian McCarthy 0e362d82b9 Improve help text for (lldb) target symbols add
There were some missing words and awkward syntax.  I think this is clearer.

Differential Revision: https://reviews.llvm.org/D73589
2020-02-03 14:22:05 -08:00
Adrian McCarthy c25938d57b Refactor CommandObjectTargetSymbolsAdd::AddModuleSymbols
* [NFC] Renamed local `matching_module_list` to `matching_modules` for
conciseness.

* [NFC] Eliminated redundant local variable `num_matches` to reduce the risk
that changes get it out of sync with `matching_modules.GetSize()`.

* Used an early return from case where the symbol file specified matches
multiple modules.  This is a slight behavior change, but it's an improvement:
It didn't make sense to tell the user that the symbol file simultaneously
matched multiple modules and no modules.

* [NFC] Used an early return from the case where no matches are found, to
better align with LLVM coding style.

* [NFC] Simplified call of `AppendWarningWithFormat("%s", stuff)` to
`AppendWarning(stuff)`.  I don't think this adds any copies.  It does
construct a StringRef, but it was going to have to scan the string for the
length anyway.

* [NFC] Removed unnecessary comments and reworded others for clarity.

* Used an early return if the symbol file could not be loaded.  This is a
behavior change because previously it could fail silently.

* Used an early return if the object file could not be retrieved from the
symbol file.  Again, this is a change because now there's an error message.

* [NFC] Eliminated a namespace alias that wasn't particularly helpful.

Differential Revision: https://reviews.llvm.org/D73594
2020-02-03 14:22:05 -08:00