dafdbf77b3
Some fixes for x86-64 JIT. Make it use small code
...
model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
llvm-svn: 54656
2008-08-11 23:46:25 +00:00
fb19f9402b
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
...
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
llvm-svn: 52943
2008-07-01 00:05:16 +00:00
974722b16f
runOnMachineFunction should set IsPIC because relocation model may have been changed.
...
llvm-svn: 51291
2008-05-20 01:56:59 +00:00
eabd647cd5
Change target-specific classes to use more precise static types.
...
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
llvm-svn: 51091
2008-05-14 01:58:56 +00:00
00bd8d904a
- Fix atomic operation JIT encoding.
...
- Remove unused instructions.
llvm-svn: 49921
2008-04-18 20:55:36 +00:00
ae84bbdbed
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
...
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
6db4b4cc65
Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
...
llvm-svn: 49157
2008-04-03 08:53:17 +00:00
24bc123e80
Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
...
llvm-svn: 48447
2008-03-17 06:56:52 +00:00
0e7b00d79f
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
...
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
77c8da7f00
Add debugging stuff.
...
llvm-svn: 48359
2008-03-14 07:13:42 +00:00
3bd59641ac
Ignore debugging related instructions if they get this far.
...
llvm-svn: 47934
2008-03-05 02:34:36 +00:00
801bfb2cf7
Rather than asserting. Dump out the MI that we are not able to encode and abort.
...
llvm-svn: 47933
2008-03-05 02:08:03 +00:00
0070dd1de3
Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode.
...
llvm-svn: 47795
2008-03-01 13:37:02 +00:00
80d6b87934
De-tabify
...
llvm-svn: 47600
2008-02-26 10:57:23 +00:00
21ad494f67
Enable exception handling int JIT
...
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
7a55a94ba1
Avoid needlessly casting away const qualifiers.
...
llvm-svn: 46877
2008-02-08 03:29:40 +00:00
8e60f2c996
IMPLICIT_USE and IMPLICIT_DEF are dead, remove them.
...
llvm-svn: 45838
2008-01-10 19:27:54 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
f376c99ea0
rename hasVariableOperands() -> isVariadic(). Add some comments.
...
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
llvm-svn: 45687
2008-01-07 05:19:29 +00:00
b0d06b4381
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
...
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
...
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
880b080887
X86 JIT PIC jumptable support.
...
llvm-svn: 45616
2008-01-05 02:26:58 +00:00
f55b7381af
Combine MovePCtoStack + POP32r into one instruction MOVPC32r so it can be moved if needed.
...
llvm-svn: 45605
2008-01-05 00:41:47 +00:00
c1d1e54fc4
Unbreak tailcall opt in JIT.
...
llvm-svn: 45576
2008-01-04 10:50:28 +00:00
49ff8ecd03
X86 PIC JIT support fixes: encoding bugs, add lazy pointer stubs support.
...
llvm-svn: 45575
2008-01-04 10:46:51 +00:00
563fcc3428
Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used
...
for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).
llvm-svn: 45527
2008-01-03 02:56:28 +00:00
96334b4e3b
X86 PIC JIT bug fix: relocations for constantpool and jumptable.
...
llvm-svn: 45515
2008-01-02 23:38:59 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
345a00ba05
Preliminary PIC JIT support for X86 (32-bit) / Darwin.
...
llvm-svn: 45313
2007-12-22 09:40:20 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
...
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
c891ae92dc
Fix x86-64 jit: remove reliance on Dwarf numbers.
...
llvm-svn: 44048
2007-11-13 17:54:34 +00:00
7741427a09
Move getX86RegNum into X86RegisterInfo and use it
...
in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
llvm-svn: 41577
2007-08-29 19:01:20 +00:00
5fecb80efa
Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource.
...
llvm-svn: 40578
2007-07-29 01:24:57 +00:00
ce38853cc6
Trampoline codegen support for X86-32.
...
llvm-svn: 40566
2007-07-27 20:02:49 +00:00
8c78a0bff0
Drop 'const'
...
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
...
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
...
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
fb80151c42
Removed tabs everywhere except autogenerated & external files. Add make
...
target for tabs checking.
llvm-svn: 36146
2007-04-16 18:10:23 +00:00
f099841573
Add support for our first SSSE3 instruction "pmulhrsw".
...
llvm-svn: 35869
2007-04-10 22:10:25 +00:00
e278f30a52
Clean up.
...
llvm-svn: 35105
2007-03-14 20:20:19 +00:00
dda4c32db3
X86-64 JIT is in large code model. Need stubs for direct calls.
...
llvm-svn: 35097
2007-03-14 10:51:55 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
...
is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
3b235aa5dc
JIT large code model support.
...
llvm-svn: 32220
2006-12-05 07:29:55 +00:00
62cdc3f011
- Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
...
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.
llvm-svn: 32215
2006-12-05 04:01:03 +00:00
67fc141db5
Match TargetInstrInfo changes.
...
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
c8e81b8d48
Removed even more std::cerr and #include <iostream> things.
...
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
14140059f0
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
1698c2999c
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
92e5113d48
Skip over first operand when determining REX prefix for two-address code.
...
llvm-svn: 30300
2006-09-13 19:07:28 +00:00
11b0a5dbd4
Committing X86-64 support.
...
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
7f3f0973e6
Clean up.
...
llvm-svn: 30140
2006-09-07 01:17:57 +00:00
4c7a3fbdea
Watch out for variable_ops instructions.
...
llvm-svn: 30135
2006-09-06 20:32:45 +00:00
ac22e54131
Variable ops instructions may ignore the last few operands for code emission.
...
llvm-svn: 30134
2006-09-06 20:24:14 +00:00
e3d2e1e41e
Update the X86 JIT to make it work with the new two-addr changes. This also
...
adds assertions that check to make sure every operand gets emitted.
llvm-svn: 30110
2006-09-05 02:52:35 +00:00
3d27be1333
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
...
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
c664efe223
Give a good error message when we try to jit inline asm.
...
llvm-svn: 29891
2006-08-26 00:47:03 +00:00
78bf1074fc
Resolve BB references with relocation.
...
llvm-svn: 29351
2006-07-27 18:21:10 +00:00
f6acb34d23
- Refactor the code that resolve basic block references to a TargetJITInfo
...
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
llvm-svn: 29276
2006-07-25 20:40:54 +00:00
0cc5907728
Hide x86 symbols
...
llvm-svn: 28976
2006-06-28 23:27:49 +00:00
0c9b90aba3
Eliminate unneeded parameter.
...
llvm-svn: 28907
2006-06-22 00:02:55 +00:00
fc1b27dad1
variable_ops instructions such as call can have any number of operands.
...
llvm-svn: 28906
2006-06-21 23:37:07 +00:00
9fee442e63
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
...
llvm-svn: 28324
2006-05-16 07:21:53 +00:00
ee64b6b40f
Remove a bunch more dead V9 specific stuff
...
llvm-svn: 28094
2006-05-04 01:26:39 +00:00
6e663f1c1e
Remove some more V9-specific stuff.
...
llvm-svn: 28092
2006-05-04 00:49:59 +00:00
2aef59f123
Simplify handling of relocations
...
llvm-svn: 28090
2006-05-04 00:42:08 +00:00
e3a9c70ba0
Change from using MachineRelocation ctors to using static methods
...
in MachineRelocation to create Relocations.
llvm-svn: 28088
2006-05-03 20:30:20 +00:00
9e68942d78
inline a simple method
...
llvm-svn: 28083
2006-05-03 17:21:32 +00:00
1d8ee1fc80
Suck block address tracking out of targets into the JIT Emitter. This
...
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
llvm-svn: 28082
2006-05-03 17:10:41 +00:00
43b1ed7e3d
Teach the x86 jit how to handle jump tables not directly used by a jump
...
instruction.
llvm-svn: 28080
2006-05-03 04:52:47 +00:00
d8b192ba3b
Change the BasicBlockAddrs map to be a vector, indexed by MBB number.
...
llvm-svn: 28069
2006-05-03 00:32:55 +00:00
b8065a9a3a
Several related changes:
...
1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
from the MachineCodeEmitter interface, and reducing the amount of target-
specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
*right* next to the functions that they belong to, instead of in a separate
pool of memory. This makes all memory for a function be contiguous, and
means the JITEmitter only tracks one block of memory now.
llvm-svn: 28065
2006-05-02 23:22:24 +00:00
e1c96369e2
Fix a purely hypothetical problem (for now): emitWord emits in the host
...
byte format. This doesn't work when using the code emitter in a cross target
environment. Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.
llvm-svn: 28060
2006-05-02 19:14:47 +00:00
c9aa3715e8
Refactor the machine code emitter interface to pull the pointers for the current
...
code emission location into the base class, instead of being in the derived classes.
This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments. This implements feature request #1 of PR469.
llvm-svn: 28059
2006-05-02 18:27:26 +00:00
5bc9c583e3
There is no reason to use a virtual method to store this word.
...
llvm-svn: 28053
2006-05-02 17:16:20 +00:00
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
...
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
b1d3c64d1f
Add a couple more pseudo instructions.
...
llvm-svn: 26939
2006-03-22 02:52:03 +00:00
877ab55e06
ConstantPoolIndex is now the displacement portion of the address (rather
...
than base).
llvm-svn: 26382
2006-02-26 09:12:34 +00:00
73136dfecc
- Added option -relocation-model to set relocation model. Valid values include static, pic,
...
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
llvm-svn: 26315
2006-02-22 20:19:42 +00:00
5caed8a231
Jit does not support PIC yet.
...
llvm-svn: 26278
2006-02-18 00:57:10 +00:00
f84774ed46
Don't special case XS, XD prefixes.
...
llvm-svn: 26183
2006-02-14 21:52:51 +00:00
fb7b5ef74b
Bug fix: XS, XD prefixes were being emitted twice.
...
XMM registers were not being handled.
llvm-svn: 26182
2006-02-14 21:45:24 +00:00
9e350cd6ad
- Use xor to clear integer registers (set R, 0).
...
- Added a new format for instructions where the source register is implied
and it is same as the destination register. Used for pseudo instructions
that clear the destination register.
llvm-svn: 25872
2006-02-01 06:13:50 +00:00
be08957dc5
Fix a bunch of JIT failures with the new isel
...
llvm-svn: 25748
2006-01-28 18:19:37 +00:00
ed2bb8562f
Unbreak the JIT with SSE
...
llvm-svn: 25688
2006-01-27 18:27:18 +00:00
68e62a5184
Allow jit-beta to work
...
llvm-svn: 25578
2006-01-24 04:50:48 +00:00
de02d7727f
Add explicit #includes of <iostream>
...
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
d831209c34
Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
...
after itself.
llvm-svn: 22376
2005-07-11 05:17:48 +00:00
8a0933608a
First round of support for doing scalar FP using the SSE2 ISA extension and
...
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
llvm-svn: 22340
2005-07-06 18:59:04 +00:00
57279597ab
Tailcalls require stubs to be emitted. Otherwise, the compilation callback
...
doesn't know who 'called' it.
llvm-svn: 22136
2005-05-19 05:54:33 +00:00
c88330ad13
* Remove trailing whitespace
...
* Convert tabs to spaces
llvm-svn: 21426
2005-04-21 23:38:14 +00:00
d68ebaacc0
There is no reason to emit function stubs for direct calls.
...
llvm-svn: 18082
2004-11-21 03:46:06 +00:00
d02c9eb697
Remove all JIT specific code and switch the code generator over to emitting
...
relocations for global references.
llvm-svn: 18068
2004-11-20 23:55:15 +00:00
4cd9def8b7
Dont' forget to switch back to decimal output
...
llvm-svn: 18010
2004-11-19 20:57:07 +00:00
2004d90f97
Fix a major bug in the signed shr code, which apparently only breaks 134.perl!
...
llvm-svn: 17902
2004-11-16 18:40:52 +00:00
6b7652fae5
Remove a dead function, which died when we got GAS emission working (phwew,
...
hold your nose!)
llvm-svn: 17869
2004-11-16 04:34:29 +00:00
c927072b50
Implement a simple FIXME: if we are emitting a basic block address that has
...
already been emitted, we don't have to remember it and deal with it later,
just emit it directly.
llvm-svn: 17868
2004-11-16 04:30:51 +00:00
2e182fc39b
* Merge some win32 ifdefs together
...
* Get rid of "emitMaybePCRelativeValue", either we want to emit a PC relative
value or not: drop the maybe BS. As it turns out, the only places where
the bool was a variable coming in, the bool was a dynamic constant.
llvm-svn: 17867
2004-11-16 04:21:18 +00:00
9cc2dac7c1
Add debug-only=jit printout, so we see when lazily resolved symbols are
...
set up.
llvm-svn: 17862
2004-11-15 23:16:55 +00:00
ab79288e37
Fix compilation problem; make the cast and the LHS be the same type.
...
llvm-svn: 17488
2004-11-05 16:17:06 +00:00
429aaa5855
Quiet VC++ warnings
...
llvm-svn: 17484
2004-11-05 04:50:59 +00:00
fbc070bfdc
Improve compatibility with VC++, patch contributed by Morten Ofstad!
...
llvm-svn: 17126
2004-10-18 15:54:17 +00:00
112fd88a05
Unify handling of constant pool indexes with the other code paths, allowing
...
us to use index registers for CPI's
llvm-svn: 17082
2004-10-17 07:49:45 +00:00
3b78938b9e
Give the X86 JIT the ability to encode global+disp constants. Patch
...
contributed by Jeff Cohen!
llvm-svn: 17010
2004-10-15 04:53:13 +00:00
72be9ae024
Fix filename: Printer.cpp has become X86AsmPrinter.cpp
...
llvm-svn: 16299
2004-09-12 21:26:04 +00:00
7c16caa336
Changes For Bug 352
...
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
llvm-svn: 16137
2004-09-01 22:55:40 +00:00
4dfadc05e6
Remove dead method
...
llvm-svn: 15647
2004-08-11 02:26:39 +00:00
c856e90d1d
Make sure to emit the immediate byte for instructions like:
...
shrd [mem], reg, imm
This fixes the jit-ls failure on 186.crafty.
llvm-svn: 14914
2004-07-17 20:26:14 +00:00
82baa9c394
Convert to the new TargetMachine interface.
...
llvm-svn: 13952
2004-06-02 05:55:25 +00:00
de5ccc18e3
Don't keep track of references to LLVM BasicBlocks while emitting; use
...
MachineBasicBlocks instead.
llvm-svn: 13568
2004-05-14 06:54:58 +00:00
6e102a7edd
Use emitWordAt() to emit forward-branch fixups.
...
llvm-svn: 13120
2004-04-23 17:11:16 +00:00
eaa28a29ae
Add support for new instruction type
...
llvm-svn: 12894
2004-04-13 17:18:51 +00:00
508b459d12
Add emitInstruction() API so that we can get the bytes of a simple instruction
...
llvm-svn: 12252
2004-03-09 03:34:53 +00:00
a7c2da3af5
Constify things a bit
...
llvm-svn: 12251
2004-03-09 03:30:12 +00:00
194939086d
Each instruction now has both an ImmType and a MemType. This describes
...
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
llvm-svn: 11967
2004-02-28 22:02:05 +00:00
58270fcf1f
Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.
...
llvm-svn: 11921
2004-02-27 18:55:12 +00:00
30e73e3442
Add support for GlobalAddress's for alkis
...
llvm-svn: 11560
2004-02-17 18:23:55 +00:00
c07eeaef6b
Expand the repertoire of the forms we can print and encode.
...
llvm-svn: 11537
2004-02-17 07:40:44 +00:00
bbf53937a4
Make dense maps keyed on physical registers smallerusing
...
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
llvm-svn: 11477
2004-02-15 21:37:17 +00:00
6a35516dcc
Add back machine code deleter pass until we get a MachineCode pass
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that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
llvm-svn: 11453
2004-02-15 00:03:15 +00:00
8dc99feeaf
Add support for the rep movs[bwd] instructions, and emit them when code
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generating the llvm.memcpy intrinsic.
llvm-svn: 11351
2004-02-12 17:53:22 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
68cff6bf4d
Remove floating point killer pass. This is now implemented in the
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instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
llvm-svn: 10562
2003-12-20 16:22:59 +00:00
452597611f
Finally, _actually delete the machine code_ for a function, after it has
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been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
llvm-svn: 10559
2003-12-20 10:20:19 +00:00
ddec71c3b6
A minor cleanup for better encapsulation
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llvm-svn: 10545
2003-12-20 02:03:14 +00:00
833c3c2597
Rip JIT specific stuff out of TargetMachine, as per PR176
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llvm-svn: 10542
2003-12-20 01:22:19 +00:00
c6efb11f02
Modified cast so that it converts the int to a long before casting to
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a pointer. This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.
llvm-svn: 10435
2003-12-12 19:57:48 +00:00
2e7416cb04
Implement the TargetMachine::getJITStubForFunction method for X86, finegrainify
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namespacification.
llvm-svn: 10430
2003-12-12 07:11:18 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
97e1b55723
* Rename X86::IMULr16 -> X86::IMULrr16
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* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
extra copy into a register, reducing register pressure.
llvm-svn: 9278
2003-10-20 03:42:58 +00:00
c05684ad22
Fix typo in comment.
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llvm-svn: 9187
2003-10-16 23:45:05 +00:00
7eb05a170a
Spell `necessary' correctly.
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llvm-svn: 7944
2003-08-18 14:43:39 +00:00
845b5af4d4
addPassesToJITCompile and addPassesToEmitMachineCode now take a
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FunctionPassManager, to support function-at-a-time compilation and
emission of code.
llvm-svn: 7821
2003-08-13 18:17:27 +00:00
7c257321c7
This is the real fix for the previous register allocator problem.
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Physical registers should not float around.
llvm-svn: 7587
2003-08-05 00:48:47 +00:00
3663901941
Set debug types
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llvm-svn: 7532
2003-08-03 21:14:38 +00:00
1007f033d4
Move DEBUG to Debug.h
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llvm-svn: 7497
2003-08-01 22:21:34 +00:00
e1b4e68396
We don't modify the LLVM rep, remain const correct
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llvm-svn: 7345
2003-07-26 23:06:00 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
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system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
7a719ed20c
Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",
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so that we can easily change its use to be conditional on the result of
an autoconf test later.
llvm-svn: 6723
2003-06-16 21:54:01 +00:00
11ecb1d8ca
Fix warnings on Sparc
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llvm-svn: 6658
2003-06-06 18:25:33 +00:00
65d29b87e3
Add statistic for # machine instrs emitted
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Add GROSS HACK to get CompilationCallback to work when compiled in release mode
llvm-svn: 6646
2003-06-06 04:00:05 +00:00
0addbab5e2
Add namespace comments for doxygen
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llvm-svn: 6581
2003-06-03 15:31:23 +00:00
f9162dc713
Eliminated a compiler warning due to casting to a different-sized datatype.
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llvm-svn: 6531
2003-06-02 04:13:58 +00:00
29848417f3
Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
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target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.
llvm-svn: 6528
2003-06-02 03:28:00 +00:00
3bb2a00849
Move X86 specific code out of the JIT into the X86 backend
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llvm-svn: 6516
2003-06-01 23:23:50 +00:00
74b65ee219
This blank line has GOT to go.
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llvm-svn: 6057
2003-05-09 03:28:13 +00:00
d964c3b9fd
IMPLICIT_DEF was not the beautiful elegant solution I thought it was going
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to be. In fact, it made stuff worse. :(
llvm-svn: 6013
2003-05-07 19:21:28 +00:00
4b1e02df8f
Don't have a cow with new pseudo instructions
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llvm-svn: 6009
2003-05-06 21:31:47 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
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llvm-svn: 5272
2003-01-14 22:00:31 +00:00
d4ba62218e
* Add support for FP registers ST*
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* Add support for the constant pool & constant pool indices
* Add support for MRMS?m instructions
* Fix FP Prefix emission
* Add support for global addresses and external symbols
llvm-svn: 5224
2003-01-13 00:33:59 +00:00
d24f633394
* Convert to a MachineFunctionPass
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* ctor doesn't take TM argument
* handle direct ESP references correctly!
llvm-svn: 5179
2002-12-28 20:24:48 +00:00
36703cd02a
Add support for FP prefixes
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llvm-svn: 5151
2002-12-25 05:09:21 +00:00
e218f7924c
Add support for the bswap instruction
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llvm-svn: 5114
2002-12-23 23:46:00 +00:00
67e555d1ec
fix warning
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llvm-svn: 5107
2002-12-20 04:12:48 +00:00
d06650ade1
Give passes nice names!
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llvm-svn: 5059
2002-12-15 21:13:40 +00:00
ce35108606
Use MachineOperand::isFoo methods instead of our own global functions
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llvm-svn: 5033
2002-12-15 08:01:39 +00:00
44876fdee4
InstSelectSimple.cpp: Give promote32 a comment. Add initial
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implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
llvm-svn: 4998
2002-12-13 07:56:18 +00:00
e791322602
Emit the right form of mod/rm mod field
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llvm-svn: 4986
2002-12-13 05:05:05 +00:00
ec0bc92146
Rename MemArg* to Arg*
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llvm-svn: 4979
2002-12-13 03:51:55 +00:00
343e4b1810
Make mem size an assert
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Add mem size flags to all instructions using an imm
llvm-svn: 4978
2002-12-13 03:50:13 +00:00
2ef75daf78
This is supposed to provide correct size for datatypes. Supposedly.
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llvm-svn: 4977
2002-12-13 02:13:15 +00:00
fb8032dc84
Fix bogus assertion failures
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llvm-svn: 4919
2002-12-04 17:32:52 +00:00
6425a502a6
Add support for referencing global variables/functions
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llvm-svn: 4907
2002-12-04 06:45:19 +00:00
8052f8006b
Split the machine code emitter completely out of the printer
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llvm-svn: 4882
2002-12-03 06:34:06 +00:00
15fbd61664
More support for machine code emission: raw instructions
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llvm-svn: 4872
2002-12-02 21:56:18 +00:00
db31bbad6b
Start implementing MachineCodeEmitter
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llvm-svn: 4870
2002-12-02 21:44:34 +00:00
787a9de685
Initial support for machine code emission
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llvm-svn: 4866
2002-12-02 21:24:12 +00:00
Dale Johannesen