Commit Graph

246795 Commits

Author SHA1 Message Date
Ulrich Weigand fffc7110d6 [SystemZ] Model access registers as LLVM registers
Add the 16 access registers as LLVM registers.  This allows removing
a lot of special cases in the assembler and disassembler where we
were handling access registers; this can all just use the generic
register code now.

Also add a bunch of instructions to operate on access registers,
for assembler/disassembler use only.  No change in code generation
intended.

llvm-svn: 286283
2016-11-08 20:15:26 +00:00
Rui Ueyama 9c5a69d2ac Rename a function to avoid function overloading. NFC.
llvm-svn: 286282
2016-11-08 20:02:23 +00:00
Haojian Wu 2930be1421 [clang-move] Move all code from old.h/cc directly when moving all class declarations from old.h.
Summary: When moving all code to new.h/cc,  these code also will be formatted based on the given code style.

Reviewers: ioeric

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26236

llvm-svn: 286281
2016-11-08 19:55:13 +00:00
Davide Italiano 11a871b227 [LoopDistribute] Preserve GlobalsAA also in the new Pass Manager.
Differential Revision:  https://reviews.llvm.org/D26408

llvm-svn: 286280
2016-11-08 19:52:32 +00:00
Daniel Jasper d21485d2f5 Remove FormatContext from libClang as it is now unused.
llvm-svn: 286279
2016-11-08 19:47:19 +00:00
Eli Friedman 06025cf6c7 Don't store Twine in a local variable.
Fixes post-commit review comment from r286177.

llvm-svn: 286275
2016-11-08 19:43:56 +00:00
Dan Gohman e81021a5cb [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.
Since IMPLIFIT_DEF instructions are omitted in the output, when the output
of an IMPLICIT_DEF instruction is stackified, the resulting register lacks
an explicit push, leading to a push/pop mismatch. Fix this by converting
such IMPLICIT_DEFs into CONST_I32 0 instructions so that they have explicit
pushes.

llvm-svn: 286274
2016-11-08 19:40:38 +00:00
Ahmed Bougacha 53a03a28c4 [GlobalISel] Dump all instructions inserted by selector.
This is helpful when multiple instructions are inserted.

llvm-svn: 286273
2016-11-08 19:27:13 +00:00
Ahmed Bougacha db273a1272 [GlobalISel] Permit select() to erase.
Erasing reverse_iterators is problematic; iterate manually.
While there, keep track of the range of inserted instructions.
It can miss instructions inserted elsewhere, but those are harder
to track.

Differential Revision: http://reviews.llvm.org/D22924

llvm-svn: 286272
2016-11-08 19:27:10 +00:00
Davide Italiano 1e77aaca8a [LibcallsShrinkWrap] This pass doesn't preserve the CFG.
For example, it invalidates the domtree, causing assertions
in later passes which need dominator infos. Make it preserve
GlobalsAA, as suggested by Eli.

Differential Revision:  https://reviews.llvm.org/D26381

llvm-svn: 286271
2016-11-08 19:18:20 +00:00
Chad Rosier fbc7b7d154 Fix typo in comment. NFC.
llvm-svn: 286270
2016-11-08 19:10:25 +00:00
Michael Kuperstein a73a754adf CODE_OWNERS: Take ownership of the loop vectorizer.
llvm-svn: 286269
2016-11-08 18:44:40 +00:00
Ulrich Weigand 3d07d45089 [SystemZ] Always use semantic instruction classes
Define a couple of additional semantic classes and use them
throughout the .td files to make them more consistent and
more easily readable.

No functional change.

llvm-svn: 286268
2016-11-08 18:37:48 +00:00
Ulrich Weigand bfcfa0e207 [SystemZ] Refactor InstRR* instruction format patterns
This changes the InstRR (and related) patterns to no longer
automatically add an "r" at the end of the mnemonic.  This
makes the .td files more obviously understandable, and also
allows using the patterns for those few instructions that
do not follow the *r scheme.

Also add some more sub-formats of the RRF format class, to
match operand names and sequence from the PoP better.

No functional change.

llvm-svn: 286267
2016-11-08 18:36:31 +00:00
Ulrich Weigand 37bd451a55 [SystemZ] Rename some Inst* instruction format classes
Now that we've added instruction format subclasses like
InstRIb, it makes sense to rename the old InstRI to InstRIa.

Similar for InstRX, InstRXY, InstRS, InstRSY, and InstSS.

No functional change.

llvm-svn: 286266
2016-11-08 18:32:50 +00:00
Nirav Dave e833c6c61a [MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.
Reviewers: t.p.northover, rengolin

Subscribers: llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D26309

llvm-svn: 286265
2016-11-08 18:31:04 +00:00
Daniel Jasper 1619805099 Revert "Remove now unnecessary FormatRewriterContext."
This reverts commit r286262. I accidentally committed it without all of
the changes.

llvm-svn: 286264
2016-11-08 18:30:52 +00:00
Ulrich Weigand d2148caffc [SystemZ] Refactor branch and conditional instruction patterns
Rework patterns for branches, call & return instructions,
compare-and-branch, compare-and-trap, and conditional move
instructions.

In particular, simplify creation of patterns for the extended
opcodes of instructions that take a CC mask.

Also, use semantical instruction classes for all the instructions
instead of open-coding them in SystemZInstrInfo.td.

Adds a couple of the basic branch instructions (that are unused
for codegen) for the assembler/disassembler.

llvm-svn: 286263
2016-11-08 18:30:50 +00:00
Daniel Jasper e527dc6223 Remove now unnecessary FormatRewriterContext.
llvm-svn: 286262
2016-11-08 18:29:19 +00:00
Rafael Espindola 8f9026baff Don't add null and discarded sections to the global list.
Avoids having to skip them multiple times.

llvm-svn: 286261
2016-11-08 18:23:02 +00:00
Piotr Padlewski 01659cb9fe NFC small changes in MemDep
llvm-svn: 286260
2016-11-08 18:20:51 +00:00
Wei Mi b5cf9e53e5 [RegAllocGreedy] Another fix about NewVRegs for last chance recoloring after r281783.
About when we should move a vreg from CurrentNewVRegs to NewVRegs,
if the vreg in CurrentNewVRegs was added into RecoloringCandidate and was
evicted, it shouldn't be added to NewVRegs because its physical register
will be restored at the end of tryLastChanceRecoloring after the recoloring
failed. If the vreg in CurrentNewVRegs was not in RecoloringCandidate, i.e.
it was evicted in selectOrSplitImpl inside tryRecoloringCandidates, its
physical register will not be restored even if the recoloring failed. In
that case, we need to add the vreg to NewVRegs.

Same as r281783, the problem was seen on out-of-tree target and we didn't
have a test case that reproduce the problem with in-tree targets.

llvm-svn: 286259
2016-11-08 18:19:36 +00:00
Chris Bieneman b6f833793d [Test Suite] Properly quote python string
Oops!

llvm-svn: 286258
2016-11-08 18:14:42 +00:00
Alexander Kornienko ed999fe0b2 Remove mentions of clang-analyzer-alpha
llvm-svn: 286257
2016-11-08 18:12:56 +00:00
Sanjay Patel 8625c43662 [InstCombine] move min/max tests to min/max test file; NFC
llvm-svn: 286256
2016-11-08 18:12:19 +00:00
Sanjay Patel 686cf49f7a [InstCombine] update checks; NFC
llvm-svn: 286255
2016-11-08 18:06:14 +00:00
Chris Bieneman 4b8dbcb74c [Test Suite] Attempt to fix issue zturner reported to me
Not sure why this didn't explode more massively, but this should fix the issue with the non-framework tests.

llvm-svn: 286254
2016-11-08 17:53:18 +00:00
Tim Northover 5f7dea85c2 GlobalISel: support selecting fpext/fptrunc instructions on AArch64.
llvm-svn: 286253
2016-11-08 17:44:07 +00:00
Anton Korobeynikov 243a4700ce Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes.
Summary: In addition, the branch instructions will have proper BB destinations, not offsets, like before.

Reviewers: asl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23718

llvm-svn: 286252
2016-11-08 17:19:59 +00:00
Chad Rosier c244349b85 Remove unused include. NFC.
llvm-svn: 286250
2016-11-08 16:51:19 +00:00
Sanjay Patel 843b171573 [docs] fix link to AMD manuals (PR30946)
llvm-svn: 286249
2016-11-08 16:49:24 +00:00
Eugene Leviant 166c99b37e [ELF] Attempt to fix buildbot (duplicate _gp symbol)
llvm-svn: 286247
2016-11-08 16:44:48 +00:00
Dehao Chen 2ca9be330b Use the last 7 bits to represent the discriminator to fit it in 1 byte ULEB128 (NFC).
From experiments, discriminator is rarely greater than 127. Here we enforce it to be no greater than 127 so that it will always fit in 1 byte.

llvm-svn: 286245
2016-11-08 16:32:32 +00:00
Eugene Leviant 825e538559 [ELF] Better error reporting for duplicate symbol
Differential revision: https://reviews.llvm.org/D26397

llvm-svn: 286244
2016-11-08 16:26:32 +00:00
Daniel Jasper 528d682ff6 [clang-format] Remove (SourceManager, FileID) variants
In Format, remove the reformat() and clean() functions taking a SourceManager
and a FileID. Keep the versions taking StringRef Code.

- there was duplicated functionality
- the FileID versions were harder to use
- the clean() version is dead code anyways

Patch by Krasimir Georgiev. Thank you.

llvm-svn: 286243
2016-11-08 16:11:33 +00:00
Rafael Espindola 73c3a36b9f Remove dead arguments. NFC.
llvm-svn: 286242
2016-11-08 15:51:00 +00:00
Simon Pilgrim bdb3c38157 [X86][SSE] Regenerate test (just adds missing header)
llvm-svn: 286241
2016-11-08 15:42:49 +00:00
George Rimar 9602637030 [ELF] - Fix mistype. NFC.
Thanks to Malcolm Parsons who pointed on that.

llvm-svn: 286239
2016-11-08 15:26:21 +00:00
Simon Pilgrim 778596bf59 [TargetLowering] Fix undef vector element issue with true/false result handling
Fixed an issue with vector usage of TargetLowering::isConstTrueVal / TargetLowering::isConstFalseVal boolean result matching.

The comment said we shouldn't handle constant splat vectors with undef elements. But the the actual code was returning false if the build vector contained no undef elements....

This patch now ignores the number of undefs (getConstantSplatNode will return null if the build vector is all undefs).

The change has also unearthed a couple of missed opportunities in AVX512 comparison code that will need to be addressed.

Differential Revision: https://reviews.llvm.org/D26031

llvm-svn: 286238
2016-11-08 15:07:01 +00:00
Rafael Espindola c0e47fbfb2 Delete the InterpSection class.
We can just use a regular InputSection.

llvm-svn: 286237
2016-11-08 14:56:27 +00:00
Pablo Barrio 9f45254138 [JumpThreading] Unfold selects that depend on the same condition
Summary:
These are good candidates for jump threading. This enables later opts
(such as InstCombine) to combine instructions from the selects with
instructions out of the selects. SimplifyCFG will fold the select
again if unfolding wasn't worth it.

Patch by James Molloy and Pablo Barrio.

Reviewers: rengolin, haicheng, sebpop

Subscribers: jojo, jmolloy, llvm-commits

Differential Revision: https://reviews.llvm.org/D26391

llvm-svn: 286236
2016-11-08 14:53:30 +00:00
Rafael Espindola 1a5411238e Revert "[ELF] Make InputSection<ELFT>::writeTo virtual"
This reverts commit r286100.

This saves 8 bytes of every InputSection.

llvm-svn: 286235
2016-11-08 14:47:16 +00:00
Rafael Espindola 682a5bc2c1 Delete the CommonSection class.
With the current infrastructure it can be just an ordinary
InputSection like the real .bss sections.

llvm-svn: 286234
2016-11-08 14:42:34 +00:00
Simon Pilgrim d02c55204b [VectorLegalizer] Expansion of CTLZ using CTPOP when possible
This patch avoids scalarization of CTLZ by instead expanding to use CTPOP (ref: "Hacker's Delight") when the necessary operations are available.

This also adds the necessary cost models for X86 SSE2 targets (the main beneficiary) to ensure vectorization only happens when its useful.

Differential Revision: https://reviews.llvm.org/D25910

llvm-svn: 286233
2016-11-08 14:10:28 +00:00
Rafael Espindola 89fd151ee0 cleanup hashSysV a bit.
Don't pass a reference to a StringRef and use a range loop.

llvm-svn: 286232
2016-11-08 14:04:16 +00:00
Roger Ferrer Ibanez 80c0f33c29 [AArch64] Fix incorrect CSEL node created
Under -enable-unsafe-fp-math, SELECT_CC lowering in AArch64
transforms floating point comparisons of the form "a == 0.0 ? 0.0 : x" to
"a == 0.0 ? a : x". But it incorrectly assumes that 'x' and 'a' have
the same type which can lead to a wrong CSEL node that crashes later
due to nonsensical copies.

Differential Revision: https://reviews.llvm.org/D26394

llvm-svn: 286231
2016-11-08 13:34:41 +00:00
Simon Dardis e7cc54058d [mips] Renable small data section test.
llvm-svn: 286230
2016-11-08 13:03:45 +00:00
Ayman Musa e60a41ca28 [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics.
Differential Revision: https://reviews.llvm.org/D26021

llvm-svn: 286229
2016-11-08 12:00:30 +00:00
Kirill Bobyrev b0cf6a3840 [clang-tidy] Improve rename_check.py.
-Start using argparse instead of mimicking CLI parsing.
-PEPify the code.
-Decrease the number of imports by slightly cleaning up the script.

Reviewers: alexfh

Differential Revision: https://reviews.llvm.org/D25074

llvm-svn: 286228
2016-11-08 11:43:50 +00:00
Amara Emerson 0b40201e13 Adds the loop end location to the loop metadata.
This additional information can be used to improve the locations when generating remarks for loops.

Patch by Florian Hahn.

Differential Revision: https://reviews.llvm.org/D25763

llvm-svn: 286227
2016-11-08 11:18:59 +00:00