Commit Graph

178 Commits

Author SHA1 Message Date
Akira Hatanaka 5360f88355 Add support for ext and ins.
llvm-svn: 137804
2011-08-17 02:05:42 +00:00
Akira Hatanaka 2fcc1cfdce Define unaligned load and store.
llvm-svn: 137515
2011-08-12 21:30:06 +00:00
Eli Friedman 26a484852e Code generation for 'fence' instruction.
llvm-svn: 136283
2011-07-27 22:21:52 +00:00
Akira Hatanaka a4c09bce9b Lower memory barriers to sync instructions.
llvm-svn: 135537
2011-07-19 23:30:50 +00:00
Eric Christopher 9519c08a43 Remove getRegClassForInlineAsmConstraint for Mips.
Part of rdar://9643582

llvm-svn: 134084
2011-06-29 19:04:31 +00:00
Akira Hatanaka 4c406e7457 Re-apply 132758 and 132768 which were speculatively reverted in 132777.
llvm-svn: 133494
2011-06-21 00:40:49 +00:00
Eric Christopher f15601f19a Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
llvm-svn: 132777
2011-06-09 16:03:19 +00:00
Akira Hatanaka 4e9af454f7 Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
dynamically allocated stack area was not set.

llvm-svn: 132758
2011-06-08 21:28:09 +00:00
Akira Hatanaka 6627752050 Custom-lower FRAMEADDR. Patch by Sasa Stankovic.
llvm-svn: 132444
2011-06-02 00:24:44 +00:00
Bruno Cardoso Lopes 98fc4c8bbc This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes bf3c1251e0 This patch implements the thread local storage. Implemented are General
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

llvm-svn: 132322
2011-05-31 02:53:58 +00:00
Akira Hatanaka b406843fe5 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Akira Hatanaka f1412e4d2f Remove MipsTargetLowering::LowerFP_TO_SINT. Patterns for fp_to_sint have already
been defined in MipsInstrFPU.td.

llvm-svn: 132076
2011-05-25 20:08:05 +00:00
Akira Hatanaka 44eba3ac49 Custom-lower FCOPYSIGN nodes.
llvm-svn: 132074
2011-05-25 19:32:07 +00:00
Eli Friedman 2518f8376d Make the logic for determining function alignment more explicit. No functionality change.
llvm-svn: 131012
2011-05-06 20:34:06 +00:00
Akira Hatanaka e24891251c Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.
llvm-svn: 129612
2011-04-15 21:51:11 +00:00
Akira Hatanaka aef55c8801 Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
llvm-svn: 129606
2011-04-15 21:00:26 +00:00
Akira Hatanaka 279169771b Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
llvm-svn: 129594
2011-04-15 19:52:08 +00:00
Akira Hatanaka a535270d91 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
llvm-svn: 128650
2011-03-31 18:26:17 +00:00
Bruno Cardoso Lopes 434248a62c Improve div/rem node handling on mips. Patch by Akira Hatanaka
llvm-svn: 127034
2011-03-04 21:03:24 +00:00
Bruno Cardoso Lopes f8198e4311 Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
llvm-svn: 127027
2011-03-04 20:01:52 +00:00
Bruno Cardoso Lopes ed874eff93 Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira
llvm-svn: 127003
2011-03-04 17:51:39 +00:00
Bruno Cardoso Lopes 4dc73fa075 Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka
llvm-svn: 123760
2011-01-18 19:29:17 +00:00
Bruno Cardoso Lopes b9bfd0945a Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again
llvm-svn: 121164
2010-12-07 19:04:14 +00:00
John Thompson e8360b7182 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Dan Gohman fe7532a308 Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.

llvm-svn: 107786
2010-07-07 15:54:55 +00:00
Dan Gohman 25c1653700 Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.

llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Dan Gohman 21cea8ac2e Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.

llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman 31ae586c74 Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.

llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Bruno Cardoso Lopes d59cddc098 Add suport for VASTART on Mips.
llvm-svn: 95506
2010-02-06 21:00:02 +00:00
Evan Cheng 6f36a083ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Evan Cheng c1b0116ff1 Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Evan Cheng 67a69dd2ed Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Evan Cheng 83896a59e1 Add a second ValueType argument to isFPImmLegal.
llvm-svn: 85361
2009-10-28 01:43:28 +00:00
Evan Cheng 16993aa30b Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
llvm-svn: 85281
2009-10-27 19:56:55 +00:00
Evan Cheng 270d0f986f Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.

llvm-svn: 82273
2009-09-18 21:02:19 +00:00
Sandeep Patel 68c5f477fa Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
llvm-svn: 80773
2009-09-02 08:44:58 +00:00
Chris Lattner 68535f7603 reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900
2009-08-13 06:28:06 +00:00
Chris Lattner 58e8be847c Restore some "small section" support code, reverting my patch from r76936.
llvm-svn: 78894
2009-08-13 05:41:27 +00:00
Owen Anderson 9f94459d24 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Owen Anderson 53aa7a960c Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Owen Anderson c30530d105 Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
llvm-svn: 78584
2009-08-10 18:56:59 +00:00
Dan Gohman f9bbcd1afd Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
2009-08-05 01:29:28 +00:00
Chris Lattner bc63d8bfbf remove more remnants of small section support.
llvm-svn: 76936
2009-07-24 03:14:35 +00:00
Tilmann Scheller 98bdaaa3ee Small cleanups in the PowerPC backend.
Small refactoring in LowerFORMAL_ARGUMENTS().
Correct minor formatting issues.
Remove size argument of CreateCopyOfByValArgument().
Remove dead argument from CalculateStackSlotSize().
Remove unused variable ReturnAddrIndex from various targets.

llvm-svn: 74763
2009-07-03 06:43:35 +00:00
Bill Wendling 512ff7353e Update comments to make it clear that the function alignment is the Log2 of the
bytes and not bytes.

llvm-svn: 74624
2009-07-01 18:50:55 +00:00
Bill Wendling 31ceb1bcba Add an "alignment" field to the MachineFunction object. It makes more sense to
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.

llvm-svn: 74564
2009-06-30 22:38:32 +00:00
Bruno Cardoso Lopes a72a505a80 Added support for fround, fextend and FP_TO_SINT
llvm-svn: 72483
2009-05-27 17:23:44 +00:00
Dan Gohman 747e55bc9a Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.

llvm-svn: 64018
2009-02-07 16:15:20 +00:00
Duncan Sands 8feb694e8f Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).

llvm-svn: 61542
2009-01-01 15:52:00 +00:00
Dan Gohman 2fe6bee5b6 Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.

llvm-svn: 57748
2008-10-18 02:06:02 +00:00
Dan Gohman ed1cf1a8f1 Fix these enums' starting values to reflect the way that
instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497
2008-09-23 18:42:32 +00:00
Dan Gohman d3fe174c53 Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Bruno Cardoso Lopes 92c64ae2d0 Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This
avoid the ugly instruction by instruction checking in printOperand.
Added a swap instruction present in the allegrex core.
Added two conditional instructions present in the allegrex core : MOVZ and MOVN.
They both allow a more efficient SELECT operation for integers.
Also added SELECT patterns to optimize MOVZ and MOVN usage.
The brcond and setcc patterns were cleaned: redundant and suboptimal patterns
were
removed. The suboptimals were replaced by more efficient ones.
Fixed some instructions that were using immZExt16 instead of immSExt16.

llvm-svn: 54724
2008-08-13 07:13:40 +00:00
Bruno Cardoso Lopes 02ff450f13 Added Mips support for DYNAMIC_STACKALLOC
Fixed bug in adjustMipsStackFrame, which was breaking
while trying to access a dead stack object index. Also added
one more alignment before fixing the callee saved registers
stack offset adjustment.

llvm-svn: 54485
2008-08-07 19:08:11 +00:00
Bruno Cardoso Lopes a01ede2f11 Mips ISelLowering cleanup : Removed old LowerCALL and FORMAL_ARGS helpers, they
aren't used anyway, they also used to broke compiling when fastcc was specified for a
function, but not anymore.

llvm-svn: 54316
2008-08-04 07:12:52 +00:00
Bruno Cardoso Lopes 3397298b65 Apply the same pattern used in 'and' lowering for 'or'
llvm-svn: 54273
2008-08-02 19:37:33 +00:00
Bruno Cardoso Lopes 23471047be Handle more SELECT corner cases considering legalize types, probabily wont work with
the default legalizer.

llvm-svn: 54249
2008-07-31 18:31:28 +00:00
Bruno Cardoso Lopes e683bbabc7 Added floating point lowering for select.
llvm-svn: 54167
2008-07-29 19:05:28 +00:00
Bruno Cardoso Lopes bcaf6e5243 Added floating point lowering for setcc and brcond.
Fixed COMM asm directive usage.
ConstantPool using custom FourByteConstantSection.

llvm-svn: 54139
2008-07-28 19:11:24 +00:00
Dan Gohman 2ce6f2ad5e Rename SDOperand to SDValue.
llvm-svn: 54128
2008-07-27 21:46:04 +00:00
Bruno Cardoso Lopes fdb4cec2fe Minor fixes.
Added ConstantPool support.

llvm-svn: 53951
2008-07-23 16:01:50 +00:00
Bruno Cardoso Lopes e5d1fcfe4e Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.

llvm-svn: 53869
2008-07-21 18:52:34 +00:00
Bruno Cardoso Lopes 7ceec57703 Fixe typos and 80 column size problems
llvm-svn: 53272
2008-07-09 04:45:36 +00:00
Bruno Cardoso Lopes a6ce3cee2f MipsTargetLowering cleanup
llvm-svn: 53270
2008-07-09 04:15:08 +00:00
Bruno Cardoso Lopes c9c3f49993 Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
  yet, but they allow the future inclusion of features easier. Among new features,
  we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
  integer
  and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
  aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
  sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
  FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
  FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
  return copy, no homing location within EABI, non 32-bit stack objects
  arguments, and asm constraint for float.

llvm-svn: 53146
2008-07-05 19:05:21 +00:00
Duncan Sands 13237ac3b9 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
2008-06-06 12:08:01 +00:00
Bruno Cardoso Lopes 4eed3afda0 Added custom SELECT_CC lowering
Added special isel for ADDE,SUBE and new patterns to match SUBC,ADDC

llvm-svn: 52031
2008-06-06 00:58:26 +00:00
Scott Michel a6729e8666 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bruno Cardoso Lopes b439132d16 Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.

llvm-svn: 44024
2007-11-12 19:49:57 +00:00
Bruno Cardoso Lopes 3e0d030dad Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.

llvm-svn: 43697
2007-11-05 03:02:32 +00:00
Bruno Cardoso Lopes 66d9572ced Position Independent Code (PIC) support [3]
llvm-svn: 42780
2007-10-09 03:15:11 +00:00
Bruno Cardoso Lopes b10580ac1e InlineAsm asm support for integer registers added
llvm-svn: 41225
2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes e8d1c52cd4 LowerRETURNADDR removed since it was wrong and does not have utility yet!
MipsAdd opcode added

llvm-svn: 41152
2007-08-18 01:54:09 +00:00
Dan Gohman 5f6a9da530 More explicit keywords.
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
Lauro Ramos Venancio 09d73c0305 Assert when TLS is not implemented.
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Bruno Cardoso Lopes 35e43c49b0 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
2007-06-06 07:42:06 +00:00