38453eebdc
Remove isImm(), isReg(), and friends, in favor of
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
27fb3dcbc7
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
llvm-svn: 55375
2008-08-26 18:03:31 +00:00
4f6bf04616
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
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llvm-svn: 54802
2008-08-14 22:49:33 +00:00
3b46030375
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
2008-07-07 23:14:23 +00:00
7d98a48f15
- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
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- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097
2008-07-03 09:09:37 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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llvm-svn: 46893
2008-02-08 21:20:40 +00:00
d19a6f4836
Add missing newline at EOF.
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llvm-svn: 45712
2008-01-07 19:13:36 +00:00
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
e20dd92792
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
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llvm-svn: 37193
2007-05-18 00:18:17 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
dbd3d294e6
Matches MachineInstr changes.
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llvm-svn: 31712
2006-11-13 23:36:35 +00:00
ed32883b27
fix warning about missing newline at end of file
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llvm-svn: 31162
2006-10-24 17:07:11 +00:00
b7267bd034
implement uncond branch insertion for sparc to fix regressions from last night
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due to branchfolding
llvm-svn: 31157
2006-10-24 16:39:19 +00:00
158e1f519c
Rename SPARC V8 target to be the LLVM SPARC target.
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llvm-svn: 25985
2006-02-05 05:50:24 +00:00
94e95d2b3e
Great renaming: Sparc --> SparcV9
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llvm-svn: 11826
2004-02-25 18:44:15 +00:00
b01a80aa94
Reorganized the Sparc backend to be more modular -- each different
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implementation of a Target{RegInfo, InstrInfo, Machine, etc} now has a separate
header and a separate implementation file.
This means that instead of a massive SparcInternals.h that forces a
recompilation of the whole target whenever a minor detail is changed, you should
only recompile a few files.
Note that SparcInternals.h is still around; its contents should be minimized.
llvm-svn: 10500
2003-12-17 22:04:00 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
bf9ed7ac1f
* Use the MachineConstantPool for storing constants instead of a hash_set;
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* Do not create new globals for constants!
Also, order #includes as per coding style guide
llvm-svn: 9772
2003-11-07 17:29:48 +00:00
73d9355fea
Hrm, unbreak stuph :(
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llvm-svn: 9334
2003-10-21 17:22:23 +00:00
a62228d01a
Fix preselection/lowerswitches bug
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llvm-svn: 9333
2003-10-21 16:29:23 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
b94550e537
Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions.
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llvm-svn: 9269
2003-10-19 21:34:28 +00:00
2797c131ef
Don't include "Config/stdlib.h".
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llvm-svn: 9037
2003-10-10 19:12:22 +00:00
e895c2e241
Unify all constant evaluations that depend on register size
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in ConvertConstantToIntType.
llvm-svn: 7395
2003-07-29 19:59:23 +00:00
6077c3195f
Simplify code by using ConstantInt::getRawValue instead of checking to see
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whether the constant is signed or unsigned, then casting
llvm-svn: 7252
2003-07-23 15:22:26 +00:00
8ea738a9ff
Bug fix in creating constants: need 1U << 31, not 1 << 31.
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llvm-svn: 7158
2003-07-10 19:48:19 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
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system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
2969ec5266
* Changed Bcc instructions to behave like BPcc instructions
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* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes
llvm-svn: 6655
2003-06-06 09:52:23 +00:00
3cdf52a644
Convert load/store opcodes from register to immediate forms, if necessary.
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llvm-svn: 6565
2003-06-03 03:20:57 +00:00
a83804a29a
Extensive changes to the way code generation occurs for function
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call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.
llvm-svn: 6465
2003-05-31 07:32:01 +00:00
8bde6a688c
Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
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llvm-svn: 6373
2003-05-27 22:35:43 +00:00
5b941461b1
Bug fix: sign-extension was not happening for C = -MININT since C == -C!
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llvm-svn: 6332
2003-05-25 21:58:11 +00:00
f865cc44ab
Cleaned up code layout, spacing, etc. for readability purposes and to be more
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consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)
No functional changes were made.
llvm-svn: 6265
2003-05-21 18:48:06 +00:00
56f4fa10fd
Sparc instruction opcodes now all live under the `V9' namespace.
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llvm-svn: 6249
2003-05-20 20:32:24 +00:00
21d4509d76
IntegerRegSize is always 8 for sparc
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llvm-svn: 5961
2003-04-26 19:44:35 +00:00
efbae9cff1
Fix obvious type-o
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llvm-svn: 5932
2003-04-25 05:23:10 +00:00
dea36ca100
Move sparc specific code into the Sparc backend
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llvm-svn: 5317
2003-01-15 21:36:50 +00:00
e58cd301cd
Use BuildMI more
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llvm-svn: 5299
2003-01-15 19:23:34 +00:00
1ebaa90f48
Use BuildMI more, Create*Instruction less
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llvm-svn: 5291
2003-01-15 17:47:49 +00:00
71aa7afc27
* Elimiante a bunch of functions from InstrSelectionSupport.h, replacing users
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of them with BUildMI calls instead.
* Fix def information in instructions generated by prologepilog inserter
llvm-svn: 5287
2003-01-15 00:03:28 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
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llvm-svn: 5272
2003-01-14 22:00:31 +00:00
a41b89a829
* TargetData is no longer directly accessable from TargetMachine
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* Constpool & frame info is no longer directly in MachineFunction
llvm-svn: 5174
2002-12-28 20:18:21 +00:00
01efae0bbf
MachineInstrInfo doesn't need a TargetMachine
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llvm-svn: 4372
2002-10-29 15:45:20 +00:00
Dan Gohman