John McCall
8a8d703be0
Fix how cc1 command line options are mapped into FP options.
...
Canonicalize on storing FP options in LangOptions instead of
redundantly in CodeGenOptions. Incorporate -ffast-math directly
into the values of those LangOptions rather than considering it
separately when building FPOptions. Build IR attributes from
those options rather than a mix of sources.
We should really simplify the driver/cc1 interaction here and have
the driver pass down options that cc1 directly honors. That can
happen in a follow-up, though.
Patch by Michele Scandale!
https://reviews.llvm.org/D80315
2020-06-01 22:00:30 -04:00
Artem Belevich
314f99e7d4
[CUDA] Enable existing builtins for PTX7.0 as well.
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Differential Revision: https://reviews.llvm.org/D79515
2020-05-06 14:24:21 -07:00
Artem Belevich
844096b996
[CUDA] Make NVVM builtins available with CUDA-11/PTX6.5
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Differential Revision: https://reviews.llvm.org/D79449
2020-05-05 15:43:32 -07:00
Artem Belevich
bab95c7087
[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
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Differential Revision: https://reviews.llvm.org/D38191
llvm-svn: 314223
2017-09-26 17:07:23 +00:00
Justin Lebar
d31d5e6aa2
Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.", rL314135.
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Causing assertion failures on macos:
> Assertion failed: (Num < NumOperands && "Invalid child # of SDNode!"),
> function getOperand, file
> /Users/buildslave/jenkins/workspace/clang-stage1-cmake-RA-incremental/llvm/include/llvm/CodeGen/SelectionDAGNodes.h,
> line 835.
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/42739/testReport/LLVM/CodeGen_NVPTX/surf_read_cuda_ll/
llvm-svn: 314142
2017-09-25 19:41:56 +00:00
Artem Belevich
9941ee9529
[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
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Differential Revision: https://reviews.llvm.org/D38191
llvm-svn: 314135
2017-09-25 18:53:57 +00:00
Artem Belevich
42960b4188
[NVPTX] Implemented bar.warp.sync, barrier.sync, and vote{.sync} instructions/intrinsics/builtins.
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Differential Revision: https://reviews.llvm.org/D38148
llvm-svn: 313898
2017-09-21 18:44:49 +00:00
Artem Belevich
4654dc89be
[NVPTX] Implemented shfl.sync instruction and supporting intrinsics/builtins.
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Differential Revision: https://reviews.llvm.org/D38090
llvm-svn: 313820
2017-09-20 21:23:07 +00:00